1 /*
2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8 /dts-v1/;
10 /*
11 * Following are the carveout addresses and the sizes for ION. SMC is not reserved for now
12 * C0000000 - SDRAM+1G
13 * BFD00000 - SMC (3MB)
14 * BA300000 - ION (90MB)
15 * B4300000 - TILER SECURE (81 MB)
16 * B3400000 - TILER NONSECURE (15 MB)
17 */
18 /memreserve/ 0xba300000 0x5a00000;
19 /memreserve/ 0xb5200000 0x5100000;
20 /memreserve/ 0xb4300000 0xf00000;
22 /include/ "dra7.dtsi"
24 / {
25 model = "TI DRA7";
26 compatible = "ti,dra7-evm", "ti,dra7";
28 cpus {
29 cpu@0 {
30 cpu0-supply = <&avs_mpu>;
31 };
32 };
34 memory {
35 device_type = "memory";
36 reg = <0x80000000 0x20000000>; /* 512 MB */
37 };
39 vmmc2_fixed: fixedregulator-mmc2 {
40 compatible = "regulator-fixed";
41 regulator-name = "vmmc2_fixed";
42 regulator-min-microvolt = <3000000>;
43 regulator-max-microvolt = <3000000>;
44 };
46 ion_config {
47 compatible = "ti,ion-omap";
48 ti,omap_ion_heap_secure_input_base = <0xba300000>;
49 ti,omap_ion_heap_tiler_base = <0xb4300000>;
50 ti,omap_ion_heap_nonsecure_tiler_base = <0xf00000>;
51 /*90 MB*/
52 ti,omap_ion_heap_secure_input_size = <0x5A00000>;
53 /*96 MB*/
54 ti,omap_ion_heap_tiler_size = <0x6000000>;
55 /*15 MB*/
56 ti,omap_ion_heap_nonsecure_tiler_size = <0xF00000>;
57 };
59 ocp {
60 gpu: gpu@0x56000000 {
61 gpu-supply = <&avs_gpu>;
62 };
63 };
65 vaudio_1v8: fixedregulator-vaudio-dig {
66 compatible = "regulator-fixed";
67 regulator-name = "vdac_fixed";
68 regulator-min-microvolt = <1800000>;
69 regulator-max-microvolt = <1800000>;
70 regulator-boot-on;
71 };
73 vaudio_3v3: fixedregulator-vaudio-anlg {
74 compatible = "regulator-fixed";
75 regulator-name = "vdac_fixed";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
78 regulator-boot-on;
79 };
81 sound {
82 compatible = "ti,dra7-evm-sound";
83 ti,model = "dra7evm";
85 /* Audio routing */
86 ti,audio-routing =
87 "LINE1L", "Line In",
88 "LINE1R", "Line In",
89 "MIC3L", "Mic Bias 2V",
90 "MIC3R", "Mic Bias 2V",
91 "Mic Bias 2V", "Main Mic",
92 "Headphone", "HPLOUT",
93 "Headphone", "HPROUT",
94 "Line Out", "LLOUT",
95 "Line Out", "RLOUT";
97 /* Media DAI link */
98 ti,media-cpu = <&mcasp3>;
99 ti,media-codec = <&tlv320aic3106>;
100 ti,media-mclk-freq = <5644800>;
101 ti,media-slots = <2>;
102 };
104 sound_hdmi {
105 compatible = "ti,omap-hdmi-tpd12s015-audio";
106 ti,model = "OMAP5HDMI";
107 ti,hdmi_audio = <&hdmi>;
108 ti,level_shifter = <&tpd12s015>;
109 };
110 };
112 &dra7_pmx_core {
113 pinctrl-names = "default";
114 pinctrl-0 = <
115 &atl_pins
116 &mcasp3_pins
117 &mcasp6_pins
118 &vout1_pins
119 &usb_pins
120 >;
122 atl_pins: pinmux_atl_pins {
123 pinctrl-single,pins = <
124 0x298 0x00000005 /* xref_clk1.atl_clk1 OUTPUT | MODE5 */
125 0x29c 0x00000005 /* xref_clk2.atl_clk2 OUTPUT | MODE5 */
126 >;
127 };
129 mcasp3_pins: pinmux_mcasp3_pins {
130 pinctrl-single,pins = <
131 0x324 0x00000000 /* mcasp3_aclkx.mcasp3_aclkx OUTPUT | MODE0 */
132 0x328 0x00000000 /* mcasp3_fsx.mcasp3_fsx OUTPUT | MODE0 */
133 0x32c 0x00000000 /* mcasp3_axr0.mcasp3_axr0 OUTPUT | MODE0 */
134 0x330 0x00040000 /* mcasp3_axr1.mcasp3_axr1 INPUT | MODE0 */
135 >;
136 };
138 mcasp6_pins: pinmux_mcasp6_pins {
139 pinctrl-single,pins = <
140 0x2d4 0x00000001 /* mcasp1_axr8.mcasp6_axr0 OUTPUT | MODE1 */
141 0x2d8 0x00040001 /* mcasp1_axr9.mcasp6_axr1 INPUT | MODE 1 */
142 0x2dc 0x00000001 /* mcasp1_axr10.mcasp6_clkx OUTPUT | MODE1 */
143 0x2e0 0x00000001 /* mcasp1_axr11.mcasp6_fsx OUTPUT | MODE1 */
144 >;
145 };
147 usb_pins: pinmux_usb_pins {
148 pinctrl-single,pins = <
149 0x280 0xc0000 /* DRV1_VBUS SLEW | PULLDEN | MODE0 */
150 0x284 0xc0000 /* DRV2_VBUS SLEW | PULLDEN | MODE0 */
151 >;
152 };
154 i2c2_pins: pinmux_i2c2_pins {
155 pinctrl-single,pins = <
156 0x408 0x60000 /* i2c2_sda INPUT | MODE0 */
157 0x40C 0x60000 /* i2c2_scl INPUT | MODE0 */
158 >;
159 };
161 vout1_pins: pinmux_vout1_pins {
162 pinctrl-single,pins = <
163 0x1C8 0x0 /* vout1_clk OUTPUT | MODE0 */
164 0x1CC 0x0 /* vout1_de OUTPUT | MODE0 */
165 0x1D0 0x0 /* vout1_fld OUTPUT | MODE0 */
166 0x1D4 0x0 /* vout1_hsync OUTPUT | MODE0 */
167 0x1D8 0x0 /* vout1_vsync OUTPUT | MODE0 */
168 0x1DC 0x0 /* vout1_d0 OUTPUT | MODE0 */
169 0x1E0 0x0 /* vout1_d1 OUTPUT | MODE0 */
170 0x1E4 0x0 /* vout1_d2 OUTPUT | MODE0 */
171 0x1E8 0x0 /* vout1_d3 OUTPUT | MODE0 */
172 0x1EC 0x0 /* vout1_d4 OUTPUT | MODE0 */
173 0x1F0 0x0 /* vout1_d5 OUTPUT | MODE0 */
174 0x1F4 0x0 /* vout1_d6 OUTPUT | MODE0 */
175 0x1F8 0x0 /* vout1_d7 OUTPUT | MODE0 */
176 0x1FC 0x0 /* vout1_d8 OUTPUT | MODE0 */
177 0x200 0x0 /* vout1_d9 OUTPUT | MODE0 */
178 0x204 0x0 /* vout1_d10 OUTPUT | MODE0 */
179 0x208 0x0 /* vout1_d11 OUTPUT | MODE0 */
180 0x20C 0x0 /* vout1_d12 OUTPUT | MODE0 */
181 0x210 0x0 /* vout1_d13 OUTPUT | MODE0 */
182 0x214 0x0 /* vout1_d14 OUTPUT | MODE0 */
183 0x218 0x0 /* vout1_d15 OUTPUT | MODE0 */
184 0x21C 0x0 /* vout1_d16 OUTPUT | MODE0 */
185 0x220 0x0 /* vout1_d17 OUTPUT | MODE0 */
186 0x224 0x0 /* vout1_d18 OUTPUT | MODE0 */
187 0x228 0x0 /* vout1_d19 OUTPUT | MODE0 */
188 0x22C 0x0 /* vout1_d20 OUTPUT | MODE0 */
189 0x230 0x0 /* vout1_d21 OUTPUT | MODE0 */
190 0x234 0x0 /* vout1_d22 OUTPUT | MODE0 */
191 0x238 0x0 /* vout1_d23 OUTPUT | MODE0 */
192 >;
193 };
194 display_layout {
195 compatible = "ti, omap4-dsscomp";
196 ti,num_displays = <2>;
197 ti,default_display = "lcd";
198 };
199 };
201 &i2c1 {
202 clock-frequency = <400000>;
204 tps659038: tps659038@58 {
205 reg = <0x58>;
206 };
208 pcf_lcd: pcf8575@20 {
209 compatible = "ti,pcf8575";
210 reg = <0x20>;
211 gpio-controller;
212 #gpio-cells = <2>;
213 };
215 /* TLC chip for LCD panel power and backlight */
216 tlc59108: tlc59108@40 {
217 compatible = "ti,tlc59108";
218 reg = <0x40>;
219 gpios = <&pcf_lcd 15 0>; /* P15, CON_LCD_PWR_DN */
220 };
222 tlv320aic3106: tlv320aic3106@18 {
223 compatible = "ti,tlv320aic3x";
224 reg = <0x18>;
225 IOVDD-supply = <&vaudio_3v3>;
226 DVDD-supply = <&vaudio_1v8>;
227 AVDD-supply = <&vaudio_3v3>;
228 DRVDD-supply = <&vaudio_3v3>;
229 };
230 };
232 /include/ "tps659038.dtsi"
234 &i2c2 {
235 pinctrl-names = "default";
236 pinctrl-0 = <&i2c2_pins>;
238 clock-frequency = <400000>;
240 pcf_hdmi: pcf8575@26 {
241 compatible = "ti,pcf8575";
242 reg = <0x26>;
243 gpio-controller;
244 #gpio-cells = <2>;
245 };
246 };
248 &i2c3 {
249 clock-frequency = <400000>;
250 };
252 &i2c4 {
253 clock-frequency = <400000>;
254 };
256 &i2c5 {
257 clock-frequency = <400000>;
258 };
260 &mmc1 {
261 vmmc-supply = <&ldo1_reg>;
262 bus-width = <4>;
263 };
265 &mmc2 {
266 vmmc-supply = <&vmmc2_fixed>;
267 bus-width = <8>;
268 ti,non-removable;
269 };
271 &mmc3 {
272 bus-width = <8>;
273 ti,non-removable;
274 status = "disabled";
275 };
277 &mmc4 {
278 bus-width = <4>;
279 status = "disabled";
280 };
282 &avs_mpu {
283 avs-supply = <&smps123_reg>;
284 };
286 &avs_core {
287 avs-supply = <&smps7_reg>;
288 };
290 &avs_gpu {
291 avs-supply = <&smps6_reg>;
292 };
294 &avs_dspeve {
295 avs-supply = <&smps45_reg>;
296 };
298 &avs_iva {
299 avs-supply = <&smps8_reg>;
300 };
302 &dpi1 {
303 lcd {
304 compatible = "ti,tfc_s9700";
305 tlc = <&tlc59108>;
306 data-lines = <24>;
307 };
308 };
310 &hdmi {
311 tpd12s015: tpd12s015 {
312 compatible = "ti,tpd12s015";
314 gpios = <&pcf_hdmi 4 0>, /* pcf8575@22 P4, CT_CP_HDP */
315 <&pcf_hdmi 5 0>, /* pcf8575@22 P5, LS_OE */
316 <&gpio7 12 0>; /* gpio7_12/sp1_cs2, HPD */
318 hdmi_ddc = <&i2c2>;
320 hdmi-monitor {
321 compatible = "ti,hdmi_panel";
322 };
323 };
324 };