arch/arm/boot/dts/dra7-evm.dts

   1 /*
   2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8 /dts-v1/;
   9
  10 #include "dra74x.dtsi"
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/clk/ti-dra7-atl.h>
  14
  15 / {
  16         model = "TI DRA742";
  17         compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
  18
  19         memory {
  20                 device_type = "memory";
  21                 reg = <0x80000000 0x60000000>; /* 1536 MB */
  22         };
  23
  24         reserved-memory {
  25                 #address-cells = <1>;
  26                 #size-cells = <1>;
  27                 ranges;
  28
  29                 ipu2_cma_pool: ipu2_cma@95800000 {
  30                         compatible = "shared-dma-pool";
  31                         reg = <0x95800000 0x3800000>;
  32                         reusable;
  33                         status = "okay";
  34                 };
  35
  36                 dsp1_cma_pool: dsp1_cma@99000000 {
  37                         compatible = "shared-dma-pool";
  38                         reg = <0x99000000 0x4000000>;
  39                         reusable;
  40                         status = "okay";
  41                 };
  42
  43                 ipu1_cma_pool: ipu1_cma@9d000000 {
  44                         compatible = "shared-dma-pool";
  45                         reg = <0x9d000000 0x2000000>;
  46                         reusable;
  47                         status = "okay";
  48                 };
  49
  50                 dsp2_cma_pool: dsp2_cma@9f000000 {
  51                         compatible = "shared-dma-pool";
  52                         reg = <0x9f000000 0x800000>;
  53                         reusable;
  54                         status = "okay";
  55                 };
  56
  57                 /* Required by cmem driver used by radio */
  58                 cmem_radio: cmem@95400000 {
  59                         reg = <0x95400000 0x400000>;
  60                         no-map;
  61                         status = "okay";
  62                 };
  63         };
  64
  65         extcon1: dra7x_usbid_extcon1 {
  66                 compatible = "linux,extcon-gpio";
  67                 gpios = <&pcf_gpio_21 1 GPIO_ACTIVE_LOW>;
  68                 cable-name = "USB-HOST";
  69         };
  70
  71         extcon2: dra7x_usbid_extcon2 {
  72                 compatible = "linux,extcon-gpio";
  73                 gpios = <&pcf_gpio_21 2 GPIO_ACTIVE_LOW>;
  74                 cable-name = "USB-HOST";
  75         };
  76
  77         evm_3v3_sd: fixedregulator-sd {
  78                 compatible = "regulator-fixed";
  79                 regulator-name = "evm_3v3_sd";
  80                 regulator-min-microvolt = <3300000>;
  81                 regulator-max-microvolt = <3300000>;
  82                 enable-active-high;
  83                 gpio = <&pcf_gpio_21 5 0>;
  84         };
  85
  86         evm_3v3_sw: fixedregulator-evm_3v3_sw {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "evm_3v3_sw";
  89                 vin-supply = <&sysen1>;
  90                 regulator-min-microvolt = <3300000>;
  91                 regulator-max-microvolt = <3300000>;
  92         };
  93
  94         aic_dvdd: fixedregulator-aic_dvdd {
  95                 /* TPS77018DBVT */
  96                 compatible = "regulator-fixed";
  97                 regulator-name = "aic_dvdd";
  98                 vin-supply = <&evm_3v3_sw>;
  99                 regulator-min-microvolt = <1800000>;
 100                 regulator-max-microvolt = <1800000>;
 101         };
 102
 103         vmmcwl_fixed: fixedregulator-mmcwl {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "vmmcwl_fixed";
 106                 regulator-min-microvolt = <1800000>;
 107                 regulator-max-microvolt = <1800000>;
 108                 gpio = <&gpio5 8 0>;    /* gpio5_8 */
 109                 startup-delay-us = <70000>;
 110                 enable-active-high;
 111         };
 112
 113         kim {
 114                 compatible = "kim";
 115                 nshutdown_gpio = <132>;
 116                 dev_name = "/dev/ttyS2";
 117                 flow_cntrl = <1>;
 118                 baud_rate = <3686400>;
 119         };
 120
 121         btwilink {
 122                 compatible = "btwilink";
 123         };
 124
 125         vtt_fixed: fixedregulator-vtt {
 126                 compatible = "regulator-fixed";
 127                 regulator-name = "vtt_fixed";
 128                 regulator-min-microvolt = <1350000>;
 129                 regulator-max-microvolt = <1350000>;
 130                 regulator-always-on;
 131                 regulator-boot-on;
 132                 enable-active-high;
 133                 vin-supply = <&sysen2>;
 134                 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
 135         };
 136
 137         aliases {
 138                 display0 = &hdmi0;
 139                 sound0 = &primary_sound;
 140                 sound1 = &hdmi;
 141         };
 142
 143         hdmi0: connector@1 {
 144                 compatible = "hdmi-connector";
 145                 label = "hdmi";
 146
 147                 type = "a";
 148
 149                 port {
 150                         hdmi_connector_in: endpoint {
 151                                 remote-endpoint = <&tpd12s015_out>;
 152                         };
 153                 };
 154         };
 155
 156         tpd12s015: encoder@1 {
 157                 compatible = "ti,dra7evm-tpd12s015";
 158
 159                 gpios = <&pcf_hdmi 4 0>,        /* P4, CT CP HPD */
 160                         <&pcf_hdmi 5 0>,        /* P5, LS OE */
 161                         <&gpio7 12 0>;  /* gpio7_12/sp1_cs2, HPD */
 162
 163                 ports {
 164                         #address-cells = <1>;
 165                         #size-cells = <0>;
 166
 167                         port@0 {
 168                                 reg = <0>;
 169
 170                                 tpd12s015_in: endpoint@0 {
 171                                         remote-endpoint = <&hdmi_out>;
 172                                 };
 173                         };
 174
 175                         port@1 {
 176                                 reg = <1>;
 177
 178                                 tpd12s015_out: endpoint@0 {
 179                                         remote-endpoint = <&hdmi_connector_in>;
 180                                 };
 181                         };
 182                 };
 183         };
 184
 185     ocp {
 186         gpu: gpu@0x56000000 {
 187             gpu0-voltdm = <&voltdm_gpu>;
 188         };
 189     };
 190
 191         primary_sound: primary_sound {
 192                 compatible = "ti,dra7xx-evm-audio";
 193                 ti,model = "DRA7xx-EVM";
 194                 ti,always-on;
 195                 ti,audio-codec = <&tlv320aic3106>;
 196                 ti,mcasp-controller = <&mcasp3>;
 197                 ti,codec-clock-rate = <11289600>;
 198                 clocks = <&atl_clkin2_ck>;
 199                 clock-names = "mclk";
 200                 ti,audio-routing =
 201                         "Headphone Jack",       "HPLOUT",
 202                         "Headphone Jack",       "HPROUT",
 203                         "Line Out",             "LLOUT",
 204                         "Line Out",             "RLOUT",
 205                         "MIC3L",                "Mic Jack",
 206                         "MIC3R",                "Mic Jack",
 207                         "Mic Jack",             "Mic Bias",
 208                         "LINE1L",               "Line In",
 209                         "LINE1R",               "Line In";
 210         };
 211
 212         radio {
 213                 compatible = "ti,dra7xx_radio";
 214                 gpios = <&gpio6 20 0>;
 215         };
 216 };
 217
 218 &dra7_pmx_core {
 219         i2c2_pins: pinmux_i2c2_pins {
 220                 pinctrl-single,pins = <
 221                         0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
 222                         0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
 223                 >;
 224         };
 225
 226         dcan1_pins_default: dcan1_pins_default {
 227                 pinctrl-single,pins = <
 228                         0x3d0   (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
 229                         0x418   (PULL_UP | MUX_MODE1)           /* wakeup0.dcan1_rx */
 230                 >;
 231         };
 232
 233         dcan1_pins_sleep: dcan1_pins_sleep {
 234                 pinctrl-single,pins = <
 235                         0x3d0   (MUX_MODE15 | PULL_UP)  /* dcan1_tx.off */
 236                         0x418   (MUX_MODE15 | PULL_UP)  /* wakeup0.off */
 237                 >;
 238         };
 239
 240         mmc1_pins_default: pinmux_mmc1_default_pins {
 241                 pinctrl-single,pins = <
 242                         0x354 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc1_clk.clk */
 243                         0x358 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc1_cmd.cmd */
 244                         0x35c (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc1_dat0.dat0 */
 245                         0x360 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc1_dat1.dat1 */
 246                         0x364 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc1_dat2.dat2 */
 247                         0x368 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc1_dat3.dat3 */
 248                         0x36c (PIN_INPUT | MUX_MODE14)          /* mmc1sdcd.gpio187 */
 249                 >;
 250         };
 251
 252         mmc1_pins_hs: pinmux_mmc1_hs_pins {
 253                 pinctrl-single,pins = <
 254                         0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)       /* mmc1_clk.clk */
 255                         0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)       /* mmc1_cmd.cmd */
 256                         0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)       /* mmc1_dat0.dat0 */
 257                         0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)       /* mmc1_dat1.dat1 */
 258                         0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)       /* mmc1_dat2.dat2 */
 259                         0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0)       /* mmc1_dat3.dat3 */
 260                 >;
 261         };
 262
 263         mmc2_pins_default: mmc2_pins_default {
 264                 pinctrl-single,pins = <
 265                         0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
 266                         0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
 267                         0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
 268                         0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
 269                         0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
 270                         0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
 271                         0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
 272                         0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
 273                         0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
 274                         0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
 275                 >;
 276         };
 277
 278         mmc2_pins_hs: pinmux_mmc2_hs_pins {
 279                 pinctrl-single,pins = <
 280                         0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
 281                         0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
 282                         0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
 283                         0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
 284                         0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
 285                         0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
 286                         0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
 287                         0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
 288                         0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
 289                         0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
 290                 >;
 291         };
 292 };
 293
 294 &i2c1 {
 295         status = "okay";
 296         clock-frequency = <400000>;
 297
 298         tps659038: tps659038@58 {
 299                 compatible = "ti,tps659038";
 300                 reg = <0x58>;
 301
 302                 tps659038_pmic {
 303                         compatible = "ti,tps659038-pmic";
 304
 305                         regulators {
 306                                 smps123_reg: smps123 {
 307                                         /* VDD_MPU */
 308                                         regulator-name = "smps123";
 309                                         regulator-min-microvolt = < 850000>;
 310                                         regulator-max-microvolt = <1250000>;
 311                                         regulator-always-on;
 312                                         regulator-boot-on;
 313                                 };
 314
 315                                 smps45_reg: smps45 {
 316                                         /* VDD_DSPEVE */
 317                                         regulator-name = "smps45";
 318                                         regulator-min-microvolt = < 850000>;
 319                                         regulator-max-microvolt = <1150000>;
 320                                         regulator-boot-on;
 321                                         regulator-always-on;
 322                                 };
 323
 324                                 smps6_reg: smps6 {
 325                                         /* VDD_GPU - over VDD_SMPS6 */
 326                                         regulator-name = "smps6";
 327                                         regulator-min-microvolt = <850000>;
 328                                         regulator-max-microvolt = <1250000>;
 329                                         regulator-boot-on;
 330                                         regulator-always-on;
 331                                 };
 332
 333                                 smps7_reg: smps7 {
 334                                         /* CORE_VDD */
 335                                         regulator-name = "smps7";
 336                                         regulator-min-microvolt = <850000>;
 337                                         regulator-max-microvolt = <1060000>;
 338                                         regulator-always-on;
 339                                         regulator-boot-on;
 340                                 };
 341
 342                                 smps8_reg: smps8 {
 343                                         /* VDD_IVAHD */
 344                                         regulator-name = "smps8";
 345                                         regulator-min-microvolt = < 850000>;
 346                                         regulator-max-microvolt = <1250000>;
 347                                         regulator-boot-on;
 348                                         regulator-always-on;
 349                                 };
 350
 351                                 smps9_reg: smps9 {
 352                                         /* VDDS1V8 */
 353                                         regulator-name = "smps9";
 354                                         regulator-min-microvolt = <1800000>;
 355                                         regulator-max-microvolt = <1800000>;
 356                                         regulator-always-on;
 357                                         regulator-boot-on;
 358                                 };
 359
 360                                 ldo1_reg: ldo1 {
 361                                         /* LDO1_OUT --> SDIO  */
 362                                         regulator-name = "ldo1";
 363                                         regulator-min-microvolt = <1800000>;
 364                                         regulator-max-microvolt = <3300000>;
 365                                         regulator-boot-on;
 366                                         regulator-always-on;
 367                                 };
 368
 369                                 ldo2_reg: ldo2 {
 370                                         /* VDD_RTCIO */
 371                                         /* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */
 372                                         regulator-name = "ldo2";
 373                                         regulator-min-microvolt = <3300000>;
 374                                         regulator-max-microvolt = <3300000>;
 375                                         regulator-boot-on;
 376                                         regulator-always-on;
 377                                 };
 378
 379                                 ldo3_reg: ldo3 {
 380                                         /* VDDA_1V8_PHY */
 381                                         regulator-name = "ldo3";
 382                                         regulator-min-microvolt = <1800000>;
 383                                         regulator-max-microvolt = <1800000>;
 384                                         regulator-always-on;
 385                                         regulator-boot-on;
 386                                 };
 387
 388                                 ldo9_reg: ldo9 {
 389                                         /* VDD_RTC */
 390                                         regulator-name = "ldo9";
 391                                         regulator-min-microvolt = <1050000>;
 392                                         regulator-max-microvolt = <1050000>;
 393                                         regulator-boot-on;
 394                                         regulator-always-on;
 395                                 };
 396
 397                                 ldoln_reg: ldoln {
 398                                         /* VDDA_1V8_PLL */
 399                                         regulator-name = "ldoln";
 400                                         regulator-min-microvolt = <1800000>;
 401                                         regulator-max-microvolt = <1800000>;
 402                                         regulator-always-on;
 403                                         regulator-boot-on;
 404                                 };
 405
 406                                 ldousb_reg: ldousb {
 407                                         /* VDDA_3V_USB: VDDA_USBHS33 */
 408                                         regulator-name = "ldousb";
 409                                         regulator-min-microvolt = <3300000>;
 410                                         regulator-max-microvolt = <3300000>;
 411                                         regulator-boot-on;
 412                                         regulator-always-on;
 413                                 };
 414
 415                                 /* REGEN1 is unused */
 416
 417                                 regen2: regen2 {
 418                                         /* Needed for PMIC internal resources */
 419                                         regulator-name = "regen2";
 420                                         regulator-boot-on;
 421                                         regulator-always-on;
 422                                 };
 423
 424                                 /* REGEN3 is unused */
 425
 426                                 sysen1: sysen1 {
 427                                         /* PMIC_REGEN_3V3 */
 428                                         regulator-name = "sysen1";
 429                                         regulator-boot-on;
 430                                         regulator-always-on;
 431                                 };
 432
 433                                 sysen2: sysen2 {
 434                                         /* PMIC_REGEN_DDR */
 435                                         regulator-name = "sysen2";
 436                                         regulator-boot-on;
 437                                         regulator-always-on;
 438                                 };
 439                         };
 440                 };
 441         };
 442
 443         pcf_lcd: gpio@20 {
 444                 compatible = "nxp,pcf8575";
 445                 reg = <0x20>;
 446                 gpio-controller;
 447                 #gpio-cells = <2>;
 448         };
 449
 450         pcf_gpio_21: gpio@21 {
 451                 compatible = "ti,pcf8575";
 452                 reg = <0x21>;
 453                 lines-initial-states = <0x1408>;
 454                 gpio-controller;
 455                 #gpio-cells = <2>;
 456                 interrupt-parent = <&gpio6>;
 457                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 458                 interrupt-controller;
 459                 #interrupt-cells = <2>;
 460         };
 461
 462         mxt244: touchscreen@4a {
 463                 compatible = "atmel,mXT244";
 464                 status = "okay";
 465                 reg = <0x4a>;
 466                 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 467
 468                 atmel,config = <
 469                         /* MXT244_GEN_COMMAND(6) */
 470                         0x00 0x00 0x00 0x00 0x00 0x00
 471                         /* MXT244_GEN_POWER(7) */
 472                         0x20 0xff 0x32
 473                         /* MXT244_GEN_ACQUIRE(8) */
 474                         0x0a 0x00 0x05 0x00 0x00 0x00 0x09 0x23
 475                         /* MXT244_TOUCH_MULTI(9) */
 476                         0x00 0x00 0x00 0x13 0x0b 0x00 0x00 0x00 0x02 0x00
 477                         0x00 0x01 0x01 0x0e 0x0a 0x0a 0x0a 0x0a 0x00 0x00
 478                         0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
 479                         0x00
 480                         /* MXT244_TOUCH_KEYARRAY(15) */
 481                         0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
 482                         0x00
 483                         /* MXT244_COMMSCONFIG_T18(2) */
 484                         0x00 0x00
 485                         /* MXT244_SPT_GPIOPWM(19) */
 486                         0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
 487                         0x00 0x00 0x00 0x00 0x00 0x00
 488                         /* MXT244_PROCI_GRIPFACE(20) */
 489                         0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x50 0x28 0x04
 490                         0x0f 0x0a
 491                         /* MXT244_PROCG_NOISE(22) */
 492                         0x05 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x23 0x00
 493                         0x00 0x05 0x0f 0x19 0x23 0x2d 0x03
 494                         /* MXT244_TOUCH_PROXIMITY(23) */
 495                         0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
 496                         0x00 0x00 0x00 0x00 0x00
 497                         /* MXT244_PROCI_ONETOUCH(24) */
 498                         0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
 499                         0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
 500                         /* MXT244_SPT_SELFTEST(25) */
 501                         0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
 502                         0x00 0x00 0x00 0x00
 503                         /* MXT244_PROCI_TWOTOUCH(27) */
 504                         0x00 0x00 0x00 0x00 0x00 0x00 0x00
 505                         /* MXT244_SPT_CTECONFIG(28) */
 506                         0x00 0x00 0x02 0x08 0x10 0x00
 507                 >;
 508
 509                 atmel,x_line = <18>;
 510                 atmel,y_line = <12>;
 511                 atmel,x_size = <800>;
 512                 atmel,y_size = <480>;
 513                 atmel,blen = <0x01>;
 514                 atmel,threshold = <30>;
 515                 atmel,voltage = <2800000>;
 516                 atmel,orient = <0x4>;
 517         };
 518
 519         tlv320aic3106: tlv320aic3106@18 {
 520                 compatible = "ti,tlv320aic3106";
 521                 reg = <0x18>;
 522                 adc-settle-ms = <40>;
 523                 ai3x-micbias-vg = <1>;          /* 2.0V */
 524                 status = "okay";
 525
 526                 /* Regulators */
 527                 AVDD-supply = <&evm_3v3_sw>;
 528                 IOVDD-supply = <&evm_3v3_sw>;
 529                 DRVDD-supply = <&evm_3v3_sw>;
 530                 DVDD-supply = <&aic_dvdd>;
 531         };
 532 };
 533
 534 &i2c2 {
 535         status = "okay";
 536         pinctrl-names = "default";
 537         pinctrl-0 = <&i2c2_pins>;
 538         clock-frequency = <400000>;
 539
 540         pcf_hdmi: gpio@26 {
 541                 compatible = "nxp,pcf8575";
 542                 reg = <0x26>;
 543                 lines-initial-states = <0xffeb>;
 544                 gpio-controller;
 545                 #gpio-cells = <2>;
 546         };
 547
 548         ov10633@37 {
 549                 compatible = "ovti,ov10633";
 550                 reg = <0x37>;
 551
 552                 mux-gpios = <&pcf_hdmi 3        GPIO_ACTIVE_LOW>; /* CAM_FPD_MUX_S0 */
 553                 port {
 554                         onboardLI: endpoint {
 555                                 remote-endpoint = <&vin1a>;
 556                                 hsync-active = <1>;
 557                                 vsync-active = <1>;
 558                                 pclk-sample = <1>;
 559                         };
 560                 };
 561         };
 562 };
 563
 564 &i2c3 {
 565         status = "okay";
 566         clock-frequency = <3400000>;
 567 };
 568
 569 &mcspi1 {
 570         status = "okay";
 571 };
 572
 573 &mcspi2 {
 574         status = "okay";
 575 };
 576
 577 &uart1 {
 578         status = "okay";
 579         interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH
 580                                &dra7_pmx_core 0x3e0>;
 581 };
 582
 583 &uart2 {
 584         status = "okay";
 585 };
 586
 587 &uart3 {
 588         status = "okay";
 589         gpios = <&pcf_gpio_21 14 GPIO_ACTIVE_LOW>;
 590 };
 591
 592 &mmc1 {
 593         status = "okay";
 594         pbias-supply = <&pbias_mmc_reg>;
 595         vmmc-supply = <&evm_3v3_sd>;
 596         vmmc_aux-supply = <&ldo1_reg>;
 597         bus-width = <4>;
 598         /*
 599          * SDCD signal is not being used here - using the fact that GPIO mode
 600          * is always hardwired.
 601          */
 602         cd-gpios = <&gpio6 27 0>;
 603         pinctrl-names = "default", "hs";
 604         pinctrl-0 = <&mmc1_pins_default>;
 605         pinctrl-1 = <&mmc1_pins_hs>;
 606 };
 607
 608 &mmc2 {
 609         status = "okay";
 610         vmmc-supply = <&evm_3v3_sw>;
 611         bus-width = <8>;
 612         pinctrl-names = "default", "hs";
 613         pinctrl-0 = <&mmc2_pins_default>;
 614         pinctrl-1 = <&mmc2_pins_hs>;
 615 };
 616
 617 &mmc4 {
 618         status = "okay";
 619         vmmc-supply = <&vmmcwl_fixed>;
 620         bus-width = <4>;
 621         cap-power-off-card;
 622         keep-power-in-suspend;
 623         ti,non-removable;
 624
 625         #address-cells = <1>;
 626         #size-cells = <0>;
 627         wlcore: wlcore@0 {
 628                 compatible = "ti,wlcore";
 629                 reg = <2>;
 630                 interrupt-parent = <&gpio5>;
 631                 interrupts = <7 IRQ_TYPE_NONE>;
 632                 platform-quirks = <1>;
 633         };
 634 };
 635
 636 &cpu0 {
 637         cpu0-voltdm = <&voltdm_mpu>;
 638         voltage-tolerance = <1>;
 639 };
 640
 641 &voltdm_mpu {
 642         vdd-supply = <&smps123_reg>;
 643 };
 644
 645 &voltdm_dspeve {
 646         vdd-supply = <&smps45_reg>;
 647 };
 648
 649 &voltdm_gpu {
 650         vdd-supply = <&smps6_reg>;
 651 };
 652
 653 &voltdm_ivahd {
 654         vdd-supply = <&smps8_reg>;
 655 };
 656
 657 &voltdm_core {
 658         vdd-supply = <&smps7_reg>;
 659 };
 660
 661 &qspi {
 662         status = "okay";
 663
 664         spi-max-frequency = <48000000>;
 665         m25p80@0 {
 666                 compatible = "s25fl256s1";
 667                 spi-max-frequency = <48000000>;
 668                 reg = <0>;
 669                 spi-tx-bus-width = <1>;
 670                 spi-rx-bus-width = <4>;
 671                 spi-cpol;
 672                 spi-cpha;
 673                 #address-cells = <1>;
 674                 #size-cells = <1>;
 675
 676                 /* MTD partition table.
 677                  * The ROM checks the first four physical blocks
 678                  * for a valid file to boot and the flash here is
 679                  * 64KiB block size.
 680                  */
 681                 partition@0 {
 682                         label = "QSPI.SPL";
 683                         reg = <0x00000000 0x000010000>;
 684                 };
 685                 partition@1 {
 686                         label = "QSPI.SPL.backup1";
 687                         reg = <0x00010000 0x00010000>;
 688                 };
 689                 partition@2 {
 690                         label = "QSPI.SPL.backup2";
 691                         reg = <0x00020000 0x00010000>;
 692                 };
 693                 partition@3 {
 694                         label = "QSPI.SPL.backup3";
 695                         reg = <0x00030000 0x00010000>;
 696                 };
 697                 partition@4 {
 698                         label = "QSPI.u-boot";
 699                         reg = <0x00040000 0x00100000>;
 700                 };
 701                 partition@5 {
 702                         label = "QSPI.u-boot-spl-os";
 703                         reg = <0x00140000 0x00080000>;
 704                 };
 705                 partition@6 {
 706                         label = "QSPI.u-boot-env";
 707                         reg = <0x001c0000 0x00010000>;
 708                 };
 709                 partition@7 {
 710                         label = "QSPI.u-boot-env.backup1";
 711                         reg = <0x001d0000 0x0010000>;
 712                 };
 713                 partition@8 {
 714                         label = "QSPI.kernel";
 715                         reg = <0x001e0000 0x0800000>;
 716                 };
 717                 partition@9 {
 718                         label = "QSPI.file-system";
 719                         reg = <0x009e0000 0x01620000>;
 720                 };
 721         };
 722 };
 723
 724 &omap_dwc3_1 {
 725         extcon = <&extcon1>;
 726 };
 727
 728 &omap_dwc3_2 {
 729         extcon = <&extcon2>;
 730 };
 731
 732 &usb1 {
 733         dr_mode = "peripheral";
 734 };
 735
 736 &usb2 {
 737         dr_mode = "host";
 738 };
 739
 740 &mac {
 741         status = "okay";
 742         dual_emac;
 743 };
 744
 745 &cpsw_emac0 {
 746         phy_id = <&davinci_mdio>, <2>;
 747         phy-mode = "rgmii";
 748         dual_emac_res_vlan = <1>;
 749 };
 750
 751 &cpsw_emac1 {
 752         phy_id = <&davinci_mdio>, <3>;
 753         phy-mode = "rgmii";
 754         dual_emac_res_vlan = <2>;
 755 };
 756
 757 &elm {
 758         status = "okay";
 759 };
 760
 761 &gpmc {
 762         status = "disabled";
 763         ranges = <0 0 0 0x01000000>;    /* minimum GPMC partition = 16MB */
 764         nand@0,0 {
 765                 reg = <0 0 4>;          /* device IO registers */
 766                 ti,nand-ecc-opt = "bch8";
 767                 ti,elm-id = <&elm>;
 768                 nand-bus-width = <16>;
 769                 gpmc,device-width = <2>;
 770                 gpmc,sync-clk-ps = <0>;
 771                 gpmc,cs-on-ns = <0>;
 772                 gpmc,cs-rd-off-ns = <80>;
 773                 gpmc,cs-wr-off-ns = <80>;
 774                 gpmc,adv-on-ns = <0>;
 775                 gpmc,adv-rd-off-ns = <60>;
 776                 gpmc,adv-wr-off-ns = <60>;
 777                 gpmc,we-on-ns = <10>;
 778                 gpmc,we-off-ns = <50>;
 779                 gpmc,oe-on-ns = <4>;
 780                 gpmc,oe-off-ns = <40>;
 781                 gpmc,access-ns = <40>;
 782                 gpmc,wr-access-ns = <80>;
 783                 gpmc,rd-cycle-ns = <80>;
 784                 gpmc,wr-cycle-ns = <80>;
 785                 gpmc,bus-turnaround-ns = <0>;
 786                 gpmc,cycle2cycle-delay-ns = <0>;
 787                 gpmc,clk-activation-ns = <0>;
 788                 gpmc,wait-monitoring-ns = <0>;
 789                 gpmc,wr-data-mux-bus-ns = <0>;
 790                 /* MTD partition table */
 791                 /* All SPL-* partitions are sized to minimal length
 792                  * which can be independently programmable. For
 793                  * NAND flash this is equal to size of erase-block */
 794                 #address-cells = <1>;
 795                 #size-cells = <1>;
 796                 partition@0 {
 797                         label = "NAND.SPL";
 798                         reg = <0x00000000 0x000020000>;
 799                 };
 800                 partition@1 {
 801                         label = "NAND.SPL.backup1";
 802                         reg = <0x00020000 0x00020000>;
 803                 };
 804                 partition@2 {
 805                         label = "NAND.SPL.backup2";
 806                         reg = <0x00040000 0x00020000>;
 807                 };
 808                 partition@3 {
 809                         label = "NAND.SPL.backup3";
 810                         reg = <0x00060000 0x00020000>;
 811                 };
 812                 partition@4 {
 813                         label = "NAND.u-boot-spl-os";
 814                         reg = <0x00080000 0x00040000>;
 815                 };
 816                 partition@5 {
 817                         label = "NAND.u-boot";
 818                         reg = <0x000c0000 0x00100000>;
 819                 };
 820                 partition@6 {
 821                         label = "NAND.u-boot-env";
 822                         reg = <0x001c0000 0x00020000>;
 823                 };
 824                 partition@7 {
 825                         label = "NAND.u-boot-env.backup1";
 826                         reg = <0x001e0000 0x00020000>;
 827                 };
 828                 partition@8 {
 829                         label = "NAND.kernel";
 830                         reg = <0x00200000 0x00800000>;
 831                 };
 832                 partition@9 {
 833                         label = "NAND.file-system";
 834                         reg = <0x00a00000 0x0f600000>;
 835                 };
 836         };
 837 };
 838
 839 &gpio7 {
 840         ti,no-reset-on-init;
 841         ti,no-idle-on-init;
 842 };
 843
 844 &dss {
 845         status = "ok";
 846
 847         vdda_video-supply = <&ldoln_reg>;
 848 };
 849
 850 &hdmi {
 851         status = "ok";
 852         vdda-supply = <&ldo3_reg>;
 853
 854         port {
 855                 hdmi_out: endpoint {
 856                         remote-endpoint = <&tpd12s015_in>;
 857                 };
 858         };
 859 };
 860
 861 &dcan1 {
 862         status = "ok";
 863         pinctrl-names = "default", "sleep";
 864         pinctrl-0 = <&dcan1_pins_default>;
 865         pinctrl-1 = <&dcan1_pins_sleep>;
 866 };
 867
 868 &mailbox5 {
 869         status = "okay";
 870         mbox_ipu1_legacy: mbox_ipu1_legacy {
 871                 status = "okay";
 872         };
 873         mbox_dsp1_legacy: mbox_dsp1_legacy {
 874                 status = "okay";
 875         };
 876 };
 877
 878 &mailbox6 {
 879         status = "okay";
 880         mbox_ipu2_legacy: mbox_ipu2_legacy {
 881                 status = "okay";
 882         };
 883         mbox_dsp2_legacy: mbox_dsp2_legacy {
 884                 status = "okay";
 885         };
 886 };
 887
 888 &mmu0_dsp1 {
 889         status = "okay";
 890 };
 891
 892 &mmu1_dsp1 {
 893         status = "okay";
 894 };
 895
 896 &mmu0_dsp2 {
 897         status = "okay";
 898 };
 899
 900 &mmu1_dsp2 {
 901         status = "okay";
 902 };
 903
 904 &mmu_ipu1 {
 905         status = "okay";
 906 };
 907
 908 &mmu_ipu2 {
 909         status = "okay";
 910 };
 911
 912 &ipu2 {
 913         status = "okay";
 914         memory-region = <&ipu2_cma_pool>;
 915         mboxes = <&mailbox6 &mbox_ipu2_legacy>;
 916         timers = <&timer3>;
 917         watchdog-timers = <&timer4>, <&timer9>;
 918 };
 919
 920 &ipu1 {
 921         status = "okay";
 922         memory-region = <&ipu1_cma_pool>;
 923         mboxes = <&mailbox5 &mbox_ipu1_legacy>;
 924         timers = <&timer11>;
 925 };
 926
 927 &dsp1 {
 928         status = "okay";
 929         memory-region = <&dsp1_cma_pool>;
 930         mboxes = <&mailbox5 &mbox_dsp1_legacy>;
 931         timers = <&timer5>;
 932 };
 933
 934 &dsp2 {
 935         status = "okay";
 936         memory-region = <&dsp2_cma_pool>;
 937         mboxes = <&mailbox6 &mbox_dsp2_legacy>;
 938         timers = <&timer6>;
 939 };
 940
 941 &atl {
 942         status = "okay";
 943
 944         atl1 {
 945                 bws = <DRA7_ATL_WS_MCASP2_FSX>;
 946                 aws = <DRA7_ATL_WS_MCASP6_FSX>;
 947         };
 948
 949         atl2 {
 950                 bws = <DRA7_ATL_WS_MCASP2_FSX>;
 951                 aws = <DRA7_ATL_WS_MCASP3_FSX>;
 952         };
 953 };
 954
 955 &mcasp2 {
 956         fck_parent = "atl_clkin2_ck";
 957
 958         status = "okay";
 959
 960         op-mode = <0>;  /* MCASP_IIS_MODE */
 961         tdm-slots = <2>;
 962         /* 8 serializer */
 963         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
 964                 1 1 1 1 1 1 1 1
 965         >;
 966 };
 967
 968 &mcasp3 {
 969         fck_parent = "atl_clkin2_ck";
 970
 971         status = "okay";
 972
 973         op-mode = <0>;          /* MCASP_IIS_MODE */
 974         tdm-slots = <2>;
 975         /* 4 serializer */
 976         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
 977                 1 2 0 0
 978         >;
 979 };
 980
 981 &mcasp6 {
 982         fck_parent = "atl_clkin1_ck";
 983
 984         status = "okay";
 985
 986         op-mode = <0>;  /* MCASP_IIS_MODE */
 987         tdm-slots = <8>;
 988         /* 4 serializer */
 989         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
 990                 1 2 0 0
 991         >;
 992         tx-num-evt = <8>;
 993         rx-num-evt = <8>;
 994 };
 995
 996 &usb2_phy1 {
 997         phy-supply = <&ldousb_reg>;
 998 };
 999
1000 &usb2_phy2 {
1001         phy-supply = <&ldousb_reg>;
1002 };
1003
1004 &vip1 {
1005         status = "okay";
1006 };
1007
1008 &vin1a {
1009         endpoint@0 {
1010                 slave-mode;
1011                 remote-endpoint = <&onboardLI>;
1012         };
1013 };