1 /*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8 /dts-v1/;
10 #include "dra72x.dtsi"
12 / {
13 model = "TI DRA722";
14 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x40000000>; /* 1024 MB */
19 };
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges;
26 ipu2_cma_pool: ipu2_cma@95800000 {
27 compatible = "shared-dma-pool";
28 reg = <0x95800000 0x3800000>;
29 reusable;
30 status = "okay";
31 };
33 dsp1_cma_pool: dsp1_cma@99000000 {
34 compatible = "shared-dma-pool";
35 reg = <0x99000000 0x4000000>;
36 reusable;
37 status = "okay";
38 };
40 ipu1_cma_pool: ipu1_cma@9d000000 {
41 compatible = "shared-dma-pool";
42 reg = <0x9d000000 0x2000000>;
43 reusable;
44 status = "okay";
45 };
46 };
48 evm_3v3: fixedregulator-evm_3v3 {
49 compatible = "regulator-fixed";
50 regulator-name = "evm_3v3";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 };
54 };
56 &dra7_pmx_core {
57 i2c1_pins: pinmux_i2c1_pins {
58 pinctrl-single,pins = <
59 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
60 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
61 >;
62 };
64 tps65917_pins_default: tps65917_pins_default {
65 pinctrl-single,pins = <
66 0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
67 >;
68 };
69 };
71 &i2c1 {
72 status = "okay";
73 pinctrl-names = "default";
74 pinctrl-0 = <&i2c1_pins>;
75 clock-frequency = <400000>;
77 tps65917: tps65917@58 {
78 compatible = "ti,tps65917";
79 reg = <0x58>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&tps65917_pins_default>;
83 interrupts-extended = <&gic GIC_SPI 2 IRQ_TYPE_NONE
84 &dra7_pmx_core 0x424>;
85 interrupt-parent = <&gic>;
86 interrupt-controller;
87 #interrupt-cells = <2>;
89 ti,system-power-controller;
91 tps65917_pmic {
92 compatible = "ti,tps65917-pmic";
94 regulators {
95 smps1_reg: smps1 {
96 /* VDD_MPU */
97 regulator-name = "smps1";
98 regulator-min-microvolt = <850000>;
99 regulator-max-microvolt = <1250000>;
100 regulator-always-on;
101 regulator-boot-on;
102 };
104 smps2_reg: smps2 {
105 /* VDD_CORE */
106 regulator-name = "smps2";
107 regulator-min-microvolt = <850000>;
108 regulator-max-microvolt = <1060000>;
109 regulator-boot-on;
110 regulator-always-on;
111 };
113 smps3_reg: smps3 {
114 /* VDD_GPU IVA DSPEVE */
115 regulator-name = "smps3";
116 regulator-min-microvolt = <850000>;
117 regulator-max-microvolt = <1250000>;
118 regulator-boot-on;
119 regulator-always-on;
120 };
122 smps4_reg: smps4 {
123 /* VDDS1V8 */
124 regulator-name = "smps4";
125 regulator-min-microvolt = <1800000>;
126 regulator-max-microvolt = <1800000>;
127 regulator-always-on;
128 regulator-boot-on;
129 };
131 smps5_reg: smps5 {
132 /* VDD_DDR */
133 regulator-name = "smps5";
134 regulator-min-microvolt = <1350000>;
135 regulator-max-microvolt = <1350000>;
136 regulator-boot-on;
137 regulator-always-on;
138 };
140 ldo1_reg: ldo1 {
141 /* LDO1_OUT --> SDIO */
142 regulator-name = "ldo1";
143 regulator-min-microvolt = <1800000>;
144 regulator-max-microvolt = <3300000>;
145 regulator-boot-on;
146 };
148 ldo2_reg: ldo2 {
149 /* LDO2_OUT --> TP1017 (UNUSED) */
150 regulator-name = "ldo2";
151 regulator-min-microvolt = <1800000>;
152 regulator-max-microvolt = <3300000>;
153 };
155 ldo3_reg: ldo3 {
156 /* VDDA_1V8_PHY */
157 regulator-name = "ldo3";
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <1800000>;
160 regulator-boot-on;
161 regulator-always-on;
162 };
164 ldo5_reg: ldo5 {
165 /* VDDA_1V8_PLL */
166 regulator-name = "ldo5";
167 regulator-min-microvolt = <1800000>;
168 regulator-max-microvolt = <1800000>;
169 regulator-always-on;
170 regulator-boot-on;
171 };
173 ldo4_reg: ldo4 {
174 /* VDDA_3V_USB: VDDA_USBHS33 */
175 regulator-name = "ldo4";
176 regulator-min-microvolt = <3300000>;
177 regulator-max-microvolt = <3300000>;
178 regulator-boot-on;
179 };
180 };
181 };
182 };
183 };
185 &uart1 {
186 status = "okay";
187 };
189 &mmc1 {
190 /* Using default configured pins */
191 status = "okay";
192 vmmc-supply = <&ldo1_reg>;
193 bus-width = <4>;
194 /*
195 * SDCD signal is not being used here - using the fact that GPIO mode
196 * is always hardwired.
197 */
198 cd-gpios = <&gpio6 27 0>;
199 };
201 &mmc2 {
202 /* Using default configured pins */
203 status = "okay";
204 vmmc-supply = <&evm_3v3>;
205 bus-width = <8>;
206 ti,non-removable;
207 };
209 &mailbox5 {
210 status = "okay";
211 mbox_ipu1_legacy: mbox_ipu1_legacy {
212 status = "okay";
213 };
214 mbox_dsp1_legacy: mbox_dsp1_legacy {
215 status = "okay";
216 };
217 };
219 &mailbox6 {
220 status = "okay";
221 mbox_ipu2_legacy: mbox_ipu2_legacy {
222 status = "okay";
223 };
224 };
226 &mmu0_dsp1 {
227 status = "okay";
228 };
230 &mmu1_dsp1 {
231 status = "okay";
232 };
234 &mmu_ipu1 {
235 status = "okay";
236 };
238 &mmu_ipu2 {
239 status = "okay";
240 };
242 &ipu2 {
243 status = "okay";
244 memory-region = <&ipu2_cma_pool>;
245 mboxes = <&mailbox6 &mbox_ipu2_legacy>;
246 timers = <&timer3>;
247 watchdog-timers = <&timer4>, <&timer9>;
248 };
250 &ipu1 {
251 status = "okay";
252 memory-region = <&ipu1_cma_pool>;
253 mboxes = <&mailbox5 &mbox_ipu1_legacy>;
254 timers = <&timer11>;
255 watchdog-timers = <&timer7>, <&timer8>;
256 };
258 &dsp1 {
259 status = "okay";
260 memory-region = <&dsp1_cma_pool>;
261 mboxes = <&mailbox5 &mbox_dsp1_legacy>;
262 timers = <&timer5>;
263 watchdog-timers = <&timer10>;
264 };