arm: dtsi: jamr3: Adjusting DSP SR0 range
[android-sdk/kernel-video.git] / arch / arm / boot / dts / dra7xx-jamr3.dtsi
1 /*
2  * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
9 #include <dt-bindings/clk/ti-dra7-atl.h>
11 / {
12         jamr3_sound {
13                 compatible = "ti,dra7xx-jamr3-snd";
14                 ti,model = "DRA7xx-JAMR3";
15                 ti,always-on;
16                 clocks = <&atl_clkin1_ck>;
17                 clock-names = "ti,codec-clock";
19                 ti,audio-routing =
20                         "J3A LINE1L",           "JAMR3 Stereo Aux In",
21                         "J3A LINE1R",           "JAMR3 Stereo Aux In",
22                         "J3B LINE1L",           "JAMR3 Mono Mic 1",
23                         "J3B LINE1R",           "JAMR3 Mono Mic 2",
24                         "JAMR3 Line Out 1",     "J3A LLOUT",
25                         "JAMR3 Line Out 1",     "J3A RLOUT",
26                         "JAMR3 Line Out 2",     "J3B LLOUT",
27                         "JAMR3 Line Out 2",     "J3B RLOUT",
28                         "JAMR3 Line Out 3",     "J3C LLOUT",
29                         "JAMR3 Line Out 3",     "J3C RLOUT";
31                 /* DAI link */
32                 ti,mcasp-controller = <&mcasp6>;
33                 ti,audio-codec-a = <&tlv320aic3106a>;
34                 ti,audio-codec-b = <&tlv320aic3106b>;
35                 ti,audio-codec-c = <&tlv320aic3106c>;
36                 ti,audio-slots = <8>;
37                 ti,audio-mclk-freq = <11289600>;
38         };
40         dsp_radio: radio {
41                 compatible = "ti,dra7xx_radio";
42                 gpios = <&gpio6 20 0>;
43         };
45         gatemp {
46                 compatible = "hwspinlock-user";
47                 hwlocks = <&hwspinlock 0>,
48                           <&hwspinlock 1>,
49                           <&hwspinlock 2>,
50                           <&hwspinlock 3>,
51                           <&hwspinlock 4>,
52                           <&hwspinlock 5>,
53                           <&hwspinlock 6>,
54                           <&hwspinlock 7>,
55                           <&hwspinlock 8>,
56                           <&hwspinlock 9>;
57         };
59         sr0 {
60                 compatible = "generic-uio";
61                 reg = <0xbfd00000 0x100000>;
62         };
63 };
65 &reserved_mem {
66         /* Required by cmem driver used by radio */
67         cmem_radio: cmem@95400000 {
68                 reg = <0x95400000 0x400000>;
69                 no-map;
70                 status = "okay";
71         };
73         dsp1_sr0: dsp1_sr0@bfb00000 {
74                 reg = <0xbfb00000 0x100000>;
75                 no-map;
76                 status = "okay";
77         };
78 };
80 &atl {
81         atl1 {
82                 bws = <DRA7_ATL_WS_MCASP2_FSX>;
83                 aws = <DRA7_ATL_WS_MCASP6_FSX>;
84         };
85 };
87 &i2c4 {
88         status = "okay";
89         clock-frequency = <400000>;
91         pcf_jamr3_21: pcf8575@21 {
92                 compatible = "nxp,pcf8575";
93                 reg = <0x21>;
94                 gpio-controller;
95                 #gpio-cells = <2>;
96         };
97 };
99 &mcasp2 {
100         fck_parent = "atl_clkin2_ck";
102         status = "okay";
104         op-mode = <0>;  /* MCASP_IIS_MODE */
105         tdm-slots = <2>;
106         /* 8 serializer */
107         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
108                 1 1 1 1 1 1 1 1
109         >;
110         shared-dai;
111 };
113 &mcasp6 {
114         fck_parent = "atl_clkin1_ck";
116         status = "okay";
118         op-mode = <0>;  /* MCASP_IIS_MODE */
119         tdm-slots = <8>;
120         /* 4 serializer */
121         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
122                 1 2 0 0
123         >;
124         tx-num-evt = <8>;
125         rx-num-evt = <8>;
126         shared-dai;
127 };
129 &i2c_p3_exp {
130         tlv320aic3106a: tlv320aic3106@18 {
131                 compatible = "ti,tlv320aic3106";
132                 reg = <0x18>;
133                 adc-settle-ms = <40>;
134                 ai3x-micbias-vg = <1>;  /* 2.0V */
135                 status = "okay";
136                 name-prefix = "J3A";
138                 /* Regulators */
139                 AVDD-supply = <&evm_3v3_sw>;
140                 IOVDD-supply = <&evm_3v3_sw>;
141                 DRVDD-supply = <&evm_3v3_sw>;
142                 DVDD-supply = <&aic_dvdd>;
143         };
145         tlv320aic3106b: tlv320aic3106@19 {
146                 compatible = "ti,tlv320aic3106";
147                 reg = <0x19>;
148                 adc-settle-ms = <40>;
149                 ai3x-micbias-vg = <1>;  /* 2.0V */
150                 status = "okay";
151                 name-prefix = "J3B";
153                 /* Regulators */
154                 AVDD-supply = <&evm_3v3_sw>;
155                 IOVDD-supply = <&evm_3v3_sw>;
156                 DRVDD-supply = <&evm_3v3_sw>;
157                 DVDD-supply = <&aic_dvdd>;
158         };
160         tlv320aic3106c: tlv320aic3106@1a {
161                 compatible = "ti,tlv320aic3106";
162                 reg = <0x1a>;
163                 adc-settle-ms = <40>;
164                 ai3x-micbias-vg = <1>;  /* 2.0V */
165                 status = "okay";
166                 name-prefix = "J3C";
168                 /* Regulators */
169                 AVDD-supply = <&evm_3v3_sw>;
170                 IOVDD-supply = <&evm_3v3_sw>;
171                 DRVDD-supply = <&evm_3v3_sw>;
172                 DVDD-supply = <&aic_dvdd>;
173         };
175         tvp_5158: tvp5158@58 {
176                 compatible= "ti,tvp5158";
177                 reg = <0x58>;
179                 port {
180                         tvp_decoder: endpoint@0 {
181                                 pclk-sample = <0>;
182                                 channels = <0 2 4 6>;
183                         };
184                 };
185         };
186 };
188 &video_in {
189         endpoint {
190                 slave-mode;
191                 remote-endpoint = <&tvp_decoder>;
192         };
193 };