1 /*
2 * Device Tree Source for the r8a7740 SoC
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
11 /include/ "skeleton.dtsi"
13 #include <dt-bindings/interrupt-controller/irq.h>
15 / {
16 compatible = "renesas,r8a7740";
18 cpus {
19 #address-cells = <1>;
20 #size-cells = <0>;
21 cpu@0 {
22 compatible = "arm,cortex-a9";
23 device_type = "cpu";
24 reg = <0x0>;
25 };
26 };
28 gic: interrupt-controller@c2800000 {
29 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>;
31 #address-cells = <1>;
32 interrupt-controller;
33 reg = <0xc2800000 0x1000>,
34 <0xc2000000 0x1000>;
35 };
37 pmu {
38 compatible = "arm,cortex-a9-pmu";
39 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
40 };
42 /* irqpin0: IRQ0 - IRQ7 */
43 irqpin0: irqpin@e6900000 {
44 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
45 #interrupt-cells = <2>;
46 interrupt-controller;
47 reg = <0xe6900000 4>,
48 <0xe6900010 4>,
49 <0xe6900020 1>,
50 <0xe6900040 1>,
51 <0xe6900060 1>;
52 interrupt-parent = <&gic>;
53 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
54 0 149 IRQ_TYPE_LEVEL_HIGH
55 0 149 IRQ_TYPE_LEVEL_HIGH
56 0 149 IRQ_TYPE_LEVEL_HIGH
57 0 149 IRQ_TYPE_LEVEL_HIGH
58 0 149 IRQ_TYPE_LEVEL_HIGH
59 0 149 IRQ_TYPE_LEVEL_HIGH
60 0 149 IRQ_TYPE_LEVEL_HIGH>;
61 };
63 /* irqpin1: IRQ8 - IRQ15 */
64 irqpin1: irqpin@e6900004 {
65 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
66 #interrupt-cells = <2>;
67 interrupt-controller;
68 reg = <0xe6900004 4>,
69 <0xe6900014 4>,
70 <0xe6900024 1>,
71 <0xe6900044 1>,
72 <0xe6900064 1>;
73 interrupt-parent = <&gic>;
74 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
75 0 149 IRQ_TYPE_LEVEL_HIGH
76 0 149 IRQ_TYPE_LEVEL_HIGH
77 0 149 IRQ_TYPE_LEVEL_HIGH
78 0 149 IRQ_TYPE_LEVEL_HIGH
79 0 149 IRQ_TYPE_LEVEL_HIGH
80 0 149 IRQ_TYPE_LEVEL_HIGH
81 0 149 IRQ_TYPE_LEVEL_HIGH>;
82 };
84 /* irqpin2: IRQ16 - IRQ23 */
85 irqpin2: irqpin@e6900008 {
86 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
87 #interrupt-cells = <2>;
88 interrupt-controller;
89 reg = <0xe6900008 4>,
90 <0xe6900018 4>,
91 <0xe6900028 1>,
92 <0xe6900048 1>,
93 <0xe6900068 1>;
94 interrupt-parent = <&gic>;
95 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
96 0 149 IRQ_TYPE_LEVEL_HIGH
97 0 149 IRQ_TYPE_LEVEL_HIGH
98 0 149 IRQ_TYPE_LEVEL_HIGH
99 0 149 IRQ_TYPE_LEVEL_HIGH
100 0 149 IRQ_TYPE_LEVEL_HIGH
101 0 149 IRQ_TYPE_LEVEL_HIGH
102 0 149 IRQ_TYPE_LEVEL_HIGH>;
103 };
105 /* irqpin3: IRQ24 - IRQ31 */
106 irqpin3: irqpin@e690000c {
107 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
108 #interrupt-cells = <2>;
109 interrupt-controller;
110 reg = <0xe690000c 4>,
111 <0xe690001c 4>,
112 <0xe690002c 1>,
113 <0xe690004c 1>,
114 <0xe690006c 1>;
115 interrupt-parent = <&gic>;
116 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
117 0 149 IRQ_TYPE_LEVEL_HIGH
118 0 149 IRQ_TYPE_LEVEL_HIGH
119 0 149 IRQ_TYPE_LEVEL_HIGH
120 0 149 IRQ_TYPE_LEVEL_HIGH
121 0 149 IRQ_TYPE_LEVEL_HIGH
122 0 149 IRQ_TYPE_LEVEL_HIGH
123 0 149 IRQ_TYPE_LEVEL_HIGH>;
124 };
126 i2c0: i2c@fff20000 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 compatible = "renesas,rmobile-iic";
130 reg = <0xfff20000 0x425>;
131 interrupt-parent = <&gic>;
132 interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
133 0 202 IRQ_TYPE_LEVEL_HIGH
134 0 203 IRQ_TYPE_LEVEL_HIGH
135 0 204 IRQ_TYPE_LEVEL_HIGH>;
136 status = "disabled";
137 };
139 i2c1: i2c@e6c20000 {
140 #address-cells = <1>;
141 #size-cells = <0>;
142 compatible = "renesas,rmobile-iic";
143 reg = <0xe6c20000 0x425>;
144 interrupt-parent = <&gic>;
145 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
146 0 71 IRQ_TYPE_LEVEL_HIGH
147 0 72 IRQ_TYPE_LEVEL_HIGH
148 0 73 IRQ_TYPE_LEVEL_HIGH>;
149 status = "disabled";
150 };
152 pfc: pfc@e6050000 {
153 compatible = "renesas,pfc-r8a7740";
154 reg = <0xe6050000 0x8000>,
155 <0xe605800c 0x20>;
156 gpio-controller;
157 #gpio-cells = <2>;
158 interrupts-extended =
159 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
160 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
161 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
162 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
163 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
164 <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
165 <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
166 <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
167 };
169 tpu: pwm@e6600000 {
170 compatible = "renesas,tpu-r8a7740", "renesas,tpu";
171 reg = <0xe6600000 0x100>;
172 status = "disabled";
173 #pwm-cells = <3>;
174 };
176 mmcif0: mmc@e6bd0000 {
177 compatible = "renesas,sh-mmcif";
178 reg = <0xe6bd0000 0x100>;
179 interrupt-parent = <&gic>;
180 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
181 0 57 IRQ_TYPE_LEVEL_HIGH>;
182 status = "disabled";
183 };
185 sdhi0: sd@e6850000 {
186 compatible = "renesas,sdhi-r8a7740";
187 reg = <0xe6850000 0x100>;
188 interrupt-parent = <&gic>;
189 interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
190 0 118 IRQ_TYPE_LEVEL_HIGH
191 0 119 IRQ_TYPE_LEVEL_HIGH>;
192 cap-sd-highspeed;
193 cap-sdio-irq;
194 status = "disabled";
195 };
197 sdhi1: sd@e6860000 {
198 compatible = "renesas,sdhi-r8a7740";
199 reg = <0xe6860000 0x100>;
200 interrupt-parent = <&gic>;
201 interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
202 0 122 IRQ_TYPE_LEVEL_HIGH
203 0 123 IRQ_TYPE_LEVEL_HIGH>;
204 cap-sd-highspeed;
205 cap-sdio-irq;
206 status = "disabled";
207 };
209 sdhi2: sd@e6870000 {
210 compatible = "renesas,sdhi-r8a7740";
211 reg = <0xe6870000 0x100>;
212 interrupt-parent = <&gic>;
213 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
214 0 126 IRQ_TYPE_LEVEL_HIGH
215 0 127 IRQ_TYPE_LEVEL_HIGH>;
216 cap-sd-highspeed;
217 cap-sdio-irq;
218 status = "disabled";
219 };
221 sh_fsi2: sound@fe1f0000 {
222 #sound-dai-cells = <1>;
223 compatible = "renesas,sh_fsi2";
224 reg = <0xfe1f0000 0x400>;
225 interrupt-parent = <&gic>;
226 interrupts = <0 9 0x4>;
227 status = "disabled";
228 };
229 };