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ARM: dts: DRA7: enabling optional clks in DT
[android-sdk/kernel-video.git] / arch / arm / boot / dts / spear1340.dtsi
1 /*
2  * DTS file for all SPEAr1340 SoCs
3  *
4  * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5  *
6  * The code contained herein is licensed under the GNU General Public
7  * License. You may obtain a copy of the GNU General Public License
8  * Version 2 or later at the following locations:
9  *
10  * http://www.opensource.org/licenses/gpl-license.html
11  * http://www.gnu.org/copyleft/gpl.html
12  */
14 /include/ "spear13xx.dtsi"
16 / {
17         compatible = "st,spear1340";
19         ahb {
21                 spics: spics@e0700000{
22                         compatible = "st,spear-spics-gpio";
23                         reg = <0xe0700000 0x1000>;
24                         st-spics,peripcfg-reg = <0x42c>;
25                         st-spics,sw-enable-bit = <21>;
26                         st-spics,cs-value-bit = <20>;
27                         st-spics,cs-enable-mask = <3>;
28                         st-spics,cs-enable-shift = <18>;
29                         gpio-controller;
30                         #gpio-cells = <2>;
31                         status = "disabled";
32                 };
34                 ahci@b1000000 {
35                         compatible = "snps,spear-ahci";
36                         reg = <0xb1000000 0x10000>;
37                         interrupts = <0 72 0x4>;
38                         status = "disabled";
39                 };
41                 i2s-play@b2400000 {
42                         compatible = "snps,designware-i2s";
43                         reg = <0xb2400000 0x10000>;
44                         interrupt-names = "play_irq";
45                         interrupts = <0 98 0x4
46                                       0 99 0x4>;
47                         play;
48                         channel = <8>;
49                         status = "disabled";
50                 };
52                 i2s-rec@b2000000 {
53                         compatible = "snps,designware-i2s";
54                         reg = <0xb2000000 0x10000>;
55                         interrupt-names = "record_irq";
56                         interrupts = <0 100  0x4
57                                       0 101 0x4>;
58                         record;
59                         channel = <8>;
60                         status = "disabled";
61                 };
63                 pinmux: pinmux@e0700000 {
64                         compatible = "st,spear1340-pinmux";
65                         reg = <0xe0700000 0x1000>;
66                         #gpio-range-cells = <3>;
67                 };
69                 pwm: pwm@e0180000 {
70                         compatible ="st,spear13xx-pwm";
71                         reg = <0xe0180000 0x1000>;
72                         #pwm-cells = <2>;
73                         status = "disabled";
74                 };
76                 spdif-in@d0100000 {
77                         compatible = "st,spdif-in";
78                         reg = < 0xd0100000 0x20000
79                                 0xd0110000 0x10000 >;
80                         interrupts = <0 84 0x4>;
81                         status = "disabled";
82                 };
84                 spdif-out@d0000000 {
85                         compatible = "st,spdif-out";
86                         reg = <0xd0000000 0x20000>;
87                         interrupts = <0 85 0x4>;
88                         status = "disabled";
89                 };
91                 spi1: spi@5d400000 {
92                         compatible = "arm,pl022", "arm,primecell";
93                         reg = <0x5d400000 0x1000>;
94                         #address-cells = <1>;
95                         #size-cells = <0>;
96                         interrupts = <0 99 0x4>;
97                         status = "disabled";
98                 };
100                 apb {
101                         i2c1: i2c@b4000000 {
102                                 #address-cells = <1>;
103                                 #size-cells = <0>;
104                                 compatible = "snps,designware-i2c";
105                                 reg = <0xb4000000 0x1000>;
106                                 interrupts = <0 104 0x4>;
107                                 write-16bit;
108                                 status = "disabled";
109                         };
111                         serial@b4100000 {
112                                 compatible = "arm,pl011", "arm,primecell";
113                                 reg = <0xb4100000 0x1000>;
114                                 interrupts = <0 105 0x4>;
115                                 status = "disabled";
116                                 dmas = <&dwdma0 0x600 0 0 1>, /* 0xC << 11 */
117                                         <&dwdma0 0x680 0 1 0>; /* 0xD << 7 */
118                                 dma-names = "tx", "rx";
119                         };
121                         thermal@e07008c4 {
122                                 st,thermal-flags = <0x2a00>;
123                         };
125                         gpiopinctrl: gpio@e2800000 {
126                                 compatible = "st,spear-plgpio";
127                                 reg = <0xe2800000 0x1000>;
128                                 interrupts = <0 107 0x4>;
129                                 #interrupt-cells = <1>;
130                                 interrupt-controller;
131                                 gpio-controller;
132                                 #gpio-cells = <2>;
133                                 gpio-ranges = <&pinmux 0 0 252>;
134                                 status = "disabled";
136                                 st-plgpio,ngpio = <250>;
137                                 st-plgpio,wdata-reg = <0x40>;
138                                 st-plgpio,dir-reg = <0x00>;
139                                 st-plgpio,ie-reg = <0x80>;
140                                 st-plgpio,rdata-reg = <0x20>;
141                                 st-plgpio,mis-reg = <0xa0>;
142                                 st-plgpio,eit-reg = <0x60>;
143                         };
144                 };
145         };
146 };