arch/arm/mach-davinci/board-dm646x-evm.c

   1 /*
   2  * TI DaVinci DM646X EVM board
   3  *
   4  * Derived from: arch/arm/mach-davinci/board-evm.c
   5  * Copyright (C) 2006 Texas Instruments.
   6  *
   7  * (C) 2007-2008, MontaVista Software, Inc.
   8  *
   9  * This file is licensed under the terms of the GNU General Public License
  10  * version 2. This program is licensed "as is" without any warranty of any
  11  * kind, whether express or implied.
  12  *
  13  */
  14
  15 /**************************************************************************
  16  * Included Files
  17  **************************************************************************/
  18
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/leds.h>
  22 #include <linux/gpio.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/i2c.h>
  25 #include <linux/i2c/at24.h>
  26 #include <linux/i2c/pcf857x.h>
  27
  28 #include <media/tvp514x.h>
  29 #include <media/adv7343.h>
  30
  31 #include <linux/mtd/mtd.h>
  32 #include <linux/mtd/nand.h>
  33 #include <linux/mtd/partitions.h>
  34 #include <linux/clk.h>
  35 #include <linux/export.h>
  36
  37 #include <asm/mach-types.h>
  38 #include <asm/mach/arch.h>
  39
  40 #include <mach/common.h>
  41 #include <mach/serial.h>
  42 #include <linux/platform_data/i2c-davinci.h>
  43 #include <linux/platform_data/mtd-davinci.h>
  44 #include <mach/clock.h>
  45 #include <mach/cdce949.h>
  46 #include <linux/platform_data/mtd-davinci-aemif.h>
  47
  48 #include "davinci.h"
  49 #include "clock.h"
  50
  51 #define NAND_BLOCK_SIZE         SZ_128K
  52
  53 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
  54  * and U-Boot environment this avoids dependency on any particular combination
  55  * of UBL, U-Boot or flashing tools etc.
  56  */
  57 static struct mtd_partition davinci_nand_partitions[] = {
  58         {
  59                 /* UBL, U-Boot with environment */
  60                 .name           = "bootloader",
  61                 .offset         = MTDPART_OFS_APPEND,
  62                 .size           = 16 * NAND_BLOCK_SIZE,
  63                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
  64         }, {
  65                 .name           = "kernel",
  66                 .offset         = MTDPART_OFS_APPEND,
  67                 .size           = SZ_4M,
  68                 .mask_flags     = 0,
  69         }, {
  70                 .name           = "filesystem",
  71                 .offset         = MTDPART_OFS_APPEND,
  72                 .size           = MTDPART_SIZ_FULL,
  73                 .mask_flags     = 0,
  74         }
  75 };
  76
  77 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
  78         .wsetup         = 29,
  79         .wstrobe        = 24,
  80         .whold          = 14,
  81         .rsetup         = 19,
  82         .rstrobe        = 33,
  83         .rhold          = 0,
  84         .ta             = 29,
  85 };
  86
  87 static struct davinci_nand_pdata davinci_nand_data = {
  88         .mask_cle               = 0x80000,
  89         .mask_ale               = 0x40000,
  90         .parts                  = davinci_nand_partitions,
  91         .nr_parts               = ARRAY_SIZE(davinci_nand_partitions),
  92         .ecc_mode               = NAND_ECC_HW,
  93         .options                = 0,
  94 };
  95
  96 static struct resource davinci_nand_resources[] = {
  97         {
  98                 .start          = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
  99                 .end            = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
 100                 .flags          = IORESOURCE_MEM,
 101         }, {
 102                 .start          = DM646X_ASYNC_EMIF_CONTROL_BASE,
 103                 .end            = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
 104                 .flags          = IORESOURCE_MEM,
 105         },
 106 };
 107
 108 static struct platform_device davinci_nand_device = {
 109         .name                   = "davinci_nand",
 110         .id                     = 0,
 111
 112         .num_resources          = ARRAY_SIZE(davinci_nand_resources),
 113         .resource               = davinci_nand_resources,
 114
 115         .dev                    = {
 116                 .platform_data  = &davinci_nand_data,
 117         },
 118 };
 119
 120 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
 121     defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
 122 #define HAS_ATA 1
 123 #else
 124 #define HAS_ATA 0
 125 #endif
 126
 127 /* CPLD Register 0 bits to control ATA */
 128 #define DM646X_EVM_ATA_RST              BIT(0)
 129 #define DM646X_EVM_ATA_PWD              BIT(1)
 130
 131 /* CPLD Register 0 Client: used for I/O Control */
 132 static int cpld_reg0_probe(struct i2c_client *client,
 133                            const struct i2c_device_id *id)
 134 {
 135         if (HAS_ATA) {
 136                 u8 data;
 137                 struct i2c_msg msg[2] = {
 138                         {
 139                                 .addr = client->addr,
 140                                 .flags = I2C_M_RD,
 141                                 .len = 1,
 142                                 .buf = &data,
 143                         },
 144                         {
 145                                 .addr = client->addr,
 146                                 .flags = 0,
 147                                 .len = 1,
 148                                 .buf = &data,
 149                         },
 150                 };
 151
 152                 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
 153                 i2c_transfer(client->adapter, msg, 1);
 154                 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
 155                 i2c_transfer(client->adapter, msg + 1, 1);
 156         }
 157
 158         return 0;
 159 }
 160
 161 static const struct i2c_device_id cpld_reg_ids[] = {
 162         { "cpld_reg0", 0, },
 163         { },
 164 };
 165
 166 static struct i2c_driver dm6467evm_cpld_driver = {
 167         .driver.name    = "cpld_reg0",
 168         .id_table       = cpld_reg_ids,
 169         .probe          = cpld_reg0_probe,
 170 };
 171
 172 /* LEDS */
 173
 174 static struct gpio_led evm_leds[] = {
 175         { .name = "DS1", .active_low = 1, },
 176         { .name = "DS2", .active_low = 1, },
 177         { .name = "DS3", .active_low = 1, },
 178         { .name = "DS4", .active_low = 1, },
 179 };
 180
 181 static const struct gpio_led_platform_data evm_led_data = {
 182         .num_leds = ARRAY_SIZE(evm_leds),
 183         .leds     = evm_leds,
 184 };
 185
 186 static struct platform_device *evm_led_dev;
 187
 188 static int evm_led_setup(struct i2c_client *client, int gpio,
 189                         unsigned int ngpio, void *c)
 190 {
 191         struct gpio_led *leds = evm_leds;
 192         int status;
 193
 194         while (ngpio--) {
 195                 leds->gpio = gpio++;
 196                 leds++;
 197         }
 198
 199         evm_led_dev = platform_device_alloc("leds-gpio", 0);
 200         platform_device_add_data(evm_led_dev, &evm_led_data,
 201                                 sizeof(evm_led_data));
 202
 203         evm_led_dev->dev.parent = &client->dev;
 204         status = platform_device_add(evm_led_dev);
 205         if (status < 0) {
 206                 platform_device_put(evm_led_dev);
 207                 evm_led_dev = NULL;
 208         }
 209         return status;
 210 }
 211
 212 static int evm_led_teardown(struct i2c_client *client, int gpio,
 213                                 unsigned ngpio, void *c)
 214 {
 215         if (evm_led_dev) {
 216                 platform_device_unregister(evm_led_dev);
 217                 evm_led_dev = NULL;
 218         }
 219         return 0;
 220 }
 221
 222 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
 223
 224 static int evm_sw_setup(struct i2c_client *client, int gpio,
 225                         unsigned ngpio, void *c)
 226 {
 227         int status;
 228         int i;
 229         char label[10];
 230
 231         for (i = 0; i < 4; ++i) {
 232                 snprintf(label, 10, "user_sw%d", i);
 233                 status = gpio_request(gpio, label);
 234                 if (status)
 235                         goto out_free;
 236                 evm_sw_gpio[i] = gpio++;
 237
 238                 status = gpio_direction_input(evm_sw_gpio[i]);
 239                 if (status) {
 240                         gpio_free(evm_sw_gpio[i]);
 241                         evm_sw_gpio[i] = -EINVAL;
 242                         goto out_free;
 243                 }
 244
 245                 status = gpio_export(evm_sw_gpio[i], 0);
 246                 if (status) {
 247                         gpio_free(evm_sw_gpio[i]);
 248                         evm_sw_gpio[i] = -EINVAL;
 249                         goto out_free;
 250                 }
 251         }
 252         return status;
 253 out_free:
 254         for (i = 0; i < 4; ++i) {
 255                 if (evm_sw_gpio[i] != -EINVAL) {
 256                         gpio_free(evm_sw_gpio[i]);
 257                         evm_sw_gpio[i] = -EINVAL;
 258                 }
 259         }
 260         return status;
 261 }
 262
 263 static int evm_sw_teardown(struct i2c_client *client, int gpio,
 264                         unsigned ngpio, void *c)
 265 {
 266         int i;
 267
 268         for (i = 0; i < 4; ++i) {
 269                 if (evm_sw_gpio[i] != -EINVAL) {
 270                         gpio_unexport(evm_sw_gpio[i]);
 271                         gpio_free(evm_sw_gpio[i]);
 272                         evm_sw_gpio[i] = -EINVAL;
 273                 }
 274         }
 275         return 0;
 276 }
 277
 278 static int evm_pcf_setup(struct i2c_client *client, int gpio,
 279                         unsigned int ngpio, void *c)
 280 {
 281         int status;
 282
 283         if (ngpio < 8)
 284                 return -EINVAL;
 285
 286         status = evm_sw_setup(client, gpio, 4, c);
 287         if (status)
 288                 return status;
 289
 290         return evm_led_setup(client, gpio+4, 4, c);
 291 }
 292
 293 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
 294                         unsigned int ngpio, void *c)
 295 {
 296         BUG_ON(ngpio < 8);
 297
 298         evm_sw_teardown(client, gpio, 4, c);
 299         evm_led_teardown(client, gpio+4, 4, c);
 300
 301         return 0;
 302 }
 303
 304 static struct pcf857x_platform_data pcf_data = {
 305         .gpio_base      = DAVINCI_N_GPIO+1,
 306         .setup          = evm_pcf_setup,
 307         .teardown       = evm_pcf_teardown,
 308 };
 309
 310 /* Most of this EEPROM is unused, but U-Boot uses some data:
 311  *  - 0x7f00, 6 bytes Ethernet Address
 312  *  - ... newer boards may have more
 313  */
 314
 315 static struct at24_platform_data eeprom_info = {
 316         .byte_len       = (256*1024) / 8,
 317         .page_size      = 64,
 318         .flags          = AT24_FLAG_ADDR16,
 319         .setup          = davinci_get_mac_addr,
 320         .context        = (void *)0x7f00,
 321 };
 322
 323 static u8 dm646x_iis_serializer_direction[] = {
 324        TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
 325 };
 326
 327 static u8 dm646x_dit_serializer_direction[] = {
 328        TX_MODE,
 329 };
 330
 331 static struct snd_platform_data dm646x_evm_snd_data[] = {
 332         {
 333                 .tx_dma_offset  = 0x400,
 334                 .rx_dma_offset  = 0x400,
 335                 .op_mode        = DAVINCI_MCASP_IIS_MODE,
 336                 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
 337                 .tdm_slots      = 2,
 338                 .serial_dir     = dm646x_iis_serializer_direction,
 339                 .asp_chan_q     = EVENTQ_0,
 340         },
 341         {
 342                 .tx_dma_offset  = 0x400,
 343                 .rx_dma_offset  = 0,
 344                 .op_mode        = DAVINCI_MCASP_DIT_MODE,
 345                 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
 346                 .tdm_slots      = 32,
 347                 .serial_dir     = dm646x_dit_serializer_direction,
 348                 .asp_chan_q     = EVENTQ_0,
 349         },
 350 };
 351
 352 static struct i2c_client *cpld_client;
 353
 354 static int cpld_video_probe(struct i2c_client *client,
 355                         const struct i2c_device_id *id)
 356 {
 357         cpld_client = client;
 358         return 0;
 359 }
 360
 361 static int cpld_video_remove(struct i2c_client *client)
 362 {
 363         cpld_client = NULL;
 364         return 0;
 365 }
 366
 367 static const struct i2c_device_id cpld_video_id[] = {
 368         { "cpld_video", 0 },
 369         { }
 370 };
 371
 372 static struct i2c_driver cpld_video_driver = {
 373         .driver = {
 374                 .name   = "cpld_video",
 375         },
 376         .probe          = cpld_video_probe,
 377         .remove         = cpld_video_remove,
 378         .id_table       = cpld_video_id,
 379 };
 380
 381 static void evm_init_cpld(void)
 382 {
 383         i2c_add_driver(&cpld_video_driver);
 384 }
 385
 386 static struct i2c_board_info __initdata i2c_info[] =  {
 387         {
 388                 I2C_BOARD_INFO("24c256", 0x50),
 389                 .platform_data  = &eeprom_info,
 390         },
 391         {
 392                 I2C_BOARD_INFO("pcf8574a", 0x38),
 393                 .platform_data  = &pcf_data,
 394         },
 395         {
 396                 I2C_BOARD_INFO("cpld_reg0", 0x3a),
 397         },
 398         {
 399                 I2C_BOARD_INFO("tlv320aic33", 0x18),
 400         },
 401         {
 402                 I2C_BOARD_INFO("cpld_video", 0x3b),
 403         },
 404         {
 405                 I2C_BOARD_INFO("cdce949", 0x6c),
 406         },
 407 };
 408
 409 static struct davinci_i2c_platform_data i2c_pdata = {
 410         .bus_freq       = 100 /* kHz */,
 411         .bus_delay      = 0 /* usec */,
 412 };
 413
 414 #define VCH2CLK_MASK            (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
 415 #define VCH2CLK_SYSCLK8         (BIT(9))
 416 #define VCH2CLK_AUXCLK          (BIT(9) | BIT(8))
 417 #define VCH3CLK_MASK            (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
 418 #define VCH3CLK_SYSCLK8         (BIT(13))
 419 #define VCH3CLK_AUXCLK          (BIT(14) | BIT(13))
 420
 421 #define VIDCH2CLK               (BIT(10))
 422 #define VIDCH3CLK               (BIT(11))
 423 #define VIDCH1CLK               (BIT(4))
 424 #define TVP7002_INPUT           (BIT(4))
 425 #define TVP5147_INPUT           (~BIT(4))
 426 #define VPIF_INPUT_ONE_CHANNEL  (BIT(5))
 427 #define VPIF_INPUT_TWO_CHANNEL  (~BIT(5))
 428 #define TVP5147_CH0             "tvp514x-0"
 429 #define TVP5147_CH1             "tvp514x-1"
 430
 431 /* spin lock for updating above registers */
 432 static spinlock_t vpif_reg_lock;
 433
 434 static int set_vpif_clock(int mux_mode, int hd)
 435 {
 436         unsigned long flags;
 437         unsigned int value;
 438         int val = 0;
 439         int err = 0;
 440
 441         if (!cpld_client)
 442                 return -ENXIO;
 443
 444         /* disable the clock */
 445         spin_lock_irqsave(&vpif_reg_lock, flags);
 446         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 447         value |= (VIDCH3CLK | VIDCH2CLK);
 448         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 449         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 450
 451         val = i2c_smbus_read_byte(cpld_client);
 452         if (val < 0)
 453                 return val;
 454
 455         if (mux_mode == 1)
 456                 val &= ~0x40;
 457         else
 458                 val |= 0x40;
 459
 460         err = i2c_smbus_write_byte(cpld_client, val);
 461         if (err)
 462                 return err;
 463
 464         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 465         value &= ~(VCH2CLK_MASK);
 466         value &= ~(VCH3CLK_MASK);
 467
 468         if (hd >= 1)
 469                 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
 470         else
 471                 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
 472
 473         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 474
 475         spin_lock_irqsave(&vpif_reg_lock, flags);
 476         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 477         /* enable the clock */
 478         value &= ~(VIDCH3CLK | VIDCH2CLK);
 479         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 480         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 481
 482         return 0;
 483 }
 484
 485 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
 486         {
 487                 .name   = "adv7343",
 488                 .board_info = {
 489                         I2C_BOARD_INFO("adv7343", 0x2a),
 490                 },
 491         },
 492         {
 493                 .name   = "ths7303",
 494                 .board_info = {
 495                         I2C_BOARD_INFO("ths7303", 0x2c),
 496                 },
 497         },
 498 };
 499
 500 static const struct vpif_output dm6467_ch0_outputs[] = {
 501         {
 502                 .output = {
 503                         .index = 0,
 504                         .name = "Composite",
 505                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 506                         .capabilities = V4L2_OUT_CAP_STD,
 507                         .std = V4L2_STD_ALL,
 508                 },
 509                 .subdev_name = "adv7343",
 510                 .output_route = ADV7343_COMPOSITE_ID,
 511         },
 512         {
 513                 .output = {
 514                         .index = 1,
 515                         .name = "Component",
 516                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 517                         .capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS,
 518                 },
 519                 .subdev_name = "adv7343",
 520                 .output_route = ADV7343_COMPONENT_ID,
 521         },
 522         {
 523                 .output = {
 524                         .index = 2,
 525                         .name = "S-Video",
 526                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 527                         .capabilities = V4L2_OUT_CAP_STD,
 528                         .std = V4L2_STD_ALL,
 529                 },
 530                 .subdev_name = "adv7343",
 531                 .output_route = ADV7343_SVIDEO_ID,
 532         },
 533 };
 534
 535 static struct vpif_display_config dm646x_vpif_display_config = {
 536         .set_clock      = set_vpif_clock,
 537         .subdevinfo     = dm646x_vpif_subdev,
 538         .subdev_count   = ARRAY_SIZE(dm646x_vpif_subdev),
 539         .chan_config[0] = {
 540                 .outputs = dm6467_ch0_outputs,
 541                 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
 542         },
 543         .card_name      = "DM646x EVM",
 544 };
 545
 546 /**
 547  * setup_vpif_input_path()
 548  * @channel: channel id (0 - CH0, 1 - CH1)
 549  * @sub_dev_name: ptr sub device name
 550  *
 551  * This will set vpif input to capture data from tvp514x or
 552  * tvp7002.
 553  */
 554 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
 555 {
 556         int err = 0;
 557         int val;
 558
 559         /* for channel 1, we don't do anything */
 560         if (channel != 0)
 561                 return 0;
 562
 563         if (!cpld_client)
 564                 return -ENXIO;
 565
 566         val = i2c_smbus_read_byte(cpld_client);
 567         if (val < 0)
 568                 return val;
 569
 570         if (!strcmp(sub_dev_name, TVP5147_CH0) ||
 571             !strcmp(sub_dev_name, TVP5147_CH1))
 572                 val &= TVP5147_INPUT;
 573         else
 574                 val |= TVP7002_INPUT;
 575
 576         err = i2c_smbus_write_byte(cpld_client, val);
 577         if (err)
 578                 return err;
 579         return 0;
 580 }
 581
 582 /**
 583  * setup_vpif_input_channel_mode()
 584  * @mux_mode:  mux mode. 0 - 1 channel or (1) - 2 channel
 585  *
 586  * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
 587  */
 588 static int setup_vpif_input_channel_mode(int mux_mode)
 589 {
 590         unsigned long flags;
 591         int err = 0;
 592         int val;
 593         u32 value;
 594
 595         if (!cpld_client)
 596                 return -ENXIO;
 597
 598         val = i2c_smbus_read_byte(cpld_client);
 599         if (val < 0)
 600                 return val;
 601
 602         spin_lock_irqsave(&vpif_reg_lock, flags);
 603         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 604         if (mux_mode) {
 605                 val &= VPIF_INPUT_TWO_CHANNEL;
 606                 value |= VIDCH1CLK;
 607         } else {
 608                 val |= VPIF_INPUT_ONE_CHANNEL;
 609                 value &= ~VIDCH1CLK;
 610         }
 611         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 612         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 613
 614         err = i2c_smbus_write_byte(cpld_client, val);
 615         if (err)
 616                 return err;
 617
 618         return 0;
 619 }
 620
 621 static struct tvp514x_platform_data tvp5146_pdata = {
 622         .clk_polarity = 0,
 623         .hs_polarity = 1,
 624         .vs_polarity = 1
 625 };
 626
 627 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
 628
 629 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
 630         {
 631                 .name   = TVP5147_CH0,
 632                 .board_info = {
 633                         I2C_BOARD_INFO("tvp5146", 0x5d),
 634                         .platform_data = &tvp5146_pdata,
 635                 },
 636         },
 637         {
 638                 .name   = TVP5147_CH1,
 639                 .board_info = {
 640                         I2C_BOARD_INFO("tvp5146", 0x5c),
 641                         .platform_data = &tvp5146_pdata,
 642                 },
 643         },
 644 };
 645
 646 static const struct vpif_input dm6467_ch0_inputs[] = {
 647         {
 648                 .input = {
 649                         .index = 0,
 650                         .name = "Composite",
 651                         .type = V4L2_INPUT_TYPE_CAMERA,
 652                         .capabilities = V4L2_IN_CAP_STD,
 653                         .std = TVP514X_STD_ALL,
 654                 },
 655                 .subdev_name = TVP5147_CH0,
 656                 .input_route = INPUT_CVBS_VI2B,
 657                 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 658         },
 659 };
 660
 661 static const struct vpif_input dm6467_ch1_inputs[] = {
 662        {
 663                 .input = {
 664                         .index = 0,
 665                         .name = "S-Video",
 666                         .type = V4L2_INPUT_TYPE_CAMERA,
 667                         .capabilities = V4L2_IN_CAP_STD,
 668                         .std = TVP514X_STD_ALL,
 669                 },
 670                 .subdev_name = TVP5147_CH1,
 671                 .input_route = INPUT_SVIDEO_VI2C_VI1C,
 672                 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 673         },
 674 };
 675
 676 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
 677         .setup_input_path = setup_vpif_input_path,
 678         .setup_input_channel_mode = setup_vpif_input_channel_mode,
 679         .subdev_info = vpif_capture_sdev_info,
 680         .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
 681         .chan_config[0] = {
 682                 .inputs = dm6467_ch0_inputs,
 683                 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
 684                 .vpif_if = {
 685                         .if_type = VPIF_IF_BT656,
 686                         .hd_pol = 1,
 687                         .vd_pol = 1,
 688                         .fid_pol = 0,
 689                 },
 690         },
 691         .chan_config[1] = {
 692                 .inputs = dm6467_ch1_inputs,
 693                 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
 694                 .vpif_if = {
 695                         .if_type = VPIF_IF_BT656,
 696                         .hd_pol = 1,
 697                         .vd_pol = 1,
 698                         .fid_pol = 0,
 699                 },
 700         },
 701 };
 702
 703 static void __init evm_init_video(void)
 704 {
 705         spin_lock_init(&vpif_reg_lock);
 706
 707         dm646x_setup_vpif(&dm646x_vpif_display_config,
 708                           &dm646x_vpif_capture_cfg);
 709 }
 710
 711 static void __init evm_init_i2c(void)
 712 {
 713         davinci_init_i2c(&i2c_pdata);
 714         i2c_add_driver(&dm6467evm_cpld_driver);
 715         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 716         evm_init_cpld();
 717         evm_init_video();
 718 }
 719
 720 #define CDCE949_XIN_RATE        27000000
 721
 722 /* CDCE949 support - "lpsc" field is overridden to work as clock number */
 723 static struct clk cdce_clk_in = {
 724         .name   = "cdce_xin",
 725         .rate   = CDCE949_XIN_RATE,
 726 };
 727
 728 static struct clk_lookup cdce_clks[] = {
 729         CLK(NULL, "xin", &cdce_clk_in),
 730         CLK(NULL, NULL, NULL),
 731 };
 732
 733 static void __init cdce_clk_init(void)
 734 {
 735         struct clk_lookup *c;
 736         struct clk *clk;
 737
 738         for (c = cdce_clks; c->clk; c++) {
 739                 clk = c->clk;
 740                 clkdev_add(c);
 741                 clk_register(clk);
 742         }
 743 }
 744
 745 #define DM6467T_EVM_REF_FREQ            33000000
 746
 747 static void __init davinci_map_io(void)
 748 {
 749         dm646x_init();
 750
 751         if (machine_is_davinci_dm6467tevm())
 752                 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
 753
 754         cdce_clk_init();
 755 }
 756
 757 static struct davinci_uart_config uart_config __initdata = {
 758         .enabled_uarts = (1 << 0),
 759 };
 760
 761 #define DM646X_EVM_PHY_ID               "davinci_mdio-0:01"
 762 /*
 763  * The following EDMA channels/slots are not being used by drivers (for
 764  * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
 765  * reserved for codecs on the DSP side.
 766  */
 767 static const s16 dm646x_dma_rsv_chans[][2] = {
 768         /* (offset, number) */
 769         { 0,  4},
 770         {13,  3},
 771         {24,  4},
 772         {30,  2},
 773         {54,  3},
 774         {-1, -1}
 775 };
 776
 777 static const s16 dm646x_dma_rsv_slots[][2] = {
 778         /* (offset, number) */
 779         { 0,  4},
 780         {13,  3},
 781         {24,  4},
 782         {30,  2},
 783         {54,  3},
 784         {128, 384},
 785         {-1, -1}
 786 };
 787
 788 static struct edma_rsv_info dm646x_edma_rsv[] = {
 789         {
 790                 .rsv_chans      = dm646x_dma_rsv_chans,
 791                 .rsv_slots      = dm646x_dma_rsv_slots,
 792         },
 793 };
 794
 795 static __init void evm_init(void)
 796 {
 797         struct davinci_soc_info *soc_info = &davinci_soc_info;
 798
 799         evm_init_i2c();
 800         davinci_serial_init(&uart_config);
 801         dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
 802         dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
 803
 804         if (machine_is_davinci_dm6467tevm())
 805                 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
 806
 807         platform_device_register(&davinci_nand_device);
 808
 809         dm646x_init_edma(dm646x_edma_rsv);
 810
 811         if (HAS_ATA)
 812                 davinci_init_ide();
 813
 814         soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
 815 }
 816
 817 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
 818         .atag_offset  = 0x100,
 819         .map_io       = davinci_map_io,
 820         .init_irq     = davinci_irq_init,
 821         .timer        = &davinci_timer,
 822         .init_machine = evm_init,
 823         .init_late      = davinci_init_late,
 824         .dma_zone_size  = SZ_128M,
 825         .restart        = davinci_restart,
 826 MACHINE_END
 827
 828 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
 829         .atag_offset  = 0x100,
 830         .map_io       = davinci_map_io,
 831         .init_irq     = davinci_irq_init,
 832         .timer        = &davinci_timer,
 833         .init_machine = evm_init,
 834         .init_late      = davinci_init_late,
 835         .dma_zone_size  = SZ_128M,
 836         .restart        = davinci_restart,
 837 MACHINE_END
 838