1 /*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27 #ifndef __ASSEMBLER__
29 #include <linux/irq.h>
30 #include <linux/delay.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c/twl.h>
33 #include <linux/i2c-omap.h>
35 #include <asm/proc-fns.h>
37 #include "i2c.h"
38 #include "serial.h"
40 #include "usb.h"
42 #define OMAP_INTC_START NR_IRQS
44 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
45 int omap2_pm_init(void);
46 #else
47 static inline int omap2_pm_init(void)
48 {
49 return 0;
50 }
51 #endif
53 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
54 int omap3_pm_init(void);
55 #else
56 static inline int omap3_pm_init(void)
57 {
58 return 0;
59 }
60 #endif
62 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5))
63 int omap4_pm_init(void);
64 #else
65 static inline int omap4_pm_init(void)
66 {
67 return 0;
68 }
69 #endif
71 #if defined(CONFIG_PM) && defined(CONFIG_SOC_AM33XX)
72 int am33xx_pm_init(void);
73 #else
74 static inline int am33xx_pm_init(void)
75 {
76 return 0;
77 }
78 #endif
80 #ifdef CONFIG_OMAP_MUX
81 int omap_mux_late_init(void);
82 #else
83 static inline int omap_mux_late_init(void)
84 {
85 return 0;
86 }
87 #endif
89 extern void omap2_init_common_infrastructure(void);
91 extern struct sys_timer omap2_timer;
92 extern struct sys_timer omap3_timer;
93 extern struct sys_timer omap3_secure_timer;
94 extern struct sys_timer omap3_gp_timer;
95 extern struct sys_timer omap3_am33xx_timer;
96 extern struct sys_timer omap4_timer;
97 extern struct sys_timer omap5_timer;
99 void omap2420_init_early(void);
100 void omap2430_init_early(void);
101 void omap3430_init_early(void);
102 void omap35xx_init_early(void);
103 void omap3630_init_early(void);
104 void omap3_init_early(void); /* Do not use this one */
105 void am33xx_init_early(void);
106 void am35xx_init_early(void);
107 void ti81xx_init_early(void);
108 void am33xx_init_early(void);
109 void omap4430_init_early(void);
110 void omap5_init_early(void);
111 void omap3_init_late(void); /* Do not use this one */
112 void omap4430_init_late(void);
113 void omap2420_init_late(void);
114 void omap2430_init_late(void);
115 void omap3430_init_late(void);
116 void omap35xx_init_late(void);
117 void omap3630_init_late(void);
118 void am33xx_init_late(void);
119 void am35xx_init_late(void);
120 void ti81xx_init_late(void);
121 void omap5_init_late(void);
122 int omap2_common_pm_late_init(void);
123 void dra7xx_init_early(void);
124 void dra7xx_init_late(void);
126 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
127 void omap2xxx_restart(char mode, const char *cmd);
128 #else
129 static inline void omap2xxx_restart(char mode, const char *cmd)
130 {
131 }
132 #endif
134 #ifdef CONFIG_SOC_AM33XX
135 void am33xx_restart(char mode, const char *cmd);
136 #else
137 static inline void am33xx_restart(char mode, const char *cmd)
138 {
139 }
140 #endif
142 #ifdef CONFIG_ARCH_OMAP3
143 void omap3xxx_restart(char mode, const char *cmd);
144 #else
145 static inline void omap3xxx_restart(char mode, const char *cmd)
146 {
147 }
148 #endif
150 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
151 defined(CONFIG_SOC_DRA7XX)
152 void omap44xx_restart(char mode, const char *cmd);
153 #else
154 static inline void omap44xx_restart(char mode, const char *cmd)
155 {
156 }
157 #endif
159 /* This gets called from mach-omap2/io.c, do not call this */
160 void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
162 void __init omap242x_map_io(void);
163 void __init omap243x_map_io(void);
164 void __init omap3_map_io(void);
165 void __init am33xx_map_io(void);
166 void __init omap4_map_io(void);
167 void __init omap5_map_io(void);
168 void __init ti81xx_map_io(void);
170 /* omap_barriers_init() is OMAP4 only */
171 void omap_barriers_init(void);
173 /**
174 * omap_test_timeout - busy-loop, testing a condition
175 * @cond: condition to test until it evaluates to true
176 * @timeout: maximum number of microseconds in the timeout
177 * @index: loop index (integer)
178 *
179 * Loop waiting for @cond to become true or until at least @timeout
180 * microseconds have passed. To use, define some integer @index in the
181 * calling code. After running, if @index == @timeout, then the loop has
182 * timed out.
183 */
184 #define omap_test_timeout(cond, timeout, index) \
185 ({ \
186 for (index = 0; index < timeout; index++) { \
187 if (cond) \
188 break; \
189 udelay(1); \
190 } \
191 })
193 extern struct device *omap2_get_mpuss_device(void);
194 extern struct device *omap2_get_iva_device(void);
195 extern struct device *omap2_get_l3_device(void);
196 extern struct device *omap4_get_dsp_device(void);
198 void omap2_init_irq(void);
199 void omap3_init_irq(void);
200 void ti81xx_init_irq(void);
201 extern int omap_irq_pending(void);
202 void omap_intc_save_context(void);
203 void omap_intc_restore_context(void);
204 void omap3_intc_suspend(void);
205 void omap3_intc_prepare_idle(void);
206 void omap3_intc_resume_idle(void);
207 void omap2_intc_handle_irq(struct pt_regs *regs);
208 void omap3_intc_handle_irq(struct pt_regs *regs);
209 void omap_intc_of_init(void);
210 void omap_gic_of_init(void);
212 #ifdef CONFIG_CACHE_L2X0
213 extern void __iomem *omap4_get_l2cache_base(void);
214 #endif
216 struct device_node;
217 #ifdef CONFIG_OF
218 int __init intc_of_init(struct device_node *node,
219 struct device_node *parent);
220 #else
221 int __init intc_of_init(struct device_node *node,
222 struct device_node *parent)
223 {
224 return 0;
225 }
226 #endif
228 #ifdef CONFIG_SMP
229 extern void __iomem *omap4_get_scu_base(void);
230 #else
231 static inline void __iomem *omap4_get_scu_base(void)
232 {
233 return NULL;
234 }
235 #endif
237 extern void __init gic_init_irq(void);
238 extern void gic_dist_disable(void);
239 extern bool gic_dist_disabled(void);
240 extern void gic_timer_retrigger(void);
241 extern void omap_smc1(u32 fn, u32 arg);
242 extern void __iomem *omap4_get_sar_ram_base(void);
243 extern void omap_do_wfi(void);
245 #ifdef CONFIG_SMP
246 /* Needed for secondary core boot */
247 extern void omap_secondary_startup(void);
248 extern void omap_secondary_startup_4460(void);
249 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
250 extern void omap_auxcoreboot_addr(u32 cpu_addr);
251 extern u32 omap_read_auxcoreboot0(void);
253 extern void omap4_cpu_die(unsigned int cpu);
255 extern struct smp_operations omap4_smp_ops;
257 extern void omap5_secondary_startup(void);
258 #endif
260 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
261 extern int omap4_mpuss_init(void);
262 extern int omap4_mpuss_enter_lowpower(unsigned int cpu, u8 fpwrst);
263 extern int omap4_finish_suspend(unsigned long cpu_state);
264 extern void omap4_cpu_resume(void);
265 extern int omap4_mpuss_hotplug_cpu(unsigned int cpu, u8 fpwrst);
266 #else
267 static inline int omap4_mpuss_enter_lowpower(unsigned int cpu, u8 fpwrst)
268 {
269 cpu_do_idle();
270 return 0;
271 }
273 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
274 {
275 cpu_do_idle();
276 return 0;
277 }
279 static inline int omap4_mpuss_init(void)
280 {
281 return 0;
282 }
284 static inline int omap4_finish_suspend(unsigned long cpu_state)
285 {
286 return 0;
287 }
289 static inline void omap4_cpu_resume(void)
290 {}
292 #endif
294 struct omap_sdrc_params;
295 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
296 struct omap_sdrc_params *sdrc_cs1);
297 struct omap2_hsmmc_info;
298 extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
299 extern void omap_reserve(void);
301 struct omap_hwmod;
302 extern int omap_dss_reset(struct omap_hwmod *);
303 int __init omapdss_init_of(void);
305 /* AXI ERROR DEFINES */
306 #define AXI_L2_ERROR (1 << 30)
307 #define AXI_ASYNC_ERROR (1 << 29)
308 #define AXI_ERROR (AXI_L2_ERROR | AXI_ASYNC_ERROR)
310 /* SoC specific clock initializer */
311 extern int (*omap_clk_init)(void);
313 #endif /* __ASSEMBLER__ */
314 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */