1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk-provider.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
140 #include <linux/bootmem.h>
141 #include <linux/cpu.h>
142 #include <linux/of.h>
143 #include <linux/of_address.h>
144 #include <linux/suspend.h>
146 #include <asm/system_misc.h>
148 #include "clock.h"
149 #include "omap_hwmod.h"
151 #include "soc.h"
152 #include "common.h"
153 #include "clockdomain.h"
154 #include "powerdomain.h"
155 #include "cm2xxx.h"
156 #include "cm3xxx.h"
157 #include "cminst44xx.h"
158 #include "cm33xx.h"
159 #include "prm.h"
160 #include "prm3xxx.h"
161 #include "prm44xx.h"
162 #include "prm33xx.h"
163 #include "prminst44xx.h"
164 #include "mux.h"
165 #include "pm.h"
167 /* Name of the OMAP hwmod for the MPU */
168 #define MPU_INITIATOR_NAME "mpu"
170 /*
171 * Number of struct omap_hwmod_link records per struct
172 * omap_hwmod_ocp_if record (master->slave and slave->master)
173 */
174 #define LINKS_PER_OCP_IF 2
176 /**
177 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
178 * @enable_module: function to enable a module (via MODULEMODE)
179 * @disable_module: function to disable a module (via MODULEMODE)
180 *
181 * XXX Eventually this functionality will be hidden inside the PRM/CM
182 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
183 * conditionals in this code.
184 */
185 struct omap_hwmod_soc_ops {
186 void (*enable_module)(struct omap_hwmod *oh);
187 int (*disable_module)(struct omap_hwmod *oh);
188 int (*wait_target_ready)(struct omap_hwmod *oh);
189 int (*assert_hardreset)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
191 int (*deassert_hardreset)(struct omap_hwmod *oh,
192 struct omap_hwmod_rst_info *ohri);
193 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
194 struct omap_hwmod_rst_info *ohri);
195 int (*init_clkdm)(struct omap_hwmod *oh);
196 void (*update_context_lost)(struct omap_hwmod *oh);
197 int (*get_context_lost)(struct omap_hwmod *oh);
198 };
200 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
201 static struct omap_hwmod_soc_ops soc_ops;
203 /* omap_hwmod_list contains all registered struct omap_hwmods */
204 static LIST_HEAD(omap_hwmod_list);
206 /* oh_reidle_list contains all omap_hwmods with HWMOD_NEEDS_REIDLE set */
207 LIST_HEAD(oh_reidle_list);
209 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
210 static struct omap_hwmod *mpu_oh;
212 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
213 static DEFINE_SPINLOCK(io_chain_lock);
215 /*
216 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
217 * allocated from - used to reduce the number of small memory
218 * allocations, which has a significant impact on performance
219 */
220 static struct omap_hwmod_link *linkspace;
222 /*
223 * free_ls, max_ls: array indexes into linkspace; representing the
224 * next free struct omap_hwmod_link index, and the maximum number of
225 * struct omap_hwmod_link records allocated (respectively)
226 */
227 static unsigned short free_ls, max_ls, ls_supp;
229 /* inited: set to true once the hwmod code is initialized */
230 static bool inited;
232 /* Private functions */
234 /**
235 * _fetch_next_ocp_if - return the next OCP interface in a list
236 * @p: ptr to a ptr to the list_head inside the ocp_if to return
237 * @i: pointer to the index of the element pointed to by @p in the list
238 *
239 * Return a pointer to the struct omap_hwmod_ocp_if record
240 * containing the struct list_head pointed to by @p, and increment
241 * @p such that a future call to this routine will return the next
242 * record.
243 */
244 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
245 int *i)
246 {
247 struct omap_hwmod_ocp_if *oi;
249 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
250 *p = (*p)->next;
252 *i = *i + 1;
254 return oi;
255 }
257 /**
258 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
259 * @oh: struct omap_hwmod *
260 *
261 * Load the current value of the hwmod OCP_SYSCONFIG register into the
262 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
263 * OCP_SYSCONFIG register or 0 upon success.
264 */
265 static int _update_sysc_cache(struct omap_hwmod *oh)
266 {
267 if (!oh->class->sysc) {
268 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
269 return -EINVAL;
270 }
272 /* XXX ensure module interface clock is up */
274 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
276 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
277 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
279 return 0;
280 }
282 /**
283 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
284 * @v: OCP_SYSCONFIG value to write
285 * @oh: struct omap_hwmod *
286 *
287 * Write @v into the module class' OCP_SYSCONFIG register, if it has
288 * one. No return value.
289 */
290 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
291 {
292 if (!oh->class->sysc) {
293 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
294 return;
295 }
297 /* XXX ensure module interface clock is up */
299 /* Module might have lost context, always update cache and register */
300 oh->_sysc_cache = v;
301 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
302 }
304 /**
305 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
306 * @oh: struct omap_hwmod *
307 * @standbymode: MIDLEMODE field bits
308 * @v: pointer to register contents to modify
309 *
310 * Update the master standby mode bits in @v to be @standbymode for
311 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
312 * upon error or 0 upon success.
313 */
314 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
315 u32 *v)
316 {
317 u32 mstandby_mask;
318 u8 mstandby_shift;
320 if (!oh->class->sysc ||
321 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
322 return -EINVAL;
324 if (!oh->class->sysc->sysc_fields) {
325 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
326 return -EINVAL;
327 }
329 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
330 mstandby_mask = (0x3 << mstandby_shift);
332 *v &= ~mstandby_mask;
333 *v |= __ffs(standbymode) << mstandby_shift;
335 return 0;
336 }
338 /**
339 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
340 * @oh: struct omap_hwmod *
341 * @idlemode: SIDLEMODE field bits
342 * @v: pointer to register contents to modify
343 *
344 * Update the slave idle mode bits in @v to be @idlemode for the @oh
345 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
346 * or 0 upon success.
347 */
348 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
349 {
350 u32 sidle_mask;
351 u8 sidle_shift;
353 if (!oh->class->sysc ||
354 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
355 return -EINVAL;
357 if (!oh->class->sysc->sysc_fields) {
358 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
359 return -EINVAL;
360 }
362 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
363 sidle_mask = (0x3 << sidle_shift);
365 *v &= ~sidle_mask;
366 *v |= __ffs(idlemode) << sidle_shift;
368 return 0;
369 }
371 /**
372 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
373 * @oh: struct omap_hwmod *
374 * @clockact: CLOCKACTIVITY field bits
375 * @v: pointer to register contents to modify
376 *
377 * Update the clockactivity mode bits in @v to be @clockact for the
378 * @oh hwmod. Used for additional powersaving on some modules. Does
379 * not write to the hardware. Returns -EINVAL upon error or 0 upon
380 * success.
381 */
382 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
383 {
384 u32 clkact_mask;
385 u8 clkact_shift;
387 if (!oh->class->sysc ||
388 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
389 return -EINVAL;
391 if (!oh->class->sysc->sysc_fields) {
392 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
393 return -EINVAL;
394 }
396 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
397 clkact_mask = (0x3 << clkact_shift);
399 *v &= ~clkact_mask;
400 *v |= clockact << clkact_shift;
402 return 0;
403 }
405 /**
406 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
407 * @oh: struct omap_hwmod *
408 * @v: pointer to register contents to modify
409 *
410 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
411 * error or 0 upon success.
412 */
413 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
414 {
415 u32 softrst_mask;
417 if (!oh->class->sysc ||
418 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
419 return -EINVAL;
421 if (!oh->class->sysc->sysc_fields) {
422 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
423 return -EINVAL;
424 }
426 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
428 *v |= softrst_mask;
430 return 0;
431 }
433 /**
434 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
435 * @oh: struct omap_hwmod *
436 * @v: pointer to register contents to modify
437 *
438 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
439 * error or 0 upon success.
440 */
441 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
442 {
443 u32 softrst_mask;
445 if (!oh->class->sysc ||
446 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
447 return -EINVAL;
449 if (!oh->class->sysc->sysc_fields) {
450 WARN(1,
451 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
452 oh->name);
453 return -EINVAL;
454 }
456 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
458 *v &= ~softrst_mask;
460 return 0;
461 }
463 /**
464 * _wait_softreset_complete - wait for an OCP softreset to complete
465 * @oh: struct omap_hwmod * to wait on
466 *
467 * Wait until the IP block represented by @oh reports that its OCP
468 * softreset is complete. This can be triggered by software (see
469 * _ocp_softreset()) or by hardware upon returning from off-mode (one
470 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
471 * microseconds. Returns the number of microseconds waited.
472 */
473 static int _wait_softreset_complete(struct omap_hwmod *oh)
474 {
475 struct omap_hwmod_class_sysconfig *sysc;
476 u32 softrst_mask;
477 int c = 0;
479 sysc = oh->class->sysc;
481 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
482 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
483 & SYSS_RESETDONE_MASK),
484 MAX_MODULE_SOFTRESET_WAIT, c);
485 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
486 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
487 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
488 & softrst_mask),
489 MAX_MODULE_SOFTRESET_WAIT, c);
490 }
492 return c;
493 }
495 /**
496 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
497 * @oh: struct omap_hwmod *
498 *
499 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
500 * of some modules. When the DMA must perform read/write accesses, the
501 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
502 * for power management, software must set the DMADISABLE bit back to 1.
503 *
504 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
505 * error or 0 upon success.
506 */
507 static int _set_dmadisable(struct omap_hwmod *oh)
508 {
509 u32 v;
510 u32 dmadisable_mask;
512 if (!oh->class->sysc ||
513 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
514 return -EINVAL;
516 if (!oh->class->sysc->sysc_fields) {
517 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
518 return -EINVAL;
519 }
521 /* clocks must be on for this operation */
522 if (oh->_state != _HWMOD_STATE_ENABLED) {
523 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
524 return -EINVAL;
525 }
527 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
529 v = oh->_sysc_cache;
530 dmadisable_mask =
531 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
532 v |= dmadisable_mask;
533 _write_sysconfig(v, oh);
535 return 0;
536 }
538 /**
539 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
540 * @oh: struct omap_hwmod *
541 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
542 * @v: pointer to register contents to modify
543 *
544 * Update the module autoidle bit in @v to be @autoidle for the @oh
545 * hwmod. The autoidle bit controls whether the module can gate
546 * internal clocks automatically when it isn't doing anything; the
547 * exact function of this bit varies on a per-module basis. This
548 * function does not write to the hardware. Returns -EINVAL upon
549 * error or 0 upon success.
550 */
551 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
552 u32 *v)
553 {
554 u32 autoidle_mask;
555 u8 autoidle_shift;
557 if (!oh->class->sysc ||
558 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
559 return -EINVAL;
561 if (!oh->class->sysc->sysc_fields) {
562 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
563 return -EINVAL;
564 }
566 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
567 autoidle_mask = (0x1 << autoidle_shift);
569 *v &= ~autoidle_mask;
570 *v |= autoidle << autoidle_shift;
572 return 0;
573 }
575 /**
576 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
577 * @oh: struct omap_hwmod *
578 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
579 *
580 * Set or clear the I/O pad wakeup flag in the mux entries for the
581 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
582 * in memory. If the hwmod is currently idled, and the new idle
583 * values don't match the previous ones, this function will also
584 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
585 * currently idled, this function won't touch the hardware: the new
586 * mux settings are written to the SCM PADCTRL registers when the
587 * hwmod is idled. No return value.
588 */
589 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
590 {
591 struct omap_device_pad *pad;
592 bool change = false;
593 u16 prev_idle;
594 int j;
596 if (!oh->mux || !oh->mux->enabled)
597 return;
599 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
600 pad = oh->mux->pads_dynamic[j];
602 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
603 continue;
605 prev_idle = pad->idle;
607 if (set_wake)
608 pad->idle |= OMAP_WAKEUP_EN;
609 else
610 pad->idle &= ~OMAP_WAKEUP_EN;
612 if (prev_idle != pad->idle)
613 change = true;
614 }
616 if (change && oh->_state == _HWMOD_STATE_IDLE)
617 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
618 }
620 /**
621 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
622 * @oh: struct omap_hwmod *
623 *
624 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
625 * upon error or 0 upon success.
626 */
627 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
628 {
629 if (!oh->class->sysc ||
630 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
631 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
632 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
633 return -EINVAL;
635 if (!oh->class->sysc->sysc_fields) {
636 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
637 return -EINVAL;
638 }
640 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
641 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
643 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
644 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
645 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
646 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
648 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
650 return 0;
651 }
653 /**
654 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
655 * @oh: struct omap_hwmod *
656 *
657 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
658 * upon error or 0 upon success.
659 */
660 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
661 {
662 if (!oh->class->sysc ||
663 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
664 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
665 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
666 return -EINVAL;
668 if (!oh->class->sysc->sysc_fields) {
669 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
670 return -EINVAL;
671 }
673 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
674 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
676 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
677 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
678 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
679 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
681 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
683 return 0;
684 }
686 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
687 {
688 struct clk_hw_omap *clk;
690 if (oh->clkdm) {
691 return oh->clkdm;
692 } else if (oh->_clk) {
693 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
694 return NULL;
695 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
696 return clk->clkdm;
697 }
698 return NULL;
699 }
701 /**
702 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
703 * @oh: struct omap_hwmod *
704 *
705 * Prevent the hardware module @oh from entering idle while the
706 * hardare module initiator @init_oh is active. Useful when a module
707 * will be accessed by a particular initiator (e.g., if a module will
708 * be accessed by the IVA, there should be a sleepdep between the IVA
709 * initiator and the module). Only applies to modules in smart-idle
710 * mode. If the clockdomain is marked as not needing autodeps, return
711 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
712 * passes along clkdm_add_sleepdep() value upon success.
713 */
714 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
715 {
716 struct clockdomain *clkdm, *init_clkdm;
718 clkdm = _get_clkdm(oh);
719 init_clkdm = _get_clkdm(init_oh);
721 if (!clkdm || !init_clkdm)
722 return -EINVAL;
724 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
725 return 0;
727 return clkdm_add_sleepdep(clkdm, init_clkdm);
728 }
730 /**
731 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
732 * @oh: struct omap_hwmod *
733 *
734 * Allow the hardware module @oh to enter idle while the hardare
735 * module initiator @init_oh is active. Useful when a module will not
736 * be accessed by a particular initiator (e.g., if a module will not
737 * be accessed by the IVA, there should be no sleepdep between the IVA
738 * initiator and the module). Only applies to modules in smart-idle
739 * mode. If the clockdomain is marked as not needing autodeps, return
740 * 0 without doing anything. Returns -EINVAL upon error or passes
741 * along clkdm_del_sleepdep() value upon success.
742 */
743 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
744 {
745 struct clockdomain *clkdm, *init_clkdm;
747 clkdm = _get_clkdm(oh);
748 init_clkdm = _get_clkdm(init_oh);
750 if (!clkdm || !init_clkdm)
751 return -EINVAL;
753 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
754 return 0;
756 return clkdm_del_sleepdep(clkdm, init_clkdm);
757 }
759 /**
760 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
761 * @oh: struct omap_hwmod *
762 *
763 * Called from _init_clocks(). Populates the @oh _clk (main
764 * functional clock pointer) if a main_clk is present. Returns 0 on
765 * success or -EINVAL on error.
766 */
767 static int _init_main_clk(struct omap_hwmod *oh)
768 {
769 int ret = 0;
771 if (!oh->main_clk)
772 return 0;
774 oh->_clk = clk_get(NULL, oh->main_clk);
775 if (IS_ERR(oh->_clk)) {
776 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
777 oh->name, oh->main_clk);
778 return -EINVAL;
779 }
780 /*
781 * HACK: This needs a re-visit once clk_prepare() is implemented
782 * to do something meaningful. Today its just a no-op.
783 * If clk_prepare() is used at some point to do things like
784 * voltage scaling etc, then this would have to be moved to
785 * some point where subsystems like i2c and pmic become
786 * available.
787 */
788 clk_prepare(oh->_clk);
790 if (!_get_clkdm(oh))
791 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
792 oh->name, oh->main_clk);
794 return ret;
795 }
797 /**
798 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
799 * @oh: struct omap_hwmod *
800 *
801 * Called from _init_clocks(). Populates the @oh OCP slave interface
802 * clock pointers. Returns 0 on success or -EINVAL on error.
803 */
804 static int _init_interface_clks(struct omap_hwmod *oh)
805 {
806 struct omap_hwmod_ocp_if *os;
807 struct list_head *p;
808 struct clk *c;
809 int i = 0;
810 int ret = 0;
812 p = oh->slave_ports.next;
814 while (i < oh->slaves_cnt) {
815 os = _fetch_next_ocp_if(&p, &i);
816 if (!os->clk)
817 continue;
819 c = clk_get(NULL, os->clk);
820 if (IS_ERR(c)) {
821 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
822 oh->name, os->clk);
823 ret = -EINVAL;
824 continue;
825 }
826 os->_clk = c;
827 /*
828 * HACK: This needs a re-visit once clk_prepare() is implemented
829 * to do something meaningful. Today its just a no-op.
830 * If clk_prepare() is used at some point to do things like
831 * voltage scaling etc, then this would have to be moved to
832 * some point where subsystems like i2c and pmic become
833 * available.
834 */
835 clk_prepare(os->_clk);
836 }
838 return ret;
839 }
841 /**
842 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
843 * @oh: struct omap_hwmod *
844 *
845 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
846 * clock pointers. Returns 0 on success or -EINVAL on error.
847 */
848 static int _init_opt_clks(struct omap_hwmod *oh)
849 {
850 struct omap_hwmod_opt_clk *oc;
851 struct clk *c;
852 int i;
853 int ret = 0;
855 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
856 c = clk_get(NULL, oc->clk);
857 if (IS_ERR(c)) {
858 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
859 oh->name, oc->clk);
860 ret = -EINVAL;
861 continue;
862 }
863 oc->_clk = c;
864 /*
865 * HACK: This needs a re-visit once clk_prepare() is implemented
866 * to do something meaningful. Today its just a no-op.
867 * If clk_prepare() is used at some point to do things like
868 * voltage scaling etc, then this would have to be moved to
869 * some point where subsystems like i2c and pmic become
870 * available.
871 */
872 clk_prepare(oc->_clk);
873 }
875 return ret;
876 }
878 /**
879 * _enable_clocks - enable hwmod main clock and interface clocks
880 * @oh: struct omap_hwmod *
881 *
882 * Enables all clocks necessary for register reads and writes to succeed
883 * on the hwmod @oh. Returns 0.
884 */
885 static int _enable_clocks(struct omap_hwmod *oh)
886 {
887 struct omap_hwmod_ocp_if *os;
888 struct list_head *p;
889 int i = 0;
891 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
893 if (oh->_clk)
894 clk_enable(oh->_clk);
896 p = oh->slave_ports.next;
898 while (i < oh->slaves_cnt) {
899 os = _fetch_next_ocp_if(&p, &i);
901 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
902 clk_enable(os->_clk);
903 }
905 /* The opt clocks are controlled by the device driver. */
907 return 0;
908 }
910 /**
911 * _disable_clocks - disable hwmod main clock and interface clocks
912 * @oh: struct omap_hwmod *
913 *
914 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
915 */
916 static int _disable_clocks(struct omap_hwmod *oh)
917 {
918 struct omap_hwmod_ocp_if *os;
919 struct list_head *p;
920 int i = 0;
922 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
924 if (oh->_clk)
925 clk_disable(oh->_clk);
927 p = oh->slave_ports.next;
929 while (i < oh->slaves_cnt) {
930 os = _fetch_next_ocp_if(&p, &i);
932 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
933 clk_disable(os->_clk);
934 }
936 /* The opt clocks are controlled by the device driver. */
938 return 0;
939 }
941 static void _enable_optional_clocks(struct omap_hwmod *oh)
942 {
943 struct omap_hwmod_opt_clk *oc;
944 int i;
946 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
948 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
949 if (oc->_clk) {
950 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
951 __clk_get_name(oc->_clk));
952 clk_enable(oc->_clk);
953 }
954 }
956 static void _disable_optional_clocks(struct omap_hwmod *oh)
957 {
958 struct omap_hwmod_opt_clk *oc;
959 int i;
961 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
963 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
964 if (oc->_clk) {
965 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
966 __clk_get_name(oc->_clk));
967 clk_disable(oc->_clk);
968 }
969 }
971 /**
972 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
973 * @oh: struct omap_hwmod *
974 *
975 * Enables the PRCM module mode related to the hwmod @oh.
976 * No return value.
977 */
978 static void _omap4_enable_module(struct omap_hwmod *oh)
979 {
980 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
981 return;
983 pr_debug("omap_hwmod: %s: %s: %d\n",
984 oh->name, __func__, oh->prcm.omap4.modulemode);
986 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
987 oh->clkdm->prcm_partition,
988 oh->clkdm->cm_inst,
989 oh->clkdm->clkdm_offs,
990 oh->prcm.omap4.clkctrl_offs);
991 }
993 /**
994 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
995 * @oh: struct omap_hwmod *
996 *
997 * Enables the PRCM module mode related to the hwmod @oh.
998 * No return value.
999 */
1000 static void _am33xx_enable_module(struct omap_hwmod *oh)
1001 {
1002 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1003 return;
1005 pr_debug("omap_hwmod: %s: %s: %d\n",
1006 oh->name, __func__, oh->prcm.omap4.modulemode);
1008 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
1009 oh->clkdm->clkdm_offs,
1010 oh->prcm.omap4.clkctrl_offs);
1011 }
1013 /**
1014 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1015 * @oh: struct omap_hwmod *
1016 *
1017 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1018 * does not have an IDLEST bit or if the module successfully enters
1019 * slave idle; otherwise, pass along the return value of the
1020 * appropriate *_cm*_wait_module_idle() function.
1021 */
1022 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1023 {
1024 if (!oh)
1025 return -EINVAL;
1027 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1028 return 0;
1030 if (oh->flags & HWMOD_NO_IDLEST)
1031 return 0;
1033 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
1034 oh->clkdm->cm_inst,
1035 oh->clkdm->clkdm_offs,
1036 oh->prcm.omap4.clkctrl_offs);
1037 }
1039 /**
1040 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
1041 * @oh: struct omap_hwmod *
1042 *
1043 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1044 * does not have an IDLEST bit or if the module successfully enters
1045 * slave idle; otherwise, pass along the return value of the
1046 * appropriate *_cm*_wait_module_idle() function.
1047 */
1048 static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
1049 {
1050 if (!oh)
1051 return -EINVAL;
1053 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1054 return 0;
1056 if (oh->flags & HWMOD_NO_IDLEST)
1057 return 0;
1059 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
1060 oh->clkdm->clkdm_offs,
1061 oh->prcm.omap4.clkctrl_offs);
1062 }
1064 /**
1065 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1066 * @oh: struct omap_hwmod *oh
1067 *
1068 * Count and return the number of MPU IRQs associated with the hwmod
1069 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1070 * NULL.
1071 */
1072 static int _count_mpu_irqs(struct omap_hwmod *oh)
1073 {
1074 struct omap_hwmod_irq_info *ohii;
1075 int i = 0;
1077 if (!oh || !oh->mpu_irqs)
1078 return 0;
1080 do {
1081 ohii = &oh->mpu_irqs[i++];
1082 } while (ohii->irq != -1);
1084 return i-1;
1085 }
1087 /**
1088 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1089 * @oh: struct omap_hwmod *oh
1090 *
1091 * Count and return the number of SDMA request lines associated with
1092 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1093 * if @oh is NULL.
1094 */
1095 static int _count_sdma_reqs(struct omap_hwmod *oh)
1096 {
1097 struct omap_hwmod_dma_info *ohdi;
1098 int i = 0;
1100 if (!oh || !oh->sdma_reqs)
1101 return 0;
1103 do {
1104 ohdi = &oh->sdma_reqs[i++];
1105 } while (ohdi->dma_req != -1);
1107 return i-1;
1108 }
1110 /**
1111 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1112 * @oh: struct omap_hwmod *oh
1113 *
1114 * Count and return the number of address space ranges associated with
1115 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1116 * if @oh is NULL.
1117 */
1118 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1119 {
1120 struct omap_hwmod_addr_space *mem;
1121 int i = 0;
1123 if (!os || !os->addr)
1124 return 0;
1126 do {
1127 mem = &os->addr[i++];
1128 } while (mem->pa_start != mem->pa_end);
1130 return i-1;
1131 }
1133 /**
1134 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1135 * @oh: struct omap_hwmod * to operate on
1136 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1137 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1138 *
1139 * Retrieve a MPU hardware IRQ line number named by @name associated
1140 * with the IP block pointed to by @oh. The IRQ number will be filled
1141 * into the address pointed to by @dma. When @name is non-null, the
1142 * IRQ line number associated with the named entry will be returned.
1143 * If @name is null, the first matching entry will be returned. Data
1144 * order is not meaningful in hwmod data, so callers are strongly
1145 * encouraged to use a non-null @name whenever possible to avoid
1146 * unpredictable effects if hwmod data is later added that causes data
1147 * ordering to change. Returns 0 upon success or a negative error
1148 * code upon error.
1149 */
1150 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1151 unsigned int *irq)
1152 {
1153 int i;
1154 bool found = false;
1156 if (!oh->mpu_irqs)
1157 return -ENOENT;
1159 i = 0;
1160 while (oh->mpu_irqs[i].irq != -1) {
1161 if (name == oh->mpu_irqs[i].name ||
1162 !strcmp(name, oh->mpu_irqs[i].name)) {
1163 found = true;
1164 break;
1165 }
1166 i++;
1167 }
1169 if (!found)
1170 return -ENOENT;
1172 *irq = oh->mpu_irqs[i].irq;
1174 return 0;
1175 }
1177 /**
1178 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1179 * @oh: struct omap_hwmod * to operate on
1180 * @name: pointer to the name of the SDMA request line to fetch (optional)
1181 * @dma: pointer to an unsigned int to store the request line ID to
1182 *
1183 * Retrieve an SDMA request line ID named by @name on the IP block
1184 * pointed to by @oh. The ID will be filled into the address pointed
1185 * to by @dma. When @name is non-null, the request line ID associated
1186 * with the named entry will be returned. If @name is null, the first
1187 * matching entry will be returned. Data order is not meaningful in
1188 * hwmod data, so callers are strongly encouraged to use a non-null
1189 * @name whenever possible to avoid unpredictable effects if hwmod
1190 * data is later added that causes data ordering to change. Returns 0
1191 * upon success or a negative error code upon error.
1192 */
1193 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1194 unsigned int *dma)
1195 {
1196 int i;
1197 bool found = false;
1199 if (!oh->sdma_reqs)
1200 return -ENOENT;
1202 i = 0;
1203 while (oh->sdma_reqs[i].dma_req != -1) {
1204 if (name == oh->sdma_reqs[i].name ||
1205 !strcmp(name, oh->sdma_reqs[i].name)) {
1206 found = true;
1207 break;
1208 }
1209 i++;
1210 }
1212 if (!found)
1213 return -ENOENT;
1215 *dma = oh->sdma_reqs[i].dma_req;
1217 return 0;
1218 }
1220 /**
1221 * _get_addr_space_by_name - fetch address space start & end by name
1222 * @oh: struct omap_hwmod * to operate on
1223 * @name: pointer to the name of the address space to fetch (optional)
1224 * @pa_start: pointer to a u32 to store the starting address to
1225 * @pa_end: pointer to a u32 to store the ending address to
1226 *
1227 * Retrieve address space start and end addresses for the IP block
1228 * pointed to by @oh. The data will be filled into the addresses
1229 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1230 * address space data associated with the named entry will be
1231 * returned. If @name is null, the first matching entry will be
1232 * returned. Data order is not meaningful in hwmod data, so callers
1233 * are strongly encouraged to use a non-null @name whenever possible
1234 * to avoid unpredictable effects if hwmod data is later added that
1235 * causes data ordering to change. Returns 0 upon success or a
1236 * negative error code upon error.
1237 */
1238 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1239 u32 *pa_start, u32 *pa_end)
1240 {
1241 int i, j;
1242 struct omap_hwmod_ocp_if *os;
1243 struct list_head *p = NULL;
1244 bool found = false;
1246 p = oh->slave_ports.next;
1248 i = 0;
1249 while (i < oh->slaves_cnt) {
1250 os = _fetch_next_ocp_if(&p, &i);
1252 if (!os->addr)
1253 return -ENOENT;
1255 j = 0;
1256 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1257 if (name == os->addr[j].name ||
1258 !strcmp(name, os->addr[j].name)) {
1259 found = true;
1260 break;
1261 }
1262 j++;
1263 }
1265 if (found)
1266 break;
1267 }
1269 if (!found)
1270 return -ENOENT;
1272 *pa_start = os->addr[j].pa_start;
1273 *pa_end = os->addr[j].pa_end;
1275 return 0;
1276 }
1278 /**
1279 * _save_mpu_port_index - find and save the index to @oh's MPU port
1280 * @oh: struct omap_hwmod *
1281 *
1282 * Determines the array index of the OCP slave port that the MPU uses
1283 * to address the device, and saves it into the struct omap_hwmod.
1284 * Intended to be called during hwmod registration only. No return
1285 * value.
1286 */
1287 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1288 {
1289 struct omap_hwmod_ocp_if *os = NULL;
1290 struct list_head *p;
1291 int i = 0;
1293 if (!oh)
1294 return;
1296 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1298 p = oh->slave_ports.next;
1300 while (i < oh->slaves_cnt) {
1301 os = _fetch_next_ocp_if(&p, &i);
1302 if (os->user & OCP_USER_MPU) {
1303 oh->_mpu_port = os;
1304 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1305 break;
1306 }
1307 }
1309 return;
1310 }
1312 /**
1313 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1314 * @oh: struct omap_hwmod *
1315 *
1316 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1317 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1318 * communicate with the IP block. This interface need not be directly
1319 * connected to the MPU (and almost certainly is not), but is directly
1320 * connected to the IP block represented by @oh. Returns a pointer
1321 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1322 * error or if there does not appear to be a path from the MPU to this
1323 * IP block.
1324 */
1325 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1326 {
1327 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1328 return NULL;
1330 return oh->_mpu_port;
1331 };
1333 /**
1334 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1335 * @oh: struct omap_hwmod *
1336 *
1337 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1338 * the register target MPU address space; or returns NULL upon error.
1339 */
1340 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1341 {
1342 struct omap_hwmod_ocp_if *os;
1343 struct omap_hwmod_addr_space *mem;
1344 int found = 0, i = 0;
1346 os = _find_mpu_rt_port(oh);
1347 if (!os || !os->addr)
1348 return NULL;
1350 do {
1351 mem = &os->addr[i++];
1352 if (mem->flags & ADDR_TYPE_RT)
1353 found = 1;
1354 } while (!found && mem->pa_start != mem->pa_end);
1356 return (found) ? mem : NULL;
1357 }
1359 /**
1360 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1361 * @oh: struct omap_hwmod *
1362 *
1363 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1364 * by @oh is set to indicate to the PRCM that the IP block is active.
1365 * Usually this means placing the module into smart-idle mode and
1366 * smart-standby, but if there is a bug in the automatic idle handling
1367 * for the IP block, it may need to be placed into the force-idle or
1368 * no-idle variants of these modes. No return value.
1369 */
1370 static void _enable_sysc(struct omap_hwmod *oh)
1371 {
1372 u8 idlemode, sf;
1373 u32 v;
1374 bool clkdm_act;
1375 struct clockdomain *clkdm;
1377 if (!oh->class->sysc)
1378 return;
1380 /*
1381 * Wait until reset has completed, this is needed as the IP
1382 * block is reset automatically by hardware in some cases
1383 * (off-mode for example), and the drivers require the
1384 * IP to be ready when they access it
1385 */
1386 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1387 _enable_optional_clocks(oh);
1388 _wait_softreset_complete(oh);
1389 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1390 _disable_optional_clocks(oh);
1392 v = oh->_sysc_cache;
1393 sf = oh->class->sysc->sysc_flags;
1395 clkdm = _get_clkdm(oh);
1396 if (sf & SYSC_HAS_SIDLEMODE) {
1397 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1398 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1399 idlemode = HWMOD_IDLEMODE_NO;
1400 } else {
1401 if (sf & SYSC_HAS_ENAWAKEUP)
1402 _enable_wakeup(oh, &v);
1403 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1404 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1405 else
1406 idlemode = HWMOD_IDLEMODE_SMART;
1407 }
1409 /*
1410 * This is special handling for some IPs like
1411 * 32k sync timer. Force them to idle!
1412 */
1413 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1414 if (clkdm_act && !(oh->class->sysc->idlemodes &
1415 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1416 idlemode = HWMOD_IDLEMODE_FORCE;
1418 _set_slave_idlemode(oh, idlemode, &v);
1419 }
1421 if (sf & SYSC_HAS_MIDLEMODE) {
1422 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1423 idlemode = HWMOD_IDLEMODE_FORCE;
1424 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1425 idlemode = HWMOD_IDLEMODE_NO;
1426 } else {
1427 if (sf & SYSC_HAS_ENAWAKEUP)
1428 _enable_wakeup(oh, &v);
1429 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1430 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1431 else
1432 idlemode = HWMOD_IDLEMODE_SMART;
1433 }
1434 _set_master_standbymode(oh, idlemode, &v);
1435 }
1437 /*
1438 * XXX The clock framework should handle this, by
1439 * calling into this code. But this must wait until the
1440 * clock structures are tagged with omap_hwmod entries
1441 */
1442 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1443 (sf & SYSC_HAS_CLOCKACTIVITY))
1444 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1446 /* If the cached value is the same as the new value, skip the write */
1447 if (oh->_sysc_cache != v)
1448 _write_sysconfig(v, oh);
1450 /*
1451 * Set the autoidle bit only after setting the smartidle bit
1452 * Setting this will not have any impact on the other modules.
1453 */
1454 if (sf & SYSC_HAS_AUTOIDLE) {
1455 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1456 0 : 1;
1457 _set_module_autoidle(oh, idlemode, &v);
1458 _write_sysconfig(v, oh);
1459 }
1460 }
1462 /**
1463 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1464 * @oh: struct omap_hwmod *
1465 *
1466 * If module is marked as SWSUP_SIDLE, force the module into slave
1467 * idle; otherwise, configure it for smart-idle. If module is marked
1468 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1469 * configure it for smart-standby. No return value.
1470 */
1471 static void _idle_sysc(struct omap_hwmod *oh)
1472 {
1473 u8 idlemode, sf;
1474 u32 v;
1476 if (!oh->class->sysc)
1477 return;
1479 v = oh->_sysc_cache;
1480 sf = oh->class->sysc->sysc_flags;
1482 if (sf & SYSC_HAS_SIDLEMODE) {
1483 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1484 idlemode = HWMOD_IDLEMODE_FORCE;
1485 } else {
1486 if (sf & SYSC_HAS_ENAWAKEUP)
1487 _enable_wakeup(oh, &v);
1488 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1489 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1490 else
1491 idlemode = HWMOD_IDLEMODE_SMART;
1492 }
1493 _set_slave_idlemode(oh, idlemode, &v);
1494 }
1496 if (sf & SYSC_HAS_MIDLEMODE) {
1497 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1498 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1499 idlemode = HWMOD_IDLEMODE_FORCE;
1500 } else {
1501 if (sf & SYSC_HAS_ENAWAKEUP)
1502 _enable_wakeup(oh, &v);
1503 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1504 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1505 else
1506 idlemode = HWMOD_IDLEMODE_SMART;
1507 }
1508 _set_master_standbymode(oh, idlemode, &v);
1509 }
1511 _write_sysconfig(v, oh);
1512 }
1514 /**
1515 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1516 * @oh: struct omap_hwmod *
1517 *
1518 * Force the module into slave idle and master suspend. No return
1519 * value.
1520 */
1521 static void _shutdown_sysc(struct omap_hwmod *oh)
1522 {
1523 u32 v;
1524 u8 sf;
1526 if (!oh->class->sysc)
1527 return;
1529 v = oh->_sysc_cache;
1530 sf = oh->class->sysc->sysc_flags;
1532 if (sf & SYSC_HAS_SIDLEMODE)
1533 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1535 if (sf & SYSC_HAS_MIDLEMODE)
1536 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1538 if (sf & SYSC_HAS_AUTOIDLE)
1539 _set_module_autoidle(oh, 1, &v);
1541 _write_sysconfig(v, oh);
1542 }
1544 /**
1545 * _lookup - find an omap_hwmod by name
1546 * @name: find an omap_hwmod by name
1547 *
1548 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1549 */
1550 static struct omap_hwmod *_lookup(const char *name)
1551 {
1552 struct omap_hwmod *oh, *temp_oh;
1554 oh = NULL;
1556 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1557 if (!strcmp(name, temp_oh->name)) {
1558 oh = temp_oh;
1559 break;
1560 }
1561 }
1563 return oh;
1564 }
1566 /**
1567 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1568 * @oh: struct omap_hwmod *
1569 *
1570 * Convert a clockdomain name stored in a struct omap_hwmod into a
1571 * clockdomain pointer, and save it into the struct omap_hwmod.
1572 * Return -EINVAL if the clkdm_name lookup failed.
1573 */
1574 static int _init_clkdm(struct omap_hwmod *oh)
1575 {
1576 if (!oh->clkdm_name) {
1577 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1578 return 0;
1579 }
1581 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1582 if (!oh->clkdm) {
1583 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1584 oh->name, oh->clkdm_name);
1585 return 0;
1586 }
1588 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1589 oh->name, oh->clkdm_name);
1591 return 0;
1592 }
1594 /**
1595 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1596 * well the clockdomain.
1597 * @oh: struct omap_hwmod *
1598 * @data: not used; pass NULL
1599 *
1600 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1601 * Resolves all clock names embedded in the hwmod. Returns 0 on
1602 * success, or a negative error code on failure.
1603 */
1604 static int _init_clocks(struct omap_hwmod *oh, void *data)
1605 {
1606 int ret = 0;
1608 if (oh->_state != _HWMOD_STATE_REGISTERED)
1609 return 0;
1611 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1613 if (soc_ops.init_clkdm)
1614 ret |= soc_ops.init_clkdm(oh);
1616 ret |= _init_main_clk(oh);
1617 ret |= _init_interface_clks(oh);
1618 ret |= _init_opt_clks(oh);
1620 if (!ret)
1621 oh->_state = _HWMOD_STATE_CLKS_INITED;
1622 else
1623 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1625 return ret;
1626 }
1628 /**
1629 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1630 * @oh: struct omap_hwmod *
1631 * @name: name of the reset line in the context of this hwmod
1632 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1633 *
1634 * Return the bit position of the reset line that match the
1635 * input name. Return -ENOENT if not found.
1636 */
1637 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1638 struct omap_hwmod_rst_info *ohri)
1639 {
1640 int i;
1642 for (i = 0; i < oh->rst_lines_cnt; i++) {
1643 const char *rst_line = oh->rst_lines[i].name;
1644 if (!strcmp(rst_line, name)) {
1645 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1646 ohri->st_shift = oh->rst_lines[i].st_shift;
1647 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1648 oh->name, __func__, rst_line, ohri->rst_shift,
1649 ohri->st_shift);
1651 return 0;
1652 }
1653 }
1655 return -ENOENT;
1656 }
1658 /**
1659 * _assert_hardreset - assert the HW reset line of submodules
1660 * contained in the hwmod module.
1661 * @oh: struct omap_hwmod *
1662 * @name: name of the reset line to lookup and assert
1663 *
1664 * Some IP like dsp, ipu or iva contain processor that require an HW
1665 * reset line to be assert / deassert in order to enable fully the IP.
1666 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1667 * asserting the hardreset line on the currently-booted SoC, or passes
1668 * along the return value from _lookup_hardreset() or the SoC's
1669 * assert_hardreset code.
1670 */
1671 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1672 {
1673 struct omap_hwmod_rst_info ohri;
1674 int ret = -EINVAL;
1676 if (!oh)
1677 return -EINVAL;
1679 if (!soc_ops.assert_hardreset)
1680 return -ENOSYS;
1682 ret = _lookup_hardreset(oh, name, &ohri);
1683 if (ret < 0)
1684 return ret;
1686 ret = soc_ops.assert_hardreset(oh, &ohri);
1688 return ret;
1689 }
1691 /**
1692 * _deassert_hardreset - deassert the HW reset line of submodules contained
1693 * in the hwmod module.
1694 * @oh: struct omap_hwmod *
1695 * @name: name of the reset line to look up and deassert
1696 *
1697 * Some IP like dsp, ipu or iva contain processor that require an HW
1698 * reset line to be assert / deassert in order to enable fully the IP.
1699 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1700 * deasserting the hardreset line on the currently-booted SoC, or passes
1701 * along the return value from _lookup_hardreset() or the SoC's
1702 * deassert_hardreset code.
1703 */
1704 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1705 {
1706 struct omap_hwmod_rst_info ohri;
1707 int ret = -EINVAL;
1708 int hwsup = 0;
1710 if (!oh)
1711 return -EINVAL;
1713 if (!soc_ops.deassert_hardreset)
1714 return -ENOSYS;
1716 ret = _lookup_hardreset(oh, name, &ohri);
1717 if (ret < 0)
1718 return ret;
1720 if (oh->clkdm) {
1721 /*
1722 * A clockdomain must be in SW_SUP otherwise reset
1723 * might not be completed. The clockdomain can be set
1724 * in HW_AUTO only when the module become ready.
1725 */
1726 hwsup = clkdm_in_hwsup(oh->clkdm);
1727 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1728 if (ret) {
1729 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1730 oh->name, oh->clkdm->name, ret);
1731 return ret;
1732 }
1733 }
1735 _enable_clocks(oh);
1736 if (soc_ops.enable_module)
1737 soc_ops.enable_module(oh);
1739 ret = soc_ops.deassert_hardreset(oh, &ohri);
1741 if (soc_ops.disable_module)
1742 soc_ops.disable_module(oh);
1743 _disable_clocks(oh);
1745 if (ret == -EBUSY)
1746 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1748 if (oh->clkdm) {
1749 /*
1750 * Set the clockdomain to HW_AUTO, assuming that the
1751 * previous state was HW_AUTO.
1752 */
1753 if (hwsup)
1754 clkdm_allow_idle(oh->clkdm);
1756 clkdm_hwmod_disable(oh->clkdm, oh);
1757 }
1759 return ret;
1760 }
1762 /**
1763 * _read_hardreset - read the HW reset line state of submodules
1764 * contained in the hwmod module
1765 * @oh: struct omap_hwmod *
1766 * @name: name of the reset line to look up and read
1767 *
1768 * Return the state of the reset line. Returns -EINVAL if @oh is
1769 * null, -ENOSYS if we have no way of reading the hardreset line
1770 * status on the currently-booted SoC, or passes along the return
1771 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1772 * code.
1773 */
1774 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1775 {
1776 struct omap_hwmod_rst_info ohri;
1777 int ret = -EINVAL;
1779 if (!oh)
1780 return -EINVAL;
1782 if (!soc_ops.is_hardreset_asserted)
1783 return -ENOSYS;
1785 ret = _lookup_hardreset(oh, name, &ohri);
1786 if (ret < 0)
1787 return ret;
1789 return soc_ops.is_hardreset_asserted(oh, &ohri);
1790 }
1792 /**
1793 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1794 * @oh: struct omap_hwmod *
1795 *
1796 * If all hardreset lines associated with @oh are asserted, then return true.
1797 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1798 * associated with @oh are asserted, then return false.
1799 * This function is used to avoid executing some parts of the IP block
1800 * enable/disable sequence if its hardreset line is set.
1801 */
1802 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1803 {
1804 int i, rst_cnt = 0;
1806 if (oh->rst_lines_cnt == 0)
1807 return false;
1809 for (i = 0; i < oh->rst_lines_cnt; i++)
1810 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1811 rst_cnt++;
1813 if (oh->rst_lines_cnt == rst_cnt)
1814 return true;
1816 return false;
1817 }
1819 /**
1820 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1821 * hard-reset
1822 * @oh: struct omap_hwmod *
1823 *
1824 * If any hardreset lines associated with @oh are asserted, then
1825 * return true. Otherwise, if no hardreset lines associated with @oh
1826 * are asserted, or if @oh has no hardreset lines, then return false.
1827 * This function is used to avoid executing some parts of the IP block
1828 * enable/disable sequence if any hardreset line is set.
1829 */
1830 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1831 {
1832 int rst_cnt = 0;
1833 int i;
1835 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1836 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1837 rst_cnt++;
1839 return (rst_cnt) ? true : false;
1840 }
1842 /**
1843 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1844 * @oh: struct omap_hwmod *
1845 *
1846 * Disable the PRCM module mode related to the hwmod @oh.
1847 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1848 */
1849 static int _omap4_disable_module(struct omap_hwmod *oh)
1850 {
1851 int v;
1853 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1854 return -EINVAL;
1856 /*
1857 * Since integration code might still be doing something, only
1858 * disable if all lines are under hardreset.
1859 */
1860 if (_are_any_hardreset_lines_asserted(oh))
1861 return 0;
1863 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1865 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1866 oh->clkdm->cm_inst,
1867 oh->clkdm->clkdm_offs,
1868 oh->prcm.omap4.clkctrl_offs);
1870 v = _omap4_wait_target_disable(oh);
1871 if (v)
1872 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1873 oh->name);
1875 return 0;
1876 }
1878 /**
1879 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1880 * @oh: struct omap_hwmod *
1881 *
1882 * Disable the PRCM module mode related to the hwmod @oh.
1883 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1884 */
1885 static int _am33xx_disable_module(struct omap_hwmod *oh)
1886 {
1887 int v;
1889 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1890 return -EINVAL;
1892 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1894 if (_are_any_hardreset_lines_asserted(oh))
1895 return 0;
1897 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1898 oh->prcm.omap4.clkctrl_offs);
1900 v = _am33xx_wait_target_disable(oh);
1901 if (v)
1902 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1903 oh->name);
1905 return 0;
1906 }
1908 /**
1909 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1910 * @oh: struct omap_hwmod *
1911 *
1912 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1913 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1914 * reset this way, -EINVAL if the hwmod is in the wrong state,
1915 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1916 *
1917 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1918 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1919 * use the SYSCONFIG softreset bit to provide the status.
1920 *
1921 * Note that some IP like McBSP do have reset control but don't have
1922 * reset status.
1923 */
1924 static int _ocp_softreset(struct omap_hwmod *oh)
1925 {
1926 u32 v;
1927 int c = 0;
1928 int ret = 0;
1930 if (!oh->class->sysc ||
1931 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1932 return -ENOENT;
1934 /* clocks must be on for this operation */
1935 if (oh->_state != _HWMOD_STATE_ENABLED) {
1936 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1937 oh->name);
1938 return -EINVAL;
1939 }
1941 /* For some modules, all optionnal clocks need to be enabled as well */
1942 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1943 _enable_optional_clocks(oh);
1945 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1947 v = oh->_sysc_cache;
1948 ret = _set_softreset(oh, &v);
1949 if (ret)
1950 goto dis_opt_clks;
1952 _write_sysconfig(v, oh);
1954 if (oh->class->sysc->srst_udelay)
1955 udelay(oh->class->sysc->srst_udelay);
1957 c = _wait_softreset_complete(oh);
1958 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1959 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1960 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1961 ret = -ETIMEDOUT;
1962 goto dis_opt_clks;
1963 } else {
1964 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1965 }
1967 ret = _clear_softreset(oh, &v);
1968 if (ret)
1969 goto dis_opt_clks;
1971 _write_sysconfig(v, oh);
1973 /*
1974 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1975 * _wait_target_ready() or _reset()
1976 */
1978 dis_opt_clks:
1979 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1980 _disable_optional_clocks(oh);
1982 return ret;
1983 }
1985 /**
1986 * _reset - reset an omap_hwmod
1987 * @oh: struct omap_hwmod *
1988 *
1989 * Resets an omap_hwmod @oh. If the module has a custom reset
1990 * function pointer defined, then call it to reset the IP block, and
1991 * pass along its return value to the caller. Otherwise, if the IP
1992 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1993 * associated with it, call a function to reset the IP block via that
1994 * method, and pass along the return value to the caller. Finally, if
1995 * the IP block has some hardreset lines associated with it, assert
1996 * all of those, but do _not_ deassert them. (This is because driver
1997 * authors have expressed an apparent requirement to control the
1998 * deassertion of the hardreset lines themselves.)
1999 *
2000 * The default software reset mechanism for most OMAP IP blocks is
2001 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
2002 * hwmods cannot be reset via this method. Some are not targets and
2003 * therefore have no OCP header registers to access. Others (like the
2004 * IVA) have idiosyncratic reset sequences. So for these relatively
2005 * rare cases, custom reset code can be supplied in the struct
2006 * omap_hwmod_class .reset function pointer.
2007 *
2008 * _set_dmadisable() is called to set the DMADISABLE bit so that it
2009 * does not prevent idling of the system. This is necessary for cases
2010 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
2011 * kernel without disabling dma.
2012 *
2013 * Passes along the return value from either _ocp_softreset() or the
2014 * custom reset function - these must return -EINVAL if the hwmod
2015 * cannot be reset this way or if the hwmod is in the wrong state,
2016 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2017 */
2018 static int _reset(struct omap_hwmod *oh)
2019 {
2020 int i, r;
2022 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
2024 if (oh->class->reset) {
2025 r = oh->class->reset(oh);
2026 } else {
2027 if (oh->rst_lines_cnt > 0) {
2028 for (i = 0; i < oh->rst_lines_cnt; i++)
2029 _assert_hardreset(oh, oh->rst_lines[i].name);
2030 return 0;
2031 } else {
2032 r = _ocp_softreset(oh);
2033 if (r == -ENOENT)
2034 r = 0;
2035 }
2036 }
2038 _set_dmadisable(oh);
2040 /*
2041 * OCP_SYSCONFIG bits need to be reprogrammed after a
2042 * softreset. The _enable() function should be split to avoid
2043 * the rewrite of the OCP_SYSCONFIG register.
2044 */
2045 if (oh->class->sysc) {
2046 _update_sysc_cache(oh);
2047 _enable_sysc(oh);
2048 }
2050 return r;
2051 }
2053 /**
2054 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
2055 *
2056 * Call the appropriate PRM function to clear any logged I/O chain
2057 * wakeups and to reconfigure the chain. This apparently needs to be
2058 * done upon every mux change. Since hwmods can be concurrently
2059 * enabled and idled, hold a spinlock around the I/O chain
2060 * reconfiguration sequence. No return value.
2061 *
2062 * XXX When the PRM code is moved to drivers, this function can be removed,
2063 * as the PRM infrastructure should abstract this.
2064 */
2065 static void _reconfigure_io_chain(void)
2066 {
2067 unsigned long flags;
2069 spin_lock_irqsave(&io_chain_lock, flags);
2071 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
2072 omap3xxx_prm_reconfigure_io_chain();
2073 else if (cpu_is_omap44xx())
2074 omap44xx_prm_reconfigure_io_chain();
2076 spin_unlock_irqrestore(&io_chain_lock, flags);
2077 }
2079 /**
2080 * _omap4_update_context_lost - increment hwmod context loss counter if
2081 * hwmod context was lost, and clear hardware context loss reg
2082 * @oh: hwmod to check for context loss
2083 *
2084 * If the PRCM indicates that the hwmod @oh lost context, increment
2085 * our in-memory context loss counter, and clear the RM_*_CONTEXT
2086 * bits. No return value.
2087 */
2088 static void _omap4_update_context_lost(struct omap_hwmod *oh)
2089 {
2090 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2091 return;
2093 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2094 oh->clkdm->pwrdm.ptr->prcm_offs,
2095 oh->prcm.omap4.context_offs))
2096 return;
2098 oh->prcm.omap4.context_lost_counter++;
2099 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2100 oh->clkdm->pwrdm.ptr->prcm_offs,
2101 oh->prcm.omap4.context_offs);
2102 }
2104 /**
2105 * _omap4_get_context_lost - get context loss counter for a hwmod
2106 * @oh: hwmod to get context loss counter for
2107 *
2108 * Returns the in-memory context loss counter for a hwmod.
2109 */
2110 static int _omap4_get_context_lost(struct omap_hwmod *oh)
2111 {
2112 return oh->prcm.omap4.context_lost_counter;
2113 }
2115 /**
2116 * _enable_preprogram - Pre-program an IP block during the _enable() process
2117 * @oh: struct omap_hwmod *
2118 *
2119 * Some IP blocks (such as AESS) require some additional programming
2120 * after enable before they can enter idle. If a function pointer to
2121 * do so is present in the hwmod data, then call it and pass along the
2122 * return value; otherwise, return 0.
2123 */
2124 static int _enable_preprogram(struct omap_hwmod *oh)
2125 {
2126 if (!oh->class->enable_preprogram)
2127 return 0;
2129 return oh->class->enable_preprogram(oh);
2130 }
2132 /**
2133 * _enable - enable an omap_hwmod
2134 * @oh: struct omap_hwmod *
2135 *
2136 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2137 * register target. Returns -EINVAL if the hwmod is in the wrong
2138 * state or passes along the return value of _wait_target_ready().
2139 */
2140 static int _enable(struct omap_hwmod *oh)
2141 {
2142 int r;
2143 int hwsup = 0;
2145 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2147 /*
2148 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2149 * state at init. Now that someone is really trying to enable
2150 * them, just ensure that the hwmod mux is set.
2151 */
2152 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2153 /*
2154 * If the caller has mux data populated, do the mux'ing
2155 * which wouldn't have been done as part of the _enable()
2156 * done during setup.
2157 */
2158 if (oh->mux)
2159 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2161 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2162 return 0;
2163 }
2165 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2166 oh->_state != _HWMOD_STATE_IDLE &&
2167 oh->_state != _HWMOD_STATE_DISABLED) {
2168 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2169 oh->name);
2170 return -EINVAL;
2171 }
2173 /*
2174 * If an IP block contains HW reset lines and all of them are
2175 * asserted, we let integration code associated with that
2176 * block handle the enable. We've received very little
2177 * information on what those driver authors need, and until
2178 * detailed information is provided and the driver code is
2179 * posted to the public lists, this is probably the best we
2180 * can do.
2181 */
2182 if (_are_all_hardreset_lines_asserted(oh))
2183 return 0;
2185 /* Mux pins for device runtime if populated */
2186 if (oh->mux && (!oh->mux->enabled ||
2187 ((oh->_state == _HWMOD_STATE_IDLE) &&
2188 oh->mux->pads_dynamic))) {
2189 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2190 _reconfigure_io_chain();
2191 } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
2192 _reconfigure_io_chain();
2193 }
2195 _add_initiator_dep(oh, mpu_oh);
2197 if (oh->clkdm) {
2198 /*
2199 * A clockdomain must be in SW_SUP before enabling
2200 * completely the module. The clockdomain can be set
2201 * in HW_AUTO only when the module become ready.
2202 */
2203 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2204 !clkdm_missing_idle_reporting(oh->clkdm);
2205 r = clkdm_hwmod_enable(oh->clkdm, oh);
2206 if (r) {
2207 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2208 oh->name, oh->clkdm->name, r);
2209 return r;
2210 }
2211 }
2213 _enable_clocks(oh);
2214 if (soc_ops.enable_module)
2215 soc_ops.enable_module(oh);
2216 if (oh->flags & HWMOD_BLOCK_WFI)
2217 cpu_idle_poll_ctrl(true);
2219 if (soc_ops.update_context_lost)
2220 soc_ops.update_context_lost(oh);
2222 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2223 -EINVAL;
2224 if (!r) {
2225 /*
2226 * Set the clockdomain to HW_AUTO only if the target is ready,
2227 * assuming that the previous state was HW_AUTO
2228 */
2229 if (oh->clkdm && hwsup)
2230 clkdm_allow_idle(oh->clkdm);
2232 oh->_state = _HWMOD_STATE_ENABLED;
2234 /* Access the sysconfig only if the target is ready */
2235 if (oh->class->sysc) {
2236 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2237 _update_sysc_cache(oh);
2238 _enable_sysc(oh);
2239 }
2240 r = _enable_preprogram(oh);
2241 } else {
2242 if (soc_ops.disable_module)
2243 soc_ops.disable_module(oh);
2244 _disable_clocks(oh);
2245 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2246 oh->name, r);
2248 if (oh->clkdm)
2249 clkdm_hwmod_disable(oh->clkdm, oh);
2250 }
2252 return r;
2253 }
2255 /**
2256 * _idle - idle an omap_hwmod
2257 * @oh: struct omap_hwmod *
2258 *
2259 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2260 * no further work. Returns -EINVAL if the hwmod is in the wrong
2261 * state or returns 0.
2262 */
2263 static int _idle(struct omap_hwmod *oh)
2264 {
2265 if (oh->flags & HWMOD_NO_IDLE) {
2266 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2267 return 0;
2268 }
2270 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2272 if (oh->_state != _HWMOD_STATE_ENABLED) {
2273 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2274 oh->name);
2275 return -EINVAL;
2276 }
2278 if (_are_all_hardreset_lines_asserted(oh))
2279 return 0;
2281 if (oh->class->sysc)
2282 _idle_sysc(oh);
2283 _del_initiator_dep(oh, mpu_oh);
2285 if (oh->flags & HWMOD_BLOCK_WFI)
2286 cpu_idle_poll_ctrl(false);
2287 if (soc_ops.disable_module)
2288 soc_ops.disable_module(oh);
2290 /*
2291 * The module must be in idle mode before disabling any parents
2292 * clocks. Otherwise, the parent clock might be disabled before
2293 * the module transition is done, and thus will prevent the
2294 * transition to complete properly.
2295 */
2296 _disable_clocks(oh);
2297 if (oh->clkdm)
2298 clkdm_hwmod_disable(oh->clkdm, oh);
2300 /* Mux pins for device idle if populated */
2301 if (oh->mux && oh->mux->pads_dynamic) {
2302 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2303 _reconfigure_io_chain();
2304 } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
2305 _reconfigure_io_chain();
2306 }
2308 oh->_state = _HWMOD_STATE_IDLE;
2310 return 0;
2311 }
2313 /**
2314 * _shutdown - shutdown an omap_hwmod
2315 * @oh: struct omap_hwmod *
2316 *
2317 * Shut down an omap_hwmod @oh. This should be called when the driver
2318 * used for the hwmod is removed or unloaded or if the driver is not
2319 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2320 * state or returns 0.
2321 */
2322 static int _shutdown(struct omap_hwmod *oh)
2323 {
2324 int ret, i;
2325 u8 prev_state;
2327 if (oh->_state != _HWMOD_STATE_IDLE &&
2328 oh->_state != _HWMOD_STATE_ENABLED) {
2329 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2330 oh->name);
2331 return -EINVAL;
2332 }
2334 if (_are_all_hardreset_lines_asserted(oh))
2335 return 0;
2337 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2339 if (oh->class->pre_shutdown) {
2340 prev_state = oh->_state;
2341 if (oh->_state == _HWMOD_STATE_IDLE)
2342 _enable(oh);
2343 ret = oh->class->pre_shutdown(oh);
2344 if (ret) {
2345 if (prev_state == _HWMOD_STATE_IDLE)
2346 _idle(oh);
2347 return ret;
2348 }
2349 }
2351 if (oh->class->sysc) {
2352 if (oh->_state == _HWMOD_STATE_IDLE)
2353 _enable(oh);
2354 _shutdown_sysc(oh);
2355 }
2357 /* clocks and deps are already disabled in idle */
2358 if (oh->_state == _HWMOD_STATE_ENABLED) {
2359 _del_initiator_dep(oh, mpu_oh);
2360 /* XXX what about the other system initiators here? dma, dsp */
2361 if (oh->flags & HWMOD_BLOCK_WFI)
2362 cpu_idle_poll_ctrl(false);
2363 if (soc_ops.disable_module)
2364 soc_ops.disable_module(oh);
2365 _disable_clocks(oh);
2366 if (oh->clkdm)
2367 clkdm_hwmod_disable(oh->clkdm, oh);
2368 }
2369 /* XXX Should this code also force-disable the optional clocks? */
2371 for (i = 0; i < oh->rst_lines_cnt; i++)
2372 _assert_hardreset(oh, oh->rst_lines[i].name);
2374 /* Mux pins to safe mode or use populated off mode values */
2375 if (oh->mux)
2376 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
2378 oh->_state = _HWMOD_STATE_DISABLED;
2380 return 0;
2381 }
2383 static int of_dev_find_hwmod(struct device_node *np,
2384 struct omap_hwmod *oh)
2385 {
2386 int count, i, res;
2387 const char *p;
2389 count = of_property_count_strings(np, "ti,hwmods");
2390 if (count < 1)
2391 return -ENODEV;
2393 for (i = 0; i < count; i++) {
2394 res = of_property_read_string_index(np, "ti,hwmods",
2395 i, &p);
2396 if (res)
2397 continue;
2398 if (!strcmp(p, oh->name)) {
2399 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
2400 np->name, i, oh->name);
2401 return i;
2402 }
2403 }
2405 return -ENODEV;
2406 }
2408 /**
2409 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2410 * @np: struct device_node *
2411 * @oh: struct omap_hwmod *
2412 * @index: index of the entry found
2413 * @found: struct device_node * found or NULL
2414 *
2415 * Parse the dt blob and find out needed hwmod. Recursive function is
2416 * implemented to take care hierarchical dt blob parsing.
2417 * Return: Returns 0 on success, -ENODEV when not found.
2418 */
2419 static int of_dev_hwmod_lookup(struct device_node *np,
2420 struct omap_hwmod *oh,
2421 int *index,
2422 struct device_node **found)
2423 {
2424 struct device_node *np0 = NULL;
2425 int res;
2427 res = of_dev_find_hwmod(np, oh);
2428 if (res >= 0) {
2429 *found = np;
2430 *index = res;
2431 return 0;
2432 }
2434 for_each_child_of_node(np, np0) {
2435 struct device_node *fc;
2436 int i;
2438 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2439 if (res == 0) {
2440 *found = fc;
2441 *index = i;
2442 return 0;
2443 }
2444 }
2446 *found = NULL;
2447 *index = 0;
2449 return -ENODEV;
2450 }
2452 /**
2453 * _setup_reidle- check hwmod @oh and add to reidle list
2454 * @oh: struct omap_hwmod *
2455 * @n: (unused)
2456 *
2457 * Check hwmod for HWMOD_NEEDS_REIDLE flag and add to list if
2458 * necessary. Return 0 on success.
2459 */
2460 static int _setup_reidle(struct omap_hwmod *oh, void *data)
2461 {
2462 int ret;
2464 if (oh->flags & HWMOD_NEEDS_REIDLE) {
2465 ret = omap_hwmod_enable_reidle(oh);
2467 if (!ret)
2468 return ret;
2469 }
2471 return 0;
2472 }
2474 /**
2475 * _init_mpu_rt_base - populate the virtual address for a hwmod
2476 * @oh: struct omap_hwmod * to locate the virtual address
2477 * @data: (unused, caller should pass NULL)
2478 * @index: index of the reg entry iospace in device tree
2479 * @np: struct device_node * of the IP block's device node in the DT data
2480 *
2481 * Cache the virtual address used by the MPU to access this IP block's
2482 * registers. This address is needed early so the OCP registers that
2483 * are part of the device's address space can be ioremapped properly.
2484 *
2485 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2486 * -ENXIO on absent or invalid register target address space.
2487 */
2488 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2489 int index, struct device_node *np)
2490 {
2491 struct omap_hwmod_addr_space *mem;
2492 void __iomem *va_start = NULL;
2494 if (!oh)
2495 return -EINVAL;
2497 _save_mpu_port_index(oh);
2499 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2500 return -ENXIO;
2502 mem = _find_mpu_rt_addr_space(oh);
2503 if (!mem) {
2504 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2505 oh->name);
2507 /* Extract the IO space from device tree blob */
2508 if (!np)
2509 return -ENXIO;
2511 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2512 } else {
2513 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2514 }
2516 if (!va_start) {
2517 if (mem)
2518 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2519 else
2520 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
2521 oh->name, index, np->full_name);
2522 return -ENXIO;
2523 }
2525 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2526 oh->name, va_start);
2528 oh->_mpu_rt_va = va_start;
2529 return 0;
2530 }
2532 /**
2533 * _init - initialize internal data for the hwmod @oh
2534 * @oh: struct omap_hwmod *
2535 * @n: (unused)
2536 *
2537 * Look up the clocks and the address space used by the MPU to access
2538 * registers belonging to the hwmod @oh. @oh must already be
2539 * registered at this point. This is the first of two phases for
2540 * hwmod initialization. Code called here does not touch any hardware
2541 * registers, it simply prepares internal data structures. Returns 0
2542 * upon success or if the hwmod isn't registered or if the hwmod's
2543 * address space is not defined, or -EINVAL upon failure.
2544 */
2545 static int __init _init(struct omap_hwmod *oh, void *data)
2546 {
2547 int r, index;
2548 struct device_node *np = NULL;
2550 if (oh->_state != _HWMOD_STATE_REGISTERED)
2551 return 0;
2553 if (of_have_populated_dt()) {
2554 struct device_node *bus;
2556 bus = of_find_node_by_name(NULL, "ocp");
2557 if (!bus)
2558 return -ENODEV;
2560 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2561 if (r)
2562 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2563 else if (np && index)
2564 pr_warn("omap_hwmod: %s using broken dt data from %s\n",
2565 oh->name, np->name);
2566 }
2568 if (oh->class->sysc) {
2569 r = _init_mpu_rt_base(oh, NULL, index, np);
2570 if (r < 0) {
2571 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2572 oh->name);
2573 return 0;
2574 }
2575 }
2577 r = _init_clocks(oh, NULL);
2578 if (r < 0) {
2579 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2580 return -EINVAL;
2581 }
2583 if (np) {
2584 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2585 oh->flags |= HWMOD_INIT_NO_RESET;
2586 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2587 oh->flags |= HWMOD_INIT_NO_IDLE;
2588 if (of_find_property(np, "ti,no-init", NULL))
2589 oh->flags |= HWMOD_NO_INIT;
2590 if (of_find_property(np, "ti,no-idle", NULL))
2591 oh->flags |= HWMOD_NO_IDLE;
2592 }
2593 if (oh->flags & HWMOD_NO_INIT)
2594 oh->_state = _HWMOD_STATE_DISABLED;
2595 else
2596 oh->_state = _HWMOD_STATE_INITIALIZED;
2598 return 0;
2599 }
2601 /**
2602 * _setup_iclk_autoidle - configure an IP block's interface clocks
2603 * @oh: struct omap_hwmod *
2604 *
2605 * Set up the module's interface clocks. XXX This function is still mostly
2606 * a stub; implementing this properly requires iclk autoidle usecounting in
2607 * the clock code. No return value.
2608 */
2609 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2610 {
2611 struct omap_hwmod_ocp_if *os;
2612 struct list_head *p;
2613 int i = 0;
2614 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2615 return;
2617 p = oh->slave_ports.next;
2619 while (i < oh->slaves_cnt) {
2620 os = _fetch_next_ocp_if(&p, &i);
2621 if (!os->_clk)
2622 continue;
2624 if (os->flags & OCPIF_SWSUP_IDLE) {
2625 /* XXX omap_iclk_deny_idle(c); */
2626 } else {
2627 /* XXX omap_iclk_allow_idle(c); */
2628 clk_enable(os->_clk);
2629 }
2630 }
2632 return;
2633 }
2635 /**
2636 * _setup_reset - reset an IP block during the setup process
2637 * @oh: struct omap_hwmod *
2638 *
2639 * Reset the IP block corresponding to the hwmod @oh during the setup
2640 * process. The IP block is first enabled so it can be successfully
2641 * reset. Returns 0 upon success or a negative error code upon
2642 * failure.
2643 */
2644 static int __init _setup_reset(struct omap_hwmod *oh)
2645 {
2646 int r;
2648 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2649 return -EINVAL;
2651 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2652 return -EPERM;
2654 if (oh->rst_lines_cnt == 0) {
2655 r = _enable(oh);
2656 if (r) {
2657 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2658 oh->name, oh->_state);
2659 return -EINVAL;
2660 }
2661 }
2663 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2664 r = _reset(oh);
2666 return r;
2667 }
2669 /**
2670 * _setup_postsetup - transition to the appropriate state after _setup
2671 * @oh: struct omap_hwmod *
2672 *
2673 * Place an IP block represented by @oh into a "post-setup" state --
2674 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2675 * this function is called at the end of _setup().) The postsetup
2676 * state for an IP block can be changed by calling
2677 * omap_hwmod_enter_postsetup_state() early in the boot process,
2678 * before one of the omap_hwmod_setup*() functions are called for the
2679 * IP block.
2680 *
2681 * The IP block stays in this state until a PM runtime-based driver is
2682 * loaded for that IP block. A post-setup state of IDLE is
2683 * appropriate for almost all IP blocks with runtime PM-enabled
2684 * drivers, since those drivers are able to enable the IP block. A
2685 * post-setup state of ENABLED is appropriate for kernels with PM
2686 * runtime disabled. The DISABLED state is appropriate for unusual IP
2687 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2688 * included, since the WDTIMER starts running on reset and will reset
2689 * the MPU if left active.
2690 *
2691 * This post-setup mechanism is deprecated. Once all of the OMAP
2692 * drivers have been converted to use PM runtime, and all of the IP
2693 * block data and interconnect data is available to the hwmod code, it
2694 * should be possible to replace this mechanism with a "lazy reset"
2695 * arrangement. In a "lazy reset" setup, each IP block is enabled
2696 * when the driver first probes, then all remaining IP blocks without
2697 * drivers are either shut down or enabled after the drivers have
2698 * loaded. However, this cannot take place until the above
2699 * preconditions have been met, since otherwise the late reset code
2700 * has no way of knowing which IP blocks are in use by drivers, and
2701 * which ones are unused.
2702 *
2703 * No return value.
2704 */
2705 static void __init _setup_postsetup(struct omap_hwmod *oh)
2706 {
2707 u8 postsetup_state;
2709 if (oh->rst_lines_cnt > 0)
2710 return;
2712 postsetup_state = oh->_postsetup_state;
2713 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2714 postsetup_state = _HWMOD_STATE_ENABLED;
2716 /*
2717 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2718 * it should be set by the core code as a runtime flag during startup
2719 */
2720 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2721 (postsetup_state == _HWMOD_STATE_IDLE)) {
2722 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2723 postsetup_state = _HWMOD_STATE_ENABLED;
2724 }
2726 if (postsetup_state == _HWMOD_STATE_IDLE)
2727 _idle(oh);
2728 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2729 _shutdown(oh);
2730 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2731 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2732 oh->name, postsetup_state);
2734 return;
2735 }
2737 /**
2738 * _setup - prepare IP block hardware for use
2739 * @oh: struct omap_hwmod *
2740 * @n: (unused, pass NULL)
2741 *
2742 * Configure the IP block represented by @oh. This may include
2743 * enabling the IP block, resetting it, and placing it into a
2744 * post-setup state, depending on the type of IP block and applicable
2745 * flags. IP blocks are reset to prevent any previous configuration
2746 * by the bootloader or previous operating system from interfering
2747 * with power management or other parts of the system. The reset can
2748 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2749 * two phases for hwmod initialization. Code called here generally
2750 * affects the IP block hardware, or system integration hardware
2751 * associated with the IP block. Returns 0.
2752 */
2753 static int __init _setup(struct omap_hwmod *oh, void *data)
2754 {
2755 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2756 return 0;
2758 if (oh->parent_hwmod) {
2759 int r;
2761 r = _enable(oh->parent_hwmod);
2762 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2763 oh->name, oh->parent_hwmod->name);
2764 }
2766 _setup_iclk_autoidle(oh);
2768 if (!_setup_reset(oh))
2769 _setup_postsetup(oh);
2771 if (oh->parent_hwmod) {
2772 u8 postsetup_state;
2774 postsetup_state = oh->parent_hwmod->_postsetup_state;
2776 if (postsetup_state == _HWMOD_STATE_IDLE)
2777 _idle(oh->parent_hwmod);
2778 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2779 _shutdown(oh->parent_hwmod);
2780 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2781 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2782 oh->parent_hwmod->name, postsetup_state);
2783 }
2785 return 0;
2786 }
2788 /**
2789 * _register - register a struct omap_hwmod
2790 * @oh: struct omap_hwmod *
2791 *
2792 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2793 * already has been registered by the same name; -EINVAL if the
2794 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2795 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2796 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2797 * success.
2798 *
2799 * XXX The data should be copied into bootmem, so the original data
2800 * should be marked __initdata and freed after init. This would allow
2801 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2802 * that the copy process would be relatively complex due to the large number
2803 * of substructures.
2804 */
2805 static int __init _register(struct omap_hwmod *oh)
2806 {
2807 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2808 (oh->_state != _HWMOD_STATE_UNKNOWN))
2809 return -EINVAL;
2811 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2813 if (_lookup(oh->name))
2814 return -EEXIST;
2816 list_add_tail(&oh->node, &omap_hwmod_list);
2818 INIT_LIST_HEAD(&oh->master_ports);
2819 INIT_LIST_HEAD(&oh->slave_ports);
2820 spin_lock_init(&oh->_lock);
2822 oh->_state = _HWMOD_STATE_REGISTERED;
2824 /*
2825 * XXX Rather than doing a strcmp(), this should test a flag
2826 * set in the hwmod data, inserted by the autogenerator code.
2827 */
2828 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2829 mpu_oh = oh;
2831 return 0;
2832 }
2834 /**
2835 * _alloc_links - return allocated memory for hwmod links
2836 * @ml: pointer to a struct omap_hwmod_link * for the master link
2837 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2838 *
2839 * Return pointers to two struct omap_hwmod_link records, via the
2840 * addresses pointed to by @ml and @sl. Will first attempt to return
2841 * memory allocated as part of a large initial block, but if that has
2842 * been exhausted, will allocate memory itself. Since ideally this
2843 * second allocation path will never occur, the number of these
2844 * 'supplemental' allocations will be logged when debugging is
2845 * enabled. Returns 0.
2846 */
2847 static int __init _alloc_links(struct omap_hwmod_link **ml,
2848 struct omap_hwmod_link **sl)
2849 {
2850 unsigned int sz;
2852 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2853 *ml = &linkspace[free_ls++];
2854 *sl = &linkspace[free_ls++];
2855 return 0;
2856 }
2858 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2860 *sl = NULL;
2861 *ml = memblock_virt_alloc(sz, 0);
2863 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2865 ls_supp++;
2866 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2867 ls_supp * LINKS_PER_OCP_IF);
2869 return 0;
2870 };
2872 /**
2873 * _add_link - add an interconnect between two IP blocks
2874 * @oi: pointer to a struct omap_hwmod_ocp_if record
2875 *
2876 * Add struct omap_hwmod_link records connecting the master IP block
2877 * specified in @oi->master to @oi, and connecting the slave IP block
2878 * specified in @oi->slave to @oi. This code is assumed to run before
2879 * preemption or SMP has been enabled, thus avoiding the need for
2880 * locking in this code. Changes to this assumption will require
2881 * additional locking. Returns 0.
2882 */
2883 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2884 {
2885 struct omap_hwmod_link *ml, *sl;
2887 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2888 oi->slave->name);
2890 _alloc_links(&ml, &sl);
2892 ml->ocp_if = oi;
2893 INIT_LIST_HEAD(&ml->node);
2894 list_add(&ml->node, &oi->master->master_ports);
2895 oi->master->masters_cnt++;
2897 sl->ocp_if = oi;
2898 INIT_LIST_HEAD(&sl->node);
2899 list_add(&sl->node, &oi->slave->slave_ports);
2900 oi->slave->slaves_cnt++;
2902 return 0;
2903 }
2905 /**
2906 * _register_link - register a struct omap_hwmod_ocp_if
2907 * @oi: struct omap_hwmod_ocp_if *
2908 *
2909 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2910 * has already been registered; -EINVAL if @oi is NULL or if the
2911 * record pointed to by @oi is missing required fields; or 0 upon
2912 * success.
2913 *
2914 * XXX The data should be copied into bootmem, so the original data
2915 * should be marked __initdata and freed after init. This would allow
2916 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2917 */
2918 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2919 {
2920 if (!oi || !oi->master || !oi->slave || !oi->user)
2921 return -EINVAL;
2923 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2924 return -EEXIST;
2926 pr_debug("omap_hwmod: registering link from %s to %s\n",
2927 oi->master->name, oi->slave->name);
2929 /*
2930 * Register the connected hwmods, if they haven't been
2931 * registered already
2932 */
2933 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2934 _register(oi->master);
2936 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2937 _register(oi->slave);
2939 _add_link(oi);
2941 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2943 return 0;
2944 }
2946 /**
2947 * _alloc_linkspace - allocate large block of hwmod links
2948 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2949 *
2950 * Allocate a large block of struct omap_hwmod_link records. This
2951 * improves boot time significantly by avoiding the need to allocate
2952 * individual records one by one. If the number of records to
2953 * allocate in the block hasn't been manually specified, this function
2954 * will count the number of struct omap_hwmod_ocp_if records in @ois
2955 * and use that to determine the allocation size. For SoC families
2956 * that require multiple list registrations, such as OMAP3xxx, this
2957 * estimation process isn't optimal, so manual estimation is advised
2958 * in those cases. Returns -EEXIST if the allocation has already occurred
2959 * or 0 upon success.
2960 */
2961 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2962 {
2963 unsigned int i = 0;
2964 unsigned int sz;
2966 if (linkspace) {
2967 WARN(1, "linkspace already allocated\n");
2968 return -EEXIST;
2969 }
2971 if (max_ls == 0)
2972 while (ois[i++])
2973 max_ls += LINKS_PER_OCP_IF;
2975 sz = sizeof(struct omap_hwmod_link) * max_ls;
2977 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2978 __func__, sz, max_ls);
2980 linkspace = memblock_virt_alloc(sz, 0);
2982 return 0;
2983 }
2985 /* Static functions intended only for use in soc_ops field function pointers */
2987 /**
2988 * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
2989 * @oh: struct omap_hwmod *
2990 *
2991 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2992 * does not have an IDLEST bit or if the module successfully leaves
2993 * slave idle; otherwise, pass along the return value of the
2994 * appropriate *_cm*_wait_module_ready() function.
2995 */
2996 static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
2997 {
2998 if (!oh)
2999 return -EINVAL;
3001 if (oh->flags & HWMOD_NO_IDLEST)
3002 return 0;
3004 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
3006 return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
3007 oh->prcm.omap2.idlest_reg_id,
3008 oh->prcm.omap2.idlest_idle_bit);
3009 }
3011 /**
3012 * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
3013 * @oh: struct omap_hwmod *
3014 *
3015 * Wait for a module @oh to leave slave idle. Returns 0 if the module
3016 * does not have an IDLEST bit or if the module successfully leaves
3017 * slave idle; otherwise, pass along the return value of the
3018 * appropriate *_cm*_wait_module_ready() function.
3019 */
3020 static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
3021 {
3022 if (!oh)
3023 return -EINVAL;
3025 if (oh->flags & HWMOD_NO_IDLEST)
3026 return 0;
3028 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
3030 return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
3031 oh->prcm.omap2.idlest_reg_id,
3032 oh->prcm.omap2.idlest_idle_bit);
3033 }
3035 /**
3036 * _omap4_wait_target_ready - wait for a module to leave slave idle
3037 * @oh: struct omap_hwmod *
3038 *
3039 * Wait for a module @oh to leave slave idle. Returns 0 if the module
3040 * does not have an IDLEST bit or if the module successfully leaves
3041 * slave idle; otherwise, pass along the return value of the
3042 * appropriate *_cm*_wait_module_ready() function.
3043 */
3044 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
3045 {
3046 if (!oh)
3047 return -EINVAL;
3049 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
3050 return 0;
3052 /* XXX check module SIDLEMODE, hardreset status */
3054 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
3055 oh->clkdm->cm_inst,
3056 oh->clkdm->clkdm_offs,
3057 oh->prcm.omap4.clkctrl_offs);
3058 }
3060 /**
3061 * _am33xx_wait_target_ready - wait for a module to leave slave idle
3062 * @oh: struct omap_hwmod *
3063 *
3064 * Wait for a module @oh to leave slave idle. Returns 0 if the module
3065 * does not have an IDLEST bit or if the module successfully leaves
3066 * slave idle; otherwise, pass along the return value of the
3067 * appropriate *_cm*_wait_module_ready() function.
3068 */
3069 static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
3070 {
3071 if (!oh || !oh->clkdm)
3072 return -EINVAL;
3074 if (oh->flags & HWMOD_NO_IDLEST)
3075 return 0;
3077 /* XXX check module SIDLEMODE, hardreset status */
3079 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
3080 oh->clkdm->clkdm_offs,
3081 oh->prcm.omap4.clkctrl_offs);
3082 }
3084 /**
3085 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
3086 * @oh: struct omap_hwmod * to assert hardreset
3087 * @ohri: hardreset line data
3088 *
3089 * Call omap2_prm_assert_hardreset() with parameters extracted from
3090 * the hwmod @oh and the hardreset line data @ohri. Only intended for
3091 * use as an soc_ops function pointer. Passes along the return value
3092 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
3093 * for removal when the PRM code is moved into drivers/.
3094 */
3095 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
3096 struct omap_hwmod_rst_info *ohri)
3097 {
3098 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
3099 ohri->rst_shift);
3100 }
3102 /**
3103 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
3104 * @oh: struct omap_hwmod * to deassert hardreset
3105 * @ohri: hardreset line data
3106 *
3107 * Call omap2_prm_deassert_hardreset() with parameters extracted from
3108 * the hwmod @oh and the hardreset line data @ohri. Only intended for
3109 * use as an soc_ops function pointer. Passes along the return value
3110 * from omap2_prm_deassert_hardreset(). XXX This function is
3111 * scheduled for removal when the PRM code is moved into drivers/.
3112 */
3113 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
3114 struct omap_hwmod_rst_info *ohri)
3115 {
3116 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
3117 ohri->rst_shift,
3118 ohri->st_shift);
3119 }
3121 /**
3122 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
3123 * @oh: struct omap_hwmod * to test hardreset
3124 * @ohri: hardreset line data
3125 *
3126 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
3127 * from the hwmod @oh and the hardreset line data @ohri. Only
3128 * intended for use as an soc_ops function pointer. Passes along the
3129 * return value from omap2_prm_is_hardreset_asserted(). XXX This
3130 * function is scheduled for removal when the PRM code is moved into
3131 * drivers/.
3132 */
3133 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
3134 struct omap_hwmod_rst_info *ohri)
3135 {
3136 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
3137 ohri->st_shift);
3138 }
3140 /**
3141 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3142 * @oh: struct omap_hwmod * to assert hardreset
3143 * @ohri: hardreset line data
3144 *
3145 * Call omap4_prminst_assert_hardreset() with parameters extracted
3146 * from the hwmod @oh and the hardreset line data @ohri. Only
3147 * intended for use as an soc_ops function pointer. Passes along the
3148 * return value from omap4_prminst_assert_hardreset(). XXX This
3149 * function is scheduled for removal when the PRM code is moved into
3150 * drivers/.
3151 */
3152 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
3153 struct omap_hwmod_rst_info *ohri)
3154 {
3155 if (!oh->clkdm)
3156 return -EINVAL;
3158 return omap4_prminst_assert_hardreset(ohri->rst_shift,
3159 oh->clkdm->pwrdm.ptr->prcm_partition,
3160 oh->clkdm->pwrdm.ptr->prcm_offs,
3161 oh->prcm.omap4.rstctrl_offs);
3162 }
3164 /**
3165 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
3166 * @oh: struct omap_hwmod * to deassert hardreset
3167 * @ohri: hardreset line data
3168 *
3169 * Call omap4_prminst_deassert_hardreset() with parameters extracted
3170 * from the hwmod @oh and the hardreset line data @ohri. Only
3171 * intended for use as an soc_ops function pointer. Passes along the
3172 * return value from omap4_prminst_deassert_hardreset(). XXX This
3173 * function is scheduled for removal when the PRM code is moved into
3174 * drivers/.
3175 */
3176 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
3177 struct omap_hwmod_rst_info *ohri)
3178 {
3179 if (!oh->clkdm)
3180 return -EINVAL;
3182 if (ohri->st_shift)
3183 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
3184 oh->name, ohri->name);
3185 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
3186 oh->clkdm->pwrdm.ptr->prcm_partition,
3187 oh->clkdm->pwrdm.ptr->prcm_offs,
3188 oh->prcm.omap4.rstctrl_offs);
3189 }
3191 /**
3192 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
3193 * @oh: struct omap_hwmod * to test hardreset
3194 * @ohri: hardreset line data
3195 *
3196 * Call omap4_prminst_is_hardreset_asserted() with parameters
3197 * extracted from the hwmod @oh and the hardreset line data @ohri.
3198 * Only intended for use as an soc_ops function pointer. Passes along
3199 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
3200 * This function is scheduled for removal when the PRM code is moved
3201 * into drivers/.
3202 */
3203 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
3204 struct omap_hwmod_rst_info *ohri)
3205 {
3206 if (!oh->clkdm)
3207 return -EINVAL;
3209 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
3210 oh->clkdm->pwrdm.ptr->prcm_partition,
3211 oh->clkdm->pwrdm.ptr->prcm_offs,
3212 oh->prcm.omap4.rstctrl_offs);
3213 }
3215 /**
3216 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3217 * @oh: struct omap_hwmod * to assert hardreset
3218 * @ohri: hardreset line data
3219 *
3220 * Call am33xx_prminst_assert_hardreset() with parameters extracted
3221 * from the hwmod @oh and the hardreset line data @ohri. Only
3222 * intended for use as an soc_ops function pointer. Passes along the
3223 * return value from am33xx_prminst_assert_hardreset(). XXX This
3224 * function is scheduled for removal when the PRM code is moved into
3225 * drivers/.
3226 */
3227 static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
3228 struct omap_hwmod_rst_info *ohri)
3230 {
3231 return am33xx_prm_assert_hardreset(ohri->rst_shift,
3232 oh->clkdm->pwrdm.ptr->prcm_offs,
3233 oh->prcm.omap4.rstctrl_offs);
3234 }
3236 /**
3237 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3238 * @oh: struct omap_hwmod * to deassert hardreset
3239 * @ohri: hardreset line data
3240 *
3241 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3242 * from the hwmod @oh and the hardreset line data @ohri. Only
3243 * intended for use as an soc_ops function pointer. Passes along the
3244 * return value from am33xx_prminst_deassert_hardreset(). XXX This
3245 * function is scheduled for removal when the PRM code is moved into
3246 * drivers/.
3247 */
3248 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3249 struct omap_hwmod_rst_info *ohri)
3250 {
3251 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
3252 ohri->st_shift,
3253 oh->clkdm->pwrdm.ptr->prcm_offs,
3254 oh->prcm.omap4.rstctrl_offs,
3255 oh->prcm.omap4.rstst_offs);
3256 }
3258 /**
3259 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
3260 * @oh: struct omap_hwmod * to test hardreset
3261 * @ohri: hardreset line data
3262 *
3263 * Call am33xx_prminst_is_hardreset_asserted() with parameters
3264 * extracted from the hwmod @oh and the hardreset line data @ohri.
3265 * Only intended for use as an soc_ops function pointer. Passes along
3266 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
3267 * This function is scheduled for removal when the PRM code is moved
3268 * into drivers/.
3269 */
3270 static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
3271 struct omap_hwmod_rst_info *ohri)
3272 {
3273 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
3274 oh->clkdm->pwrdm.ptr->prcm_offs,
3275 oh->prcm.omap4.rstctrl_offs);
3276 }
3278 /**
3279 * _reidle - enable then idle a single hwmod
3280 *
3281 * enables and then immediately reidles an hwmod, as certain hwmods may
3282 * not have their sysconfig registers programmed in an idle friendly state
3283 * by default
3284 */
3285 static void _reidle(struct omap_hwmod *oh)
3286 {
3287 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
3289 omap_hwmod_enable(oh);
3290 omap_hwmod_softreset(oh);
3291 omap_hwmod_idle(oh);
3292 }
3294 /**
3295 * _reidle_all - enable then idle all hwmods in oh_reidle_list
3296 *
3297 * Called by pm_notifier to make sure flagged modules do not block suspend
3298 * after context loss.
3299 */
3300 static int _reidle_all(void)
3301 {
3302 struct omap_hwmod_list *oh_list_item = NULL;
3304 list_for_each_entry(oh_list_item, &oh_reidle_list, oh_list) {
3305 _reidle(oh_list_item->oh);
3306 }
3308 return 0;
3309 }
3311 static int _omap_device_pm_notifier(struct notifier_block *self,
3312 unsigned long action, void *dev)
3313 {
3314 switch (action) {
3315 case PM_POST_SUSPEND:
3316 _reidle_all();
3317 }
3319 return NOTIFY_DONE;
3320 }
3322 struct notifier_block pm_nb = {
3323 .notifier_call = _omap_device_pm_notifier,
3324 };
3326 /* Public functions */
3328 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3329 {
3330 if (oh->flags & HWMOD_16BIT_REG)
3331 return __raw_readw(oh->_mpu_rt_va + reg_offs);
3332 else
3333 return __raw_readl(oh->_mpu_rt_va + reg_offs);
3334 }
3336 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3337 {
3338 if (oh->flags & HWMOD_16BIT_REG)
3339 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
3340 else
3341 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
3342 }
3344 /**
3345 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3346 * @oh: struct omap_hwmod *
3347 *
3348 * This is a public function exposed to drivers. Some drivers may need to do
3349 * some settings before and after resetting the device. Those drivers after
3350 * doing the necessary settings could use this function to start a reset by
3351 * setting the SYSCONFIG.SOFTRESET bit.
3352 */
3353 int omap_hwmod_softreset(struct omap_hwmod *oh)
3354 {
3355 u32 v;
3356 int ret;
3358 if (!oh || !(oh->_sysc_cache))
3359 return -EINVAL;
3361 v = oh->_sysc_cache;
3362 ret = _set_softreset(oh, &v);
3363 if (ret)
3364 goto error;
3365 _write_sysconfig(v, oh);
3367 ret = _clear_softreset(oh, &v);
3368 if (ret)
3369 goto error;
3370 _write_sysconfig(v, oh);
3372 error:
3373 return ret;
3374 }
3376 /**
3377 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3378 * @name: name of the omap_hwmod to look up
3379 *
3380 * Given a @name of an omap_hwmod, return a pointer to the registered
3381 * struct omap_hwmod *, or NULL upon error.
3382 */
3383 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3384 {
3385 struct omap_hwmod *oh;
3387 if (!name)
3388 return NULL;
3390 oh = _lookup(name);
3392 return oh;
3393 }
3395 /**
3396 * omap_hwmod_for_each - call function for each registered omap_hwmod
3397 * @fn: pointer to a callback function
3398 * @data: void * data to pass to callback function
3399 *
3400 * Call @fn for each registered omap_hwmod, passing @data to each
3401 * function. @fn must return 0 for success or any other value for
3402 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3403 * will stop and the non-zero return value will be passed to the
3404 * caller of omap_hwmod_for_each(). @fn is called with
3405 * omap_hwmod_for_each() held.
3406 */
3407 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3408 void *data)
3409 {
3410 struct omap_hwmod *temp_oh;
3411 int ret = 0;
3413 if (!fn)
3414 return -EINVAL;
3416 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3417 ret = (*fn)(temp_oh, data);
3418 if (ret)
3419 break;
3420 }
3422 return ret;
3423 }
3425 /**
3426 * omap_hwmod_register_links - register an array of hwmod links
3427 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3428 *
3429 * Intended to be called early in boot before the clock framework is
3430 * initialized. If @ois is not null, will register all omap_hwmods
3431 * listed in @ois that are valid for this chip. Returns -EINVAL if
3432 * omap_hwmod_init() hasn't been called before calling this function,
3433 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3434 * success.
3435 */
3436 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3437 {
3438 int r, i;
3440 if (!inited)
3441 return -EINVAL;
3443 if (!ois)
3444 return 0;
3446 if (ois[0] == NULL) /* Empty list */
3447 return 0;
3449 if (!linkspace) {
3450 if (_alloc_linkspace(ois)) {
3451 pr_err("omap_hwmod: could not allocate link space\n");
3452 return -ENOMEM;
3453 }
3454 }
3456 i = 0;
3457 do {
3458 r = _register_link(ois[i]);
3459 WARN(r && r != -EEXIST,
3460 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3461 ois[i]->master->name, ois[i]->slave->name, r);
3462 } while (ois[++i]);
3464 return 0;
3465 }
3467 /**
3468 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3469 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3470 *
3471 * If the hwmod data corresponding to the MPU subsystem IP block
3472 * hasn't been initialized and set up yet, do so now. This must be
3473 * done first since sleep dependencies may be added from other hwmods
3474 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3475 * return value.
3476 */
3477 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3478 {
3479 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3480 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3481 __func__, MPU_INITIATOR_NAME);
3482 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3483 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3484 }
3486 /**
3487 * omap_hwmod_setup_one - set up a single hwmod
3488 * @oh_name: const char * name of the already-registered hwmod to set up
3489 *
3490 * Initialize and set up a single hwmod. Intended to be used for a
3491 * small number of early devices, such as the timer IP blocks used for
3492 * the scheduler clock. Must be called after omap2_clk_init().
3493 * Resolves the struct clk names to struct clk pointers for each
3494 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3495 * -EINVAL upon error or 0 upon success.
3496 */
3497 int __init omap_hwmod_setup_one(const char *oh_name)
3498 {
3499 struct omap_hwmod *oh;
3501 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3503 oh = _lookup(oh_name);
3504 if (!oh) {
3505 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3506 return -EINVAL;
3507 }
3509 _ensure_mpu_hwmod_is_setup(oh);
3511 _init(oh, NULL);
3512 _setup(oh, NULL);
3514 return 0;
3515 }
3517 /**
3518 * omap_hwmod_setup_all - set up all registered IP blocks
3519 *
3520 * Initialize and set up all IP blocks registered with the hwmod code.
3521 * Must be called after omap2_clk_init(). Resolves the struct clk
3522 * names to struct clk pointers for each registered omap_hwmod. Also
3523 * calls _setup() on each hwmod. Returns 0 upon success.
3524 */
3525 static int __init omap_hwmod_setup_all(void)
3526 {
3527 _ensure_mpu_hwmod_is_setup(NULL);
3529 omap_hwmod_for_each(_init, NULL);
3530 omap_hwmod_for_each(_setup, NULL);
3532 return 0;
3533 }
3534 omap_core_initcall(omap_hwmod_setup_all);
3536 /**
3537 * omap_hwmod_enable_reidle - add an omap_hwmod to reidle list
3538 * @oh: struct omap_hwmod *
3539 *
3540 * Adds the omap_hwmod to the oh_reidle_list so it will gets enabled then idled
3541 * after each suspend cycle. Returns 0 on success.
3542 */
3543 int omap_hwmod_enable_reidle(struct omap_hwmod *oh)
3544 {
3545 struct omap_hwmod_list *oh_list_item = NULL;
3547 oh_list_item = kzalloc(sizeof(*oh_list_item), GFP_KERNEL);
3549 if (!oh_list_item)
3550 return -ENOMEM;
3552 oh_list_item->oh = oh;
3553 list_add(&oh_list_item->oh_list, &oh_reidle_list);
3555 pr_debug("omap_hwmod: %s: added to reidle list\n", oh->name);
3557 return 0;
3558 }
3560 /**
3561 * omap_hwmod_disable_reidle - remove an omap_hwmod from reidle list
3562 * @oh: struct omap_hwmod *
3563 *
3564 * Remove the omap_hwmod from the oh_reidle_list. Returns 0 on success.
3565 */
3566 int omap_hwmod_disable_reidle(struct omap_hwmod *oh)
3567 {
3568 struct omap_hwmod_list *li, *oh_list_item = NULL;
3570 list_for_each_entry_safe(oh_list_item, li, &oh_reidle_list, oh_list) {
3571 if (oh_list_item->oh == oh) {
3572 list_del(&oh_list_item->oh_list);
3573 pr_debug("omap_hwmod: %s: removed from reidle list\n",
3574 oh->name);
3575 kfree(oh_list_item);
3576 }
3577 }
3579 return 0;
3580 }
3582 /**
3583 * omap_hwmod_enable - enable an omap_hwmod
3584 * @oh: struct omap_hwmod *
3585 *
3586 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3587 * Returns -EINVAL on error or passes along the return value from _enable().
3588 */
3589 int omap_hwmod_enable(struct omap_hwmod *oh)
3590 {
3591 int r;
3592 unsigned long flags;
3594 if (!oh)
3595 return -EINVAL;
3597 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
3598 r = _enable(oh);
3599 spin_unlock_irqrestore(&oh->_lock, flags);
3601 return r;
3602 }
3604 /**
3605 * omap_hwmod_idle - idle an omap_hwmod
3606 * @oh: struct omap_hwmod *
3607 *
3608 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3609 * Returns -EINVAL on error or passes along the return value from _idle().
3610 */
3611 int omap_hwmod_idle(struct omap_hwmod *oh)
3612 {
3613 unsigned long flags;
3615 if (!oh)
3616 return -EINVAL;
3618 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
3619 _idle(oh);
3620 spin_unlock_irqrestore(&oh->_lock, flags);
3622 return 0;
3623 }
3625 /**
3626 * omap_hwmod_shutdown - shutdown an omap_hwmod
3627 * @oh: struct omap_hwmod *
3628 *
3629 * Shutdown an omap_hwmod @oh. Intended to be called by
3630 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3631 * the return value from _shutdown().
3632 */
3633 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3634 {
3635 unsigned long flags;
3637 if (!oh)
3638 return -EINVAL;
3640 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
3641 _shutdown(oh);
3642 spin_unlock_irqrestore(&oh->_lock, flags);
3644 return 0;
3645 }
3647 /**
3648 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3649 * @oh: struct omap_hwmod *oh
3650 *
3651 * Intended to be called by the omap_device code.
3652 */
3653 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3654 {
3655 unsigned long flags;
3657 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
3658 _enable_clocks(oh);
3659 spin_unlock_irqrestore(&oh->_lock, flags);
3661 return 0;
3662 }
3664 /**
3665 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3666 * @oh: struct omap_hwmod *oh
3667 *
3668 * Intended to be called by the omap_device code.
3669 */
3670 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3671 {
3672 unsigned long flags;
3674 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
3675 _disable_clocks(oh);
3676 spin_unlock_irqrestore(&oh->_lock, flags);
3678 return 0;
3679 }
3681 /**
3682 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3683 * @oh: struct omap_hwmod *oh
3684 *
3685 * Intended to be called by drivers and core code when all posted
3686 * writes to a device must complete before continuing further
3687 * execution (for example, after clearing some device IRQSTATUS
3688 * register bits)
3689 *
3690 * XXX what about targets with multiple OCP threads?
3691 */
3692 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3693 {
3694 BUG_ON(!oh);
3696 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
3697 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3698 oh->name);
3699 return;
3700 }
3702 /*
3703 * Forces posted writes to complete on the OCP thread handling
3704 * register writes
3705 */
3706 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
3707 }
3709 /**
3710 * omap_hwmod_reset - reset the hwmod
3711 * @oh: struct omap_hwmod *
3712 *
3713 * Under some conditions, a driver may wish to reset the entire device.
3714 * Called from omap_device code. Returns -EINVAL on error or passes along
3715 * the return value from _reset().
3716 */
3717 int omap_hwmod_reset(struct omap_hwmod *oh)
3718 {
3719 int r;
3720 unsigned long flags;
3722 if (!oh)
3723 return -EINVAL;
3725 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
3726 r = _reset(oh);
3727 spin_unlock_irqrestore(&oh->_lock, flags);
3729 return r;
3730 }
3732 /*
3733 * IP block data retrieval functions
3734 */
3736 /**
3737 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3738 * @oh: struct omap_hwmod *
3739 * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
3740 *
3741 * Count the number of struct resource array elements necessary to
3742 * contain omap_hwmod @oh resources. Intended to be called by code
3743 * that registers omap_devices. Intended to be used to determine the
3744 * size of a dynamically-allocated struct resource array, before
3745 * calling omap_hwmod_fill_resources(). Returns the number of struct
3746 * resource array elements needed.
3747 *
3748 * XXX This code is not optimized. It could attempt to merge adjacent
3749 * resource IDs.
3750 *
3751 */
3752 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
3753 {
3754 int ret = 0;
3756 if (flags & IORESOURCE_IRQ)
3757 ret += _count_mpu_irqs(oh);
3759 if (flags & IORESOURCE_DMA)
3760 ret += _count_sdma_reqs(oh);
3762 if (flags & IORESOURCE_MEM) {
3763 int i = 0;
3764 struct omap_hwmod_ocp_if *os;
3765 struct list_head *p = oh->slave_ports.next;
3767 while (i < oh->slaves_cnt) {
3768 os = _fetch_next_ocp_if(&p, &i);
3769 ret += _count_ocp_if_addr_spaces(os);
3770 }
3771 }
3773 return ret;
3774 }
3776 /**
3777 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3778 * @oh: struct omap_hwmod *
3779 * @res: pointer to the first element of an array of struct resource to fill
3780 *
3781 * Fill the struct resource array @res with resource data from the
3782 * omap_hwmod @oh. Intended to be called by code that registers
3783 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3784 * number of array elements filled.
3785 */
3786 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3787 {
3788 struct omap_hwmod_ocp_if *os;
3789 struct list_head *p;
3790 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3791 int r = 0;
3793 /* For each IRQ, DMA, memory area, fill in array.*/
3795 mpu_irqs_cnt = _count_mpu_irqs(oh);
3796 for (i = 0; i < mpu_irqs_cnt; i++) {
3797 (res + r)->name = (oh->mpu_irqs + i)->name;
3798 (res + r)->start = (oh->mpu_irqs + i)->irq;
3799 (res + r)->end = (oh->mpu_irqs + i)->irq;
3800 (res + r)->flags = IORESOURCE_IRQ;
3801 r++;
3802 }
3804 sdma_reqs_cnt = _count_sdma_reqs(oh);
3805 for (i = 0; i < sdma_reqs_cnt; i++) {
3806 (res + r)->name = (oh->sdma_reqs + i)->name;
3807 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3808 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3809 (res + r)->flags = IORESOURCE_DMA;
3810 r++;
3811 }
3813 p = oh->slave_ports.next;
3815 i = 0;
3816 while (i < oh->slaves_cnt) {
3817 os = _fetch_next_ocp_if(&p, &i);
3818 addr_cnt = _count_ocp_if_addr_spaces(os);
3820 for (j = 0; j < addr_cnt; j++) {
3821 (res + r)->name = (os->addr + j)->name;
3822 (res + r)->start = (os->addr + j)->pa_start;
3823 (res + r)->end = (os->addr + j)->pa_end;
3824 (res + r)->flags = IORESOURCE_MEM;
3825 r++;
3826 }
3827 }
3829 return r;
3830 }
3832 /**
3833 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3834 * @oh: struct omap_hwmod *
3835 * @res: pointer to the array of struct resource to fill
3836 *
3837 * Fill the struct resource array @res with dma resource data from the
3838 * omap_hwmod @oh. Intended to be called by code that registers
3839 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3840 * number of array elements filled.
3841 */
3842 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3843 {
3844 int i, sdma_reqs_cnt;
3845 int r = 0;
3847 sdma_reqs_cnt = _count_sdma_reqs(oh);
3848 for (i = 0; i < sdma_reqs_cnt; i++) {
3849 (res + r)->name = (oh->sdma_reqs + i)->name;
3850 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3851 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3852 (res + r)->flags = IORESOURCE_DMA;
3853 r++;
3854 }
3856 return r;
3857 }
3859 /**
3860 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3861 * @oh: struct omap_hwmod * to operate on
3862 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3863 * @name: pointer to the name of the data to fetch (optional)
3864 * @rsrc: pointer to a struct resource, allocated by the caller
3865 *
3866 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3867 * data for the IP block pointed to by @oh. The data will be filled
3868 * into a struct resource record pointed to by @rsrc. The struct
3869 * resource must be allocated by the caller. When @name is non-null,
3870 * the data associated with the matching entry in the IRQ/SDMA/address
3871 * space hwmod data arrays will be returned. If @name is null, the
3872 * first array entry will be returned. Data order is not meaningful
3873 * in hwmod data, so callers are strongly encouraged to use a non-null
3874 * @name whenever possible to avoid unpredictable effects if hwmod
3875 * data is later added that causes data ordering to change. This
3876 * function is only intended for use by OMAP core code. Device
3877 * drivers should not call this function - the appropriate bus-related
3878 * data accessor functions should be used instead. Returns 0 upon
3879 * success or a negative error code upon error.
3880 */
3881 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3882 const char *name, struct resource *rsrc)
3883 {
3884 int r;
3885 unsigned int irq, dma;
3886 u32 pa_start, pa_end;
3888 if (!oh || !rsrc)
3889 return -EINVAL;
3891 if (type == IORESOURCE_IRQ) {
3892 r = _get_mpu_irq_by_name(oh, name, &irq);
3893 if (r)
3894 return r;
3896 rsrc->start = irq;
3897 rsrc->end = irq;
3898 } else if (type == IORESOURCE_DMA) {
3899 r = _get_sdma_req_by_name(oh, name, &dma);
3900 if (r)
3901 return r;
3903 rsrc->start = dma;
3904 rsrc->end = dma;
3905 } else if (type == IORESOURCE_MEM) {
3906 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3907 if (r)
3908 return r;
3910 rsrc->start = pa_start;
3911 rsrc->end = pa_end;
3912 } else {
3913 return -EINVAL;
3914 }
3916 rsrc->flags = type;
3917 rsrc->name = name;
3919 return 0;
3920 }
3922 /**
3923 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3924 * @oh: struct omap_hwmod *
3925 *
3926 * Return the powerdomain pointer associated with the OMAP module
3927 * @oh's main clock. If @oh does not have a main clk, return the
3928 * powerdomain associated with the interface clock associated with the
3929 * module's MPU port. (XXX Perhaps this should use the SDMA port
3930 * instead?) Returns NULL on error, or a struct powerdomain * on
3931 * success.
3932 */
3933 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3934 {
3935 struct clk *c;
3936 struct omap_hwmod_ocp_if *oi;
3937 struct clockdomain *clkdm;
3938 struct clk_hw_omap *clk;
3940 if (!oh)
3941 return NULL;
3943 if (oh->clkdm)
3944 return oh->clkdm->pwrdm.ptr;
3946 if (oh->_clk) {
3947 c = oh->_clk;
3948 } else {
3949 oi = _find_mpu_rt_port(oh);
3950 if (!oi)
3951 return NULL;
3952 c = oi->_clk;
3953 }
3955 clk = to_clk_hw_omap(__clk_get_hw(c));
3956 clkdm = clk->clkdm;
3957 if (!clkdm)
3958 return NULL;
3960 return clkdm->pwrdm.ptr;
3961 }
3963 /**
3964 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3965 * @oh: struct omap_hwmod *
3966 *
3967 * Returns the virtual address corresponding to the beginning of the
3968 * module's register target, in the address range that is intended to
3969 * be used by the MPU. Returns the virtual address upon success or NULL
3970 * upon error.
3971 */
3972 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3973 {
3974 if (!oh)
3975 return NULL;
3977 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3978 return NULL;
3980 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3981 return NULL;
3983 return oh->_mpu_rt_va;
3984 }
3986 /**
3987 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3988 * @oh: struct omap_hwmod *
3989 * @init_oh: struct omap_hwmod * (initiator)
3990 *
3991 * Add a sleep dependency between the initiator @init_oh and @oh.
3992 * Intended to be called by DSP/Bridge code via platform_data for the
3993 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3994 * code needs to add/del initiator dependencies dynamically
3995 * before/after accessing a device. Returns the return value from
3996 * _add_initiator_dep().
3997 *
3998 * XXX Keep a usecount in the clockdomain code
3999 */
4000 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
4001 struct omap_hwmod *init_oh)
4002 {
4003 return _add_initiator_dep(oh, init_oh);
4004 }
4006 /*
4007 * XXX what about functions for drivers to save/restore ocp_sysconfig
4008 * for context save/restore operations?
4009 */
4011 /**
4012 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
4013 * @oh: struct omap_hwmod *
4014 * @init_oh: struct omap_hwmod * (initiator)
4015 *
4016 * Remove a sleep dependency between the initiator @init_oh and @oh.
4017 * Intended to be called by DSP/Bridge code via platform_data for the
4018 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
4019 * code needs to add/del initiator dependencies dynamically
4020 * before/after accessing a device. Returns the return value from
4021 * _del_initiator_dep().
4022 *
4023 * XXX Keep a usecount in the clockdomain code
4024 */
4025 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
4026 struct omap_hwmod *init_oh)
4027 {
4028 return _del_initiator_dep(oh, init_oh);
4029 }
4031 /**
4032 * omap_hwmod_enable_wakeup - allow device to wake up the system
4033 * @oh: struct omap_hwmod *
4034 *
4035 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
4036 * send wakeups to the PRCM, and enable I/O ring wakeup events for
4037 * this IP block if it has dynamic mux entries. Eventually this
4038 * should set PRCM wakeup registers to cause the PRCM to receive
4039 * wakeup events from the module. Does not set any wakeup routing
4040 * registers beyond this point - if the module is to wake up any other
4041 * module or subsystem, that must be set separately. Called by
4042 * omap_device code. Returns -EINVAL on error or 0 upon success.
4043 */
4044 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
4045 {
4046 unsigned long flags;
4047 u32 v;
4049 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
4051 if (oh->class->sysc &&
4052 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
4053 v = oh->_sysc_cache;
4054 _enable_wakeup(oh, &v);
4055 _write_sysconfig(v, oh);
4056 }
4058 _set_idle_ioring_wakeup(oh, true);
4059 spin_unlock_irqrestore(&oh->_lock, flags);
4061 return 0;
4062 }
4064 /**
4065 * omap_hwmod_disable_wakeup - prevent device from waking the system
4066 * @oh: struct omap_hwmod *
4067 *
4068 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
4069 * from sending wakeups to the PRCM, and disable I/O ring wakeup
4070 * events for this IP block if it has dynamic mux entries. Eventually
4071 * this should clear PRCM wakeup registers to cause the PRCM to ignore
4072 * wakeup events from the module. Does not set any wakeup routing
4073 * registers beyond this point - if the module is to wake up any other
4074 * module or subsystem, that must be set separately. Called by
4075 * omap_device code. Returns -EINVAL on error or 0 upon success.
4076 */
4077 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
4078 {
4079 unsigned long flags;
4080 u32 v;
4082 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
4084 if (oh->class->sysc &&
4085 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
4086 v = oh->_sysc_cache;
4087 _disable_wakeup(oh, &v);
4088 _write_sysconfig(v, oh);
4089 }
4091 _set_idle_ioring_wakeup(oh, false);
4092 spin_unlock_irqrestore(&oh->_lock, flags);
4094 return 0;
4095 }
4097 /**
4098 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
4099 * contained in the hwmod module.
4100 * @oh: struct omap_hwmod *
4101 * @name: name of the reset line to lookup and assert
4102 *
4103 * Some IP like dsp, ipu or iva contain processor that require
4104 * an HW reset line to be assert / deassert in order to enable fully
4105 * the IP. Returns -EINVAL if @oh is null or if the operation is not
4106 * yet supported on this OMAP; otherwise, passes along the return value
4107 * from _assert_hardreset().
4108 */
4109 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
4110 {
4111 int ret;
4112 unsigned long flags;
4114 if (!oh)
4115 return -EINVAL;
4117 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
4118 ret = _assert_hardreset(oh, name);
4119 spin_unlock_irqrestore(&oh->_lock, flags);
4121 return ret;
4122 }
4124 /**
4125 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
4126 * contained in the hwmod module.
4127 * @oh: struct omap_hwmod *
4128 * @name: name of the reset line to look up and deassert
4129 *
4130 * Some IP like dsp, ipu or iva contain processor that require
4131 * an HW reset line to be assert / deassert in order to enable fully
4132 * the IP. Returns -EINVAL if @oh is null or if the operation is not
4133 * yet supported on this OMAP; otherwise, passes along the return value
4134 * from _deassert_hardreset().
4135 */
4136 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
4137 {
4138 int ret;
4139 unsigned long flags;
4141 if (!oh)
4142 return -EINVAL;
4144 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
4145 ret = _deassert_hardreset(oh, name);
4146 spin_unlock_irqrestore(&oh->_lock, flags);
4148 return ret;
4149 }
4151 /**
4152 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
4153 * contained in the hwmod module
4154 * @oh: struct omap_hwmod *
4155 * @name: name of the reset line to look up and read
4156 *
4157 * Return the current state of the hwmod @oh's reset line named @name:
4158 * returns -EINVAL upon parameter error or if this operation
4159 * is unsupported on the current OMAP; otherwise, passes along the return
4160 * value from _read_hardreset().
4161 */
4162 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
4163 {
4164 int ret;
4165 unsigned long flags;
4167 if (!oh)
4168 return -EINVAL;
4170 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
4171 ret = _read_hardreset(oh, name);
4172 spin_unlock_irqrestore(&oh->_lock, flags);
4174 return ret;
4175 }
4178 /**
4179 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
4180 * @classname: struct omap_hwmod_class name to search for
4181 * @fn: callback function pointer to call for each hwmod in class @classname
4182 * @user: arbitrary context data to pass to the callback function
4183 *
4184 * For each omap_hwmod of class @classname, call @fn.
4185 * If the callback function returns something other than
4186 * zero, the iterator is terminated, and the callback function's return
4187 * value is passed back to the caller. Returns 0 upon success, -EINVAL
4188 * if @classname or @fn are NULL, or passes back the error code from @fn.
4189 */
4190 int omap_hwmod_for_each_by_class(const char *classname,
4191 int (*fn)(struct omap_hwmod *oh,
4192 void *user),
4193 void *user)
4194 {
4195 struct omap_hwmod *temp_oh;
4196 int ret = 0;
4198 if (!classname || !fn)
4199 return -EINVAL;
4201 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
4202 __func__, classname);
4204 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
4205 if (!strcmp(temp_oh->class->name, classname)) {
4206 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
4207 __func__, temp_oh->name);
4208 ret = (*fn)(temp_oh, user);
4209 if (ret)
4210 break;
4211 }
4212 }
4214 if (ret)
4215 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
4216 __func__, ret);
4218 return ret;
4219 }
4221 /**
4222 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
4223 * @oh: struct omap_hwmod *
4224 * @state: state that _setup() should leave the hwmod in
4225 *
4226 * Sets the hwmod state that @oh will enter at the end of _setup()
4227 * (called by omap_hwmod_setup_*()). See also the documentation
4228 * for _setup_postsetup(), above. Returns 0 upon success or
4229 * -EINVAL if there is a problem with the arguments or if the hwmod is
4230 * in the wrong state.
4231 */
4232 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
4233 {
4234 int ret;
4235 unsigned long flags;
4237 if (!oh)
4238 return -EINVAL;
4240 if (state != _HWMOD_STATE_DISABLED &&
4241 state != _HWMOD_STATE_ENABLED &&
4242 state != _HWMOD_STATE_IDLE)
4243 return -EINVAL;
4245 spin_lock_irqsave_nested(&oh->_lock, flags, oh->lockdep_class);
4247 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4248 ret = -EINVAL;
4249 goto ohsps_unlock;
4250 }
4252 oh->_postsetup_state = state;
4253 ret = 0;
4255 ohsps_unlock:
4256 spin_unlock_irqrestore(&oh->_lock, flags);
4258 return ret;
4259 }
4261 /**
4262 * omap_hwmod_get_context_loss_count - get lost context count
4263 * @oh: struct omap_hwmod *
4264 *
4265 * Returns the context loss count of associated @oh
4266 * upon success, or zero if no context loss data is available.
4267 *
4268 * On OMAP4, this queries the per-hwmod context loss register,
4269 * assuming one exists. If not, or on OMAP2/3, this queries the
4270 * enclosing powerdomain context loss count.
4271 */
4272 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
4273 {
4274 struct powerdomain *pwrdm;
4275 int ret = 0;
4277 if (soc_ops.get_context_lost)
4278 return soc_ops.get_context_lost(oh);
4280 pwrdm = omap_hwmod_get_pwrdm(oh);
4281 if (pwrdm)
4282 ret = pwrdm_get_context_loss_count(pwrdm);
4284 return ret;
4285 }
4287 /**
4288 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
4289 * @oh: struct omap_hwmod *
4290 *
4291 * Prevent the hwmod @oh from being reset during the setup process.
4292 * Intended for use by board-*.c files on boards with devices that
4293 * cannot tolerate being reset. Must be called before the hwmod has
4294 * been set up. Returns 0 upon success or negative error code upon
4295 * failure.
4296 */
4297 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
4298 {
4299 if (!oh)
4300 return -EINVAL;
4302 if (oh->_state != _HWMOD_STATE_REGISTERED) {
4303 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
4304 oh->name);
4305 return -EINVAL;
4306 }
4308 oh->flags |= HWMOD_INIT_NO_RESET;
4310 return 0;
4311 }
4313 /**
4314 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
4315 * @oh: struct omap_hwmod * containing hwmod mux entries
4316 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
4317 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
4318 *
4319 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
4320 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
4321 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
4322 * this function is not called for a given pad_idx, then the ISR
4323 * associated with @oh's first MPU IRQ will be triggered when an I/O
4324 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
4325 * the _dynamic or wakeup_ entry: if there are other entries not
4326 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
4327 * entries are NOT COUNTED in the dynamic pad index. This function
4328 * must be called separately for each pad that requires its interrupt
4329 * to be re-routed this way. Returns -EINVAL if there is an argument
4330 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
4331 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
4332 *
4333 * XXX This function interface is fragile. Rather than using array
4334 * indexes, which are subject to unpredictable change, it should be
4335 * using hwmod IRQ names, and some other stable key for the hwmod mux
4336 * pad records.
4337 */
4338 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
4339 {
4340 int nr_irqs;
4342 might_sleep();
4344 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
4345 pad_idx >= oh->mux->nr_pads_dynamic)
4346 return -EINVAL;
4348 /* Check the number of available mpu_irqs */
4349 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
4350 ;
4352 if (irq_idx >= nr_irqs)
4353 return -EINVAL;
4355 if (!oh->mux->irqs) {
4356 /* XXX What frees this? */
4357 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
4358 GFP_KERNEL);
4359 if (!oh->mux->irqs)
4360 return -ENOMEM;
4361 }
4362 oh->mux->irqs[pad_idx] = irq_idx;
4364 return 0;
4365 }
4367 /**
4368 * omap_hwmod_init - initialize the hwmod code
4369 *
4370 * Sets up some function pointers needed by the hwmod code to operate on the
4371 * currently-booted SoC. Intended to be called once during kernel init
4372 * before any hwmods are registered. No return value.
4373 */
4374 void __init omap_hwmod_init(void)
4375 {
4376 if (cpu_is_omap24xx()) {
4377 soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
4378 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4379 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4380 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4381 } else if (cpu_is_omap34xx()) {
4382 soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
4383 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4384 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4385 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4386 soc_ops.init_clkdm = _init_clkdm;
4387 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4388 soc_ops.enable_module = _omap4_enable_module;
4389 soc_ops.disable_module = _omap4_disable_module;
4390 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4391 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4392 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4393 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4394 soc_ops.init_clkdm = _init_clkdm;
4395 soc_ops.update_context_lost = _omap4_update_context_lost;
4396 soc_ops.get_context_lost = _omap4_get_context_lost;
4397 } else if (soc_is_am43xx()) {
4398 soc_ops.enable_module = _omap4_enable_module;
4399 soc_ops.disable_module = _omap4_disable_module;
4400 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4401 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4402 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4403 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4404 soc_ops.init_clkdm = _init_clkdm;
4405 } else if (soc_is_am33xx()) {
4406 soc_ops.enable_module = _am33xx_enable_module;
4407 soc_ops.disable_module = _am33xx_disable_module;
4408 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
4409 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4410 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4411 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4412 soc_ops.init_clkdm = _init_clkdm;
4413 } else {
4414 WARN(1, "omap_hwmod: unknown SoC type\n");
4415 }
4417 inited = true;
4418 }
4420 /**
4421 * omap_hwmod_setup_reidle - add hwmods to reidle list and register notifier
4422 *
4423 * Returns 0 on success.
4424 */
4425 int omap_hwmod_setup_reidle(void)
4426 {
4427 omap_hwmod_for_each(_setup_reidle, NULL);
4429 if (!list_empty(&oh_reidle_list))
4430 register_pm_notifier(&pm_nb);
4432 return 0;
4433 }
4435 /**
4436 * omap_hwmod_get_main_clk - get pointer to main clock name
4437 * @oh: struct omap_hwmod *
4438 *
4439 * Returns the main clock name assocated with @oh upon success,
4440 * or NULL if @oh is NULL.
4441 */
4442 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4443 {
4444 if (!oh)
4445 return NULL;
4447 return oh->main_clk;
4448 }
4450 static int omap_hwmod_save_context(struct omap_hwmod *oh, void *unused)
4451 {
4452 int i;
4453 for (i = 0; i < oh->rst_lines_cnt; i++)
4454 oh->rst_lines[i].context =
4455 _read_hardreset(oh, oh->rst_lines[i].name);
4456 return 0;
4457 }
4459 static int omap_hwmod_restore_context(struct omap_hwmod *oh, void *unused)
4460 {
4461 int i;
4462 for (i = 0; i < oh->rst_lines_cnt; i++)
4463 if (oh->rst_lines[i].context)
4464 _assert_hardreset(oh, oh->rst_lines[i].name);
4465 else
4466 _deassert_hardreset(oh, oh->rst_lines[i].name);
4468 if (oh->_state == _HWMOD_STATE_ENABLED) {
4469 if (soc_ops.enable_module)
4470 soc_ops.enable_module(oh);
4471 } else {
4472 if (oh->flags & HWMOD_NEEDS_REIDLE)
4473 _reidle(oh);
4474 else if (soc_ops.disable_module)
4475 soc_ops.disable_module(oh);
4476 }
4478 return 0;
4479 }
4481 void omap_hwmods_save_context(void)
4482 {
4483 omap_hwmod_for_each(omap_hwmod_save_context, NULL);
4484 }
4486 void omap_hwmods_restore_context(void)
4487 {
4488 omap_hwmod_for_each(omap_hwmod_restore_context, NULL);
4489 }