1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
21 #include <linux/kvm.h>
22 #include <linux/kvm_para.h>
23 #include <linux/kvm_types.h>
24 #include <linux/perf_event.h>
25 #include <linux/pvclock_gtod.h>
26 #include <linux/clocksource.h>
28 #include <asm/pvclock-abi.h>
29 #include <asm/desc.h>
30 #include <asm/mtrr.h>
31 #include <asm/msr-index.h>
32 #include <asm/asm.h>
34 #define KVM_MAX_VCPUS 254
35 #define KVM_SOFT_MAX_VCPUS 160
36 #define KVM_MEMORY_SLOTS 32
37 /* memory slots that does not exposed to userspace */
38 #define KVM_PRIVATE_MEM_SLOTS 4
39 #define KVM_MEM_SLOTS_NUM (KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS)
41 #define KVM_MMIO_SIZE 16
43 #define KVM_PIO_PAGE_OFFSET 1
44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
46 #define CR0_RESERVED_BITS \
47 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
48 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
49 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
52 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
53 #define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL
54 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
55 0xFFFFFF0000000000ULL)
56 #define CR4_RESERVED_BITS \
57 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
58 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
59 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
60 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \
61 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
63 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
67 #define INVALID_PAGE (~(hpa_t)0)
68 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
70 #define UNMAPPED_GVA (~(gpa_t)0)
72 /* KVM Hugepage definitions for x86 */
73 #define KVM_NR_PAGE_SIZES 3
74 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
75 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
76 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
77 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
78 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
80 #define SELECTOR_TI_MASK (1 << 2)
81 #define SELECTOR_RPL_MASK 0x03
83 #define IOPL_SHIFT 12
85 #define KVM_PERMILLE_MMU_PAGES 20
86 #define KVM_MIN_ALLOC_MMU_PAGES 64
87 #define KVM_MMU_HASH_SHIFT 10
88 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
89 #define KVM_MIN_FREE_MMU_PAGES 5
90 #define KVM_REFILL_PAGES 25
91 #define KVM_MAX_CPUID_ENTRIES 80
92 #define KVM_NR_FIXED_MTRR_REGION 88
93 #define KVM_NR_VAR_MTRR 8
95 #define ASYNC_PF_PER_VCPU 64
97 extern raw_spinlock_t kvm_lock;
98 extern struct list_head vm_list;
100 struct kvm_vcpu;
101 struct kvm;
102 struct kvm_async_pf;
104 enum kvm_reg {
105 VCPU_REGS_RAX = 0,
106 VCPU_REGS_RCX = 1,
107 VCPU_REGS_RDX = 2,
108 VCPU_REGS_RBX = 3,
109 VCPU_REGS_RSP = 4,
110 VCPU_REGS_RBP = 5,
111 VCPU_REGS_RSI = 6,
112 VCPU_REGS_RDI = 7,
113 #ifdef CONFIG_X86_64
114 VCPU_REGS_R8 = 8,
115 VCPU_REGS_R9 = 9,
116 VCPU_REGS_R10 = 10,
117 VCPU_REGS_R11 = 11,
118 VCPU_REGS_R12 = 12,
119 VCPU_REGS_R13 = 13,
120 VCPU_REGS_R14 = 14,
121 VCPU_REGS_R15 = 15,
122 #endif
123 VCPU_REGS_RIP,
124 NR_VCPU_REGS
125 };
127 enum kvm_reg_ex {
128 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
129 VCPU_EXREG_CR3,
130 VCPU_EXREG_RFLAGS,
131 VCPU_EXREG_CPL,
132 VCPU_EXREG_SEGMENTS,
133 };
135 enum {
136 VCPU_SREG_ES,
137 VCPU_SREG_CS,
138 VCPU_SREG_SS,
139 VCPU_SREG_DS,
140 VCPU_SREG_FS,
141 VCPU_SREG_GS,
142 VCPU_SREG_TR,
143 VCPU_SREG_LDTR,
144 };
146 #include <asm/kvm_emulate.h>
148 #define KVM_NR_MEM_OBJS 40
150 #define KVM_NR_DB_REGS 4
152 #define DR6_BD (1 << 13)
153 #define DR6_BS (1 << 14)
154 #define DR6_FIXED_1 0xffff0ff0
155 #define DR6_VOLATILE 0x0000e00f
157 #define DR7_BP_EN_MASK 0x000000ff
158 #define DR7_GE (1 << 9)
159 #define DR7_GD (1 << 13)
160 #define DR7_FIXED_1 0x00000400
161 #define DR7_VOLATILE 0xffff23ff
163 /* apic attention bits */
164 #define KVM_APIC_CHECK_VAPIC 0
165 /*
166 * The following bit is set with PV-EOI, unset on EOI.
167 * We detect PV-EOI changes by guest by comparing
168 * this bit with PV-EOI in guest memory.
169 * See the implementation in apic_update_pv_eoi.
170 */
171 #define KVM_APIC_PV_EOI_PENDING 1
173 /*
174 * We don't want allocation failures within the mmu code, so we preallocate
175 * enough memory for a single page fault in a cache.
176 */
177 struct kvm_mmu_memory_cache {
178 int nobjs;
179 void *objects[KVM_NR_MEM_OBJS];
180 };
182 /*
183 * kvm_mmu_page_role, below, is defined as:
184 *
185 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
186 * bits 4:7 - page table level for this shadow (1-4)
187 * bits 8:9 - page table quadrant for 2-level guests
188 * bit 16 - direct mapping of virtual to physical mapping at gfn
189 * used for real mode and two-dimensional paging
190 * bits 17:19 - common access permissions for all ptes in this shadow page
191 */
192 union kvm_mmu_page_role {
193 unsigned word;
194 struct {
195 unsigned level:4;
196 unsigned cr4_pae:1;
197 unsigned quadrant:2;
198 unsigned pad_for_nice_hex_output:6;
199 unsigned direct:1;
200 unsigned access:3;
201 unsigned invalid:1;
202 unsigned nxe:1;
203 unsigned cr0_wp:1;
204 unsigned smep_andnot_wp:1;
205 };
206 };
208 struct kvm_mmu_page {
209 struct list_head link;
210 struct hlist_node hash_link;
212 /*
213 * The following two entries are used to key the shadow page in the
214 * hash table.
215 */
216 gfn_t gfn;
217 union kvm_mmu_page_role role;
219 u64 *spt;
220 /* hold the gfn of each spte inside spt */
221 gfn_t *gfns;
222 /*
223 * One bit set per slot which has memory
224 * in this shadow page.
225 */
226 DECLARE_BITMAP(slot_bitmap, KVM_MEM_SLOTS_NUM);
227 bool unsync;
228 int root_count; /* Currently serving as active root */
229 unsigned int unsync_children;
230 unsigned long parent_ptes; /* Reverse mapping for parent_pte */
231 DECLARE_BITMAP(unsync_child_bitmap, 512);
233 #ifdef CONFIG_X86_32
234 int clear_spte_count;
235 #endif
237 int write_flooding_count;
238 };
240 struct kvm_pio_request {
241 unsigned long count;
242 int in;
243 int port;
244 int size;
245 };
247 /*
248 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
249 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
250 * mode.
251 */
252 struct kvm_mmu {
253 void (*new_cr3)(struct kvm_vcpu *vcpu);
254 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
255 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
256 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
257 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
258 bool prefault);
259 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
260 struct x86_exception *fault);
261 void (*free)(struct kvm_vcpu *vcpu);
262 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
263 struct x86_exception *exception);
264 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
265 int (*sync_page)(struct kvm_vcpu *vcpu,
266 struct kvm_mmu_page *sp);
267 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
268 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
269 u64 *spte, const void *pte);
270 hpa_t root_hpa;
271 int root_level;
272 int shadow_root_level;
273 union kvm_mmu_page_role base_role;
274 bool direct_map;
276 /*
277 * Bitmap; bit set = permission fault
278 * Byte index: page fault error code [4:1]
279 * Bit index: pte permissions in ACC_* format
280 */
281 u8 permissions[16];
283 u64 *pae_root;
284 u64 *lm_root;
285 u64 rsvd_bits_mask[2][4];
287 /*
288 * Bitmap: bit set = last pte in walk
289 * index[0:1]: level (zero-based)
290 * index[2]: pte.ps
291 */
292 u8 last_pte_bitmap;
294 bool nx;
296 u64 pdptrs[4]; /* pae */
297 };
299 enum pmc_type {
300 KVM_PMC_GP = 0,
301 KVM_PMC_FIXED,
302 };
304 struct kvm_pmc {
305 enum pmc_type type;
306 u8 idx;
307 u64 counter;
308 u64 eventsel;
309 struct perf_event *perf_event;
310 struct kvm_vcpu *vcpu;
311 };
313 struct kvm_pmu {
314 unsigned nr_arch_gp_counters;
315 unsigned nr_arch_fixed_counters;
316 unsigned available_event_types;
317 u64 fixed_ctr_ctrl;
318 u64 global_ctrl;
319 u64 global_status;
320 u64 global_ovf_ctrl;
321 u64 counter_bitmask[2];
322 u64 global_ctrl_mask;
323 u8 version;
324 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
325 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
326 struct irq_work irq_work;
327 u64 reprogram_pmi;
328 };
330 struct kvm_vcpu_arch {
331 /*
332 * rip and regs accesses must go through
333 * kvm_{register,rip}_{read,write} functions.
334 */
335 unsigned long regs[NR_VCPU_REGS];
336 u32 regs_avail;
337 u32 regs_dirty;
339 unsigned long cr0;
340 unsigned long cr0_guest_owned_bits;
341 unsigned long cr2;
342 unsigned long cr3;
343 unsigned long cr4;
344 unsigned long cr4_guest_owned_bits;
345 unsigned long cr8;
346 u32 hflags;
347 u64 efer;
348 u64 apic_base;
349 struct kvm_lapic *apic; /* kernel irqchip context */
350 unsigned long apic_attention;
351 int32_t apic_arb_prio;
352 int mp_state;
353 int sipi_vector;
354 u64 ia32_misc_enable_msr;
355 bool tpr_access_reporting;
357 /*
358 * Paging state of the vcpu
359 *
360 * If the vcpu runs in guest mode with two level paging this still saves
361 * the paging mode of the l1 guest. This context is always used to
362 * handle faults.
363 */
364 struct kvm_mmu mmu;
366 /*
367 * Paging state of an L2 guest (used for nested npt)
368 *
369 * This context will save all necessary information to walk page tables
370 * of the an L2 guest. This context is only initialized for page table
371 * walking and not for faulting since we never handle l2 page faults on
372 * the host.
373 */
374 struct kvm_mmu nested_mmu;
376 /*
377 * Pointer to the mmu context currently used for
378 * gva_to_gpa translations.
379 */
380 struct kvm_mmu *walk_mmu;
382 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
383 struct kvm_mmu_memory_cache mmu_page_cache;
384 struct kvm_mmu_memory_cache mmu_page_header_cache;
386 struct fpu guest_fpu;
387 u64 xcr0;
389 struct kvm_pio_request pio;
390 void *pio_data;
392 u8 event_exit_inst_len;
394 struct kvm_queued_exception {
395 bool pending;
396 bool has_error_code;
397 bool reinject;
398 u8 nr;
399 u32 error_code;
400 } exception;
402 struct kvm_queued_interrupt {
403 bool pending;
404 bool soft;
405 u8 nr;
406 } interrupt;
408 int halt_request; /* real mode on Intel only */
410 int cpuid_nent;
411 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
412 /* emulate context */
414 struct x86_emulate_ctxt emulate_ctxt;
415 bool emulate_regs_need_sync_to_vcpu;
416 bool emulate_regs_need_sync_from_vcpu;
417 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
419 gpa_t time;
420 struct pvclock_vcpu_time_info hv_clock;
421 unsigned int hw_tsc_khz;
422 struct gfn_to_hva_cache pv_time;
423 bool pv_time_enabled;
424 /* set guest stopped flag in pvclock flags field */
425 bool pvclock_set_guest_stopped_request;
427 struct {
428 u64 msr_val;
429 u64 last_steal;
430 u64 accum_steal;
431 struct gfn_to_hva_cache stime;
432 struct kvm_steal_time steal;
433 } st;
435 u64 last_guest_tsc;
436 u64 last_kernel_ns;
437 u64 last_host_tsc;
438 u64 tsc_offset_adjustment;
439 u64 this_tsc_nsec;
440 u64 this_tsc_write;
441 u8 this_tsc_generation;
442 bool tsc_catchup;
443 bool tsc_always_catchup;
444 s8 virtual_tsc_shift;
445 u32 virtual_tsc_mult;
446 u32 virtual_tsc_khz;
447 s64 ia32_tsc_adjust_msr;
449 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
450 unsigned nmi_pending; /* NMI queued after currently running handler */
451 bool nmi_injected; /* Trying to inject an NMI this entry */
453 struct mtrr_state_type mtrr_state;
454 u32 pat;
456 int switch_db_regs;
457 unsigned long db[KVM_NR_DB_REGS];
458 unsigned long dr6;
459 unsigned long dr7;
460 unsigned long eff_db[KVM_NR_DB_REGS];
461 unsigned long guest_debug_dr7;
463 u64 mcg_cap;
464 u64 mcg_status;
465 u64 mcg_ctl;
466 u64 *mce_banks;
468 /* Cache MMIO info */
469 u64 mmio_gva;
470 unsigned access;
471 gfn_t mmio_gfn;
473 struct kvm_pmu pmu;
475 /* used for guest single stepping over the given code position */
476 unsigned long singlestep_rip;
478 /* fields used by HYPER-V emulation */
479 u64 hv_vapic;
481 cpumask_var_t wbinvd_dirty_mask;
483 unsigned long last_retry_eip;
484 unsigned long last_retry_addr;
486 struct {
487 bool halted;
488 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
489 struct gfn_to_hva_cache data;
490 u64 msr_val;
491 u32 id;
492 bool send_user_only;
493 } apf;
495 /* OSVW MSRs (AMD only) */
496 struct {
497 u64 length;
498 u64 status;
499 } osvw;
501 struct {
502 u64 msr_val;
503 struct gfn_to_hva_cache data;
504 } pv_eoi;
505 };
507 struct kvm_lpage_info {
508 int write_count;
509 };
511 struct kvm_arch_memory_slot {
512 unsigned long *rmap[KVM_NR_PAGE_SIZES];
513 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
514 };
516 struct kvm_apic_map {
517 struct rcu_head rcu;
518 u8 ldr_bits;
519 /* fields bellow are used to decode ldr values in different modes */
520 u32 cid_shift, cid_mask, lid_mask;
521 struct kvm_lapic *phys_map[256];
522 /* first index is cluster id second is cpu id in a cluster */
523 struct kvm_lapic *logical_map[16][16];
524 };
526 struct kvm_arch {
527 unsigned int n_used_mmu_pages;
528 unsigned int n_requested_mmu_pages;
529 unsigned int n_max_mmu_pages;
530 unsigned int indirect_shadow_pages;
531 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
532 /*
533 * Hash table of struct kvm_mmu_page.
534 */
535 struct list_head active_mmu_pages;
536 struct list_head assigned_dev_head;
537 struct iommu_domain *iommu_domain;
538 int iommu_flags;
539 struct kvm_pic *vpic;
540 struct kvm_ioapic *vioapic;
541 struct kvm_pit *vpit;
542 int vapics_in_nmi_mode;
543 struct mutex apic_map_lock;
544 struct kvm_apic_map *apic_map;
546 unsigned int tss_addr;
547 struct page *apic_access_page;
549 gpa_t wall_clock;
551 struct page *ept_identity_pagetable;
552 bool ept_identity_pagetable_done;
553 gpa_t ept_identity_map_addr;
555 unsigned long irq_sources_bitmap;
556 s64 kvmclock_offset;
557 raw_spinlock_t tsc_write_lock;
558 u64 last_tsc_nsec;
559 u64 last_tsc_write;
560 u32 last_tsc_khz;
561 u64 cur_tsc_nsec;
562 u64 cur_tsc_write;
563 u64 cur_tsc_offset;
564 u8 cur_tsc_generation;
565 int nr_vcpus_matched_tsc;
567 spinlock_t pvclock_gtod_sync_lock;
568 bool use_master_clock;
569 u64 master_kernel_ns;
570 cycle_t master_cycle_now;
572 struct kvm_xen_hvm_config xen_hvm_config;
574 /* fields used by HYPER-V emulation */
575 u64 hv_guest_os_id;
576 u64 hv_hypercall;
578 #ifdef CONFIG_KVM_MMU_AUDIT
579 int audit_point;
580 #endif
581 };
583 struct kvm_vm_stat {
584 u32 mmu_shadow_zapped;
585 u32 mmu_pte_write;
586 u32 mmu_pte_updated;
587 u32 mmu_pde_zapped;
588 u32 mmu_flooded;
589 u32 mmu_recycled;
590 u32 mmu_cache_miss;
591 u32 mmu_unsync;
592 u32 remote_tlb_flush;
593 u32 lpages;
594 };
596 struct kvm_vcpu_stat {
597 u32 pf_fixed;
598 u32 pf_guest;
599 u32 tlb_flush;
600 u32 invlpg;
602 u32 exits;
603 u32 io_exits;
604 u32 mmio_exits;
605 u32 signal_exits;
606 u32 irq_window_exits;
607 u32 nmi_window_exits;
608 u32 halt_exits;
609 u32 halt_wakeup;
610 u32 request_irq_exits;
611 u32 irq_exits;
612 u32 host_state_reload;
613 u32 efer_reload;
614 u32 fpu_reload;
615 u32 insn_emulation;
616 u32 insn_emulation_fail;
617 u32 hypercalls;
618 u32 irq_injections;
619 u32 nmi_injections;
620 };
622 struct x86_instruction_info;
624 struct msr_data {
625 bool host_initiated;
626 u32 index;
627 u64 data;
628 };
630 struct kvm_x86_ops {
631 int (*cpu_has_kvm_support)(void); /* __init */
632 int (*disabled_by_bios)(void); /* __init */
633 int (*hardware_enable)(void *dummy);
634 void (*hardware_disable)(void *dummy);
635 void (*check_processor_compatibility)(void *rtn);
636 int (*hardware_setup)(void); /* __init */
637 void (*hardware_unsetup)(void); /* __exit */
638 bool (*cpu_has_accelerated_tpr)(void);
639 void (*cpuid_update)(struct kvm_vcpu *vcpu);
641 /* Create, but do not attach this VCPU */
642 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
643 void (*vcpu_free)(struct kvm_vcpu *vcpu);
644 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
646 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
647 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
648 void (*vcpu_put)(struct kvm_vcpu *vcpu);
650 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
651 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
652 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
653 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
654 void (*get_segment)(struct kvm_vcpu *vcpu,
655 struct kvm_segment *var, int seg);
656 int (*get_cpl)(struct kvm_vcpu *vcpu);
657 void (*set_segment)(struct kvm_vcpu *vcpu,
658 struct kvm_segment *var, int seg);
659 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
660 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
661 void (*decache_cr3)(struct kvm_vcpu *vcpu);
662 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
663 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
664 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
665 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
666 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
667 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
668 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
669 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
670 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
671 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
672 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
673 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
674 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
675 void (*fpu_activate)(struct kvm_vcpu *vcpu);
676 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
678 void (*tlb_flush)(struct kvm_vcpu *vcpu);
680 void (*run)(struct kvm_vcpu *vcpu);
681 int (*handle_exit)(struct kvm_vcpu *vcpu);
682 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
683 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
684 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
685 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
686 unsigned char *hypercall_addr);
687 void (*set_irq)(struct kvm_vcpu *vcpu);
688 void (*set_nmi)(struct kvm_vcpu *vcpu);
689 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
690 bool has_error_code, u32 error_code,
691 bool reinject);
692 void (*cancel_injection)(struct kvm_vcpu *vcpu);
693 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
694 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
695 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
696 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
697 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
698 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
699 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
700 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
701 int (*get_tdp_level)(void);
702 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
703 int (*get_lpage_level)(void);
704 bool (*rdtscp_supported)(void);
705 bool (*invpcid_supported)(void);
706 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
708 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
710 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
712 bool (*has_wbinvd_exit)(void);
714 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
715 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
716 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
718 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
719 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
721 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
723 int (*check_intercept)(struct kvm_vcpu *vcpu,
724 struct x86_instruction_info *info,
725 enum x86_intercept_stage stage);
726 };
728 struct kvm_arch_async_pf {
729 u32 token;
730 gfn_t gfn;
731 unsigned long cr3;
732 bool direct_map;
733 };
735 extern struct kvm_x86_ops *kvm_x86_ops;
737 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
738 s64 adjustment)
739 {
740 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
741 }
743 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
744 {
745 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
746 }
748 int kvm_mmu_module_init(void);
749 void kvm_mmu_module_exit(void);
751 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
752 int kvm_mmu_create(struct kvm_vcpu *vcpu);
753 int kvm_mmu_setup(struct kvm_vcpu *vcpu);
754 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
755 u64 dirty_mask, u64 nx_mask, u64 x_mask);
757 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
758 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
759 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
760 struct kvm_memory_slot *slot,
761 gfn_t gfn_offset, unsigned long mask);
762 void kvm_mmu_zap_all(struct kvm *kvm);
763 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
764 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
766 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
768 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
769 const void *val, int bytes);
770 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
772 extern bool tdp_enabled;
774 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
776 /* control of guest tsc rate supported? */
777 extern bool kvm_has_tsc_control;
778 /* minimum supported tsc_khz for guests */
779 extern u32 kvm_min_guest_tsc_khz;
780 /* maximum supported tsc_khz for guests */
781 extern u32 kvm_max_guest_tsc_khz;
783 enum emulation_result {
784 EMULATE_DONE, /* no further processing */
785 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
786 EMULATE_FAIL, /* can't emulate this instruction */
787 };
789 #define EMULTYPE_NO_DECODE (1 << 0)
790 #define EMULTYPE_TRAP_UD (1 << 1)
791 #define EMULTYPE_SKIP (1 << 2)
792 #define EMULTYPE_RETRY (1 << 3)
793 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
794 int emulation_type, void *insn, int insn_len);
796 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
797 int emulation_type)
798 {
799 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
800 }
802 void kvm_enable_efer_bits(u64);
803 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
804 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
806 struct x86_emulate_ctxt;
808 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
809 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
810 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
811 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
813 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
814 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
816 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
817 int reason, bool has_error_code, u32 error_code);
819 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
820 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
821 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
822 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
823 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
824 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
825 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
826 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
827 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
828 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
830 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
831 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
833 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
834 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
835 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
837 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
838 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
839 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
840 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
841 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
842 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
843 gfn_t gfn, void *data, int offset, int len,
844 u32 access);
845 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
846 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
848 static inline int __kvm_irq_line_state(unsigned long *irq_state,
849 int irq_source_id, int level)
850 {
851 /* Logical OR for level trig interrupt */
852 if (level)
853 __set_bit(irq_source_id, irq_state);
854 else
855 __clear_bit(irq_source_id, irq_state);
857 return !!(*irq_state);
858 }
860 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
861 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
863 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
865 int fx_init(struct kvm_vcpu *vcpu);
867 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
868 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
869 const u8 *new, int bytes);
870 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
871 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
872 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
873 int kvm_mmu_load(struct kvm_vcpu *vcpu);
874 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
875 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
876 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
877 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
878 struct x86_exception *exception);
879 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
880 struct x86_exception *exception);
881 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
882 struct x86_exception *exception);
883 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
884 struct x86_exception *exception);
886 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
888 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
889 void *insn, int insn_len);
890 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
892 void kvm_enable_tdp(void);
893 void kvm_disable_tdp(void);
895 int complete_pio(struct kvm_vcpu *vcpu);
896 bool kvm_check_iopl(struct kvm_vcpu *vcpu);
898 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
899 {
900 return gpa;
901 }
903 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
904 {
905 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
907 return (struct kvm_mmu_page *)page_private(page);
908 }
910 static inline u16 kvm_read_ldt(void)
911 {
912 u16 ldt;
913 asm("sldt %0" : "=g"(ldt));
914 return ldt;
915 }
917 static inline void kvm_load_ldt(u16 sel)
918 {
919 asm("lldt %0" : : "rm"(sel));
920 }
922 #ifdef CONFIG_X86_64
923 static inline unsigned long read_msr(unsigned long msr)
924 {
925 u64 value;
927 rdmsrl(msr, value);
928 return value;
929 }
930 #endif
932 static inline u32 get_rdx_init_val(void)
933 {
934 return 0x600; /* P6 family */
935 }
937 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
938 {
939 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
940 }
942 #define TSS_IOPB_BASE_OFFSET 0x66
943 #define TSS_BASE_SIZE 0x68
944 #define TSS_IOPB_SIZE (65536 / 8)
945 #define TSS_REDIRECTION_SIZE (256 / 8)
946 #define RMODE_TSS_SIZE \
947 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
949 enum {
950 TASK_SWITCH_CALL = 0,
951 TASK_SWITCH_IRET = 1,
952 TASK_SWITCH_JMP = 2,
953 TASK_SWITCH_GATE = 3,
954 };
956 #define HF_GIF_MASK (1 << 0)
957 #define HF_HIF_MASK (1 << 1)
958 #define HF_VINTR_MASK (1 << 2)
959 #define HF_NMI_MASK (1 << 3)
960 #define HF_IRET_MASK (1 << 4)
961 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
963 /*
964 * Hardware virtualization extension instructions may fault if a
965 * reboot turns off virtualization while processes are running.
966 * Trap the fault and ignore the instruction if that happens.
967 */
968 asmlinkage void kvm_spurious_fault(void);
969 extern bool kvm_rebooting;
971 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
972 "666: " insn "\n\t" \
973 "668: \n\t" \
974 ".pushsection .fixup, \"ax\" \n" \
975 "667: \n\t" \
976 cleanup_insn "\n\t" \
977 "cmpb $0, kvm_rebooting \n\t" \
978 "jne 668b \n\t" \
979 __ASM_SIZE(push) " $666b \n\t" \
980 "call kvm_spurious_fault \n\t" \
981 ".popsection \n\t" \
982 _ASM_EXTABLE(666b, 667b)
984 #define __kvm_handle_fault_on_reboot(insn) \
985 ____kvm_handle_fault_on_reboot(insn, "")
987 #define KVM_ARCH_WANT_MMU_NOTIFIER
988 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
989 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
990 int kvm_age_hva(struct kvm *kvm, unsigned long hva);
991 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
992 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
993 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
994 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
995 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
996 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
998 void kvm_define_shared_msr(unsigned index, u32 msr);
999 void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1001 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1003 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1004 struct kvm_async_pf *work);
1005 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1006 struct kvm_async_pf *work);
1007 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1008 struct kvm_async_pf *work);
1009 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1010 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1012 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1014 int kvm_is_in_guest(void);
1016 void kvm_pmu_init(struct kvm_vcpu *vcpu);
1017 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
1018 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
1019 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
1020 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
1021 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
1022 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
1023 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
1024 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
1025 void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
1027 #endif /* _ASM_X86_KVM_HOST_H */