1 /*
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/pci-aspm.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
32 #include <linux/fs.h>
33 #include <linux/bio.h>
34 #include <linux/blkpg.h>
35 #include <linux/timer.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/init.h>
39 #include <linux/jiffies.h>
40 #include <linux/hdreg.h>
41 #include <linux/spinlock.h>
42 #include <linux/compat.h>
43 #include <linux/mutex.h>
44 #include <linux/bitmap.h>
45 #include <linux/io.h>
46 #include <asm/uaccess.h>
48 #include <linux/dma-mapping.h>
49 #include <linux/blkdev.h>
50 #include <linux/genhd.h>
51 #include <linux/completion.h>
52 #include <scsi/scsi.h>
53 #include <scsi/sg.h>
54 #include <scsi/scsi_ioctl.h>
55 #include <linux/cdrom.h>
56 #include <linux/scatterlist.h>
57 #include <linux/kthread.h>
59 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
60 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
61 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
63 /* Embedded module documentation macros - see modules.h */
64 MODULE_AUTHOR("Hewlett-Packard Company");
65 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
66 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
67 MODULE_VERSION("3.6.26");
68 MODULE_LICENSE("GPL");
69 static int cciss_tape_cmds = 6;
70 module_param(cciss_tape_cmds, int, 0644);
71 MODULE_PARM_DESC(cciss_tape_cmds,
72 "number of commands to allocate for tape devices (default: 6)");
73 static int cciss_simple_mode;
74 module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
75 MODULE_PARM_DESC(cciss_simple_mode,
76 "Use 'simple mode' rather than 'performant mode'");
78 static DEFINE_MUTEX(cciss_mutex);
79 static struct proc_dir_entry *proc_cciss;
81 #include "cciss_cmd.h"
82 #include "cciss.h"
83 #include <linux/cciss_ioctl.h>
85 /* define the PCI info for the cards we can control */
86 static const struct pci_device_id cciss_pci_device_id[] = {
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
90 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
91 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
92 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
93 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
94 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
95 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
107 {0,}
108 };
110 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
112 /* board_id = Subsystem Device ID & Vendor ID
113 * product = Marketing Name for the board
114 * access = Address of the struct of function pointers
115 */
116 static struct board_type products[] = {
117 {0x40700E11, "Smart Array 5300", &SA5_access},
118 {0x40800E11, "Smart Array 5i", &SA5B_access},
119 {0x40820E11, "Smart Array 532", &SA5B_access},
120 {0x40830E11, "Smart Array 5312", &SA5B_access},
121 {0x409A0E11, "Smart Array 641", &SA5_access},
122 {0x409B0E11, "Smart Array 642", &SA5_access},
123 {0x409C0E11, "Smart Array 6400", &SA5_access},
124 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
125 {0x40910E11, "Smart Array 6i", &SA5_access},
126 {0x3225103C, "Smart Array P600", &SA5_access},
127 {0x3223103C, "Smart Array P800", &SA5_access},
128 {0x3234103C, "Smart Array P400", &SA5_access},
129 {0x3235103C, "Smart Array P400i", &SA5_access},
130 {0x3211103C, "Smart Array E200i", &SA5_access},
131 {0x3212103C, "Smart Array E200", &SA5_access},
132 {0x3213103C, "Smart Array E200i", &SA5_access},
133 {0x3214103C, "Smart Array E200i", &SA5_access},
134 {0x3215103C, "Smart Array E200i", &SA5_access},
135 {0x3237103C, "Smart Array E500", &SA5_access},
136 {0x3223103C, "Smart Array P800", &SA5_access},
137 {0x3234103C, "Smart Array P400", &SA5_access},
138 {0x323D103C, "Smart Array P700m", &SA5_access},
139 };
141 /* How long to wait (in milliseconds) for board to go into simple mode */
142 #define MAX_CONFIG_WAIT 30000
143 #define MAX_IOCTL_CONFIG_WAIT 1000
145 /*define how many times we will try a command because of bus resets */
146 #define MAX_CMD_RETRIES 3
148 #define MAX_CTLR 32
150 /* Originally cciss driver only supports 8 major numbers */
151 #define MAX_CTLR_ORIG 8
153 static ctlr_info_t *hba[MAX_CTLR];
155 static struct task_struct *cciss_scan_thread;
156 static DEFINE_MUTEX(scan_mutex);
157 static LIST_HEAD(scan_q);
159 static void do_cciss_request(struct request_queue *q);
160 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
161 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
162 static int cciss_open(struct block_device *bdev, fmode_t mode);
163 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
164 static int cciss_release(struct gendisk *disk, fmode_t mode);
165 static int do_ioctl(struct block_device *bdev, fmode_t mode,
166 unsigned int cmd, unsigned long arg);
167 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
168 unsigned int cmd, unsigned long arg);
169 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
171 static int cciss_revalidate(struct gendisk *disk);
172 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
173 static int deregister_disk(ctlr_info_t *h, int drv_index,
174 int clear_all, int via_ioctl);
176 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
177 sector_t *total_size, unsigned int *block_size);
178 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
179 sector_t *total_size, unsigned int *block_size);
180 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
181 sector_t total_size,
182 unsigned int block_size, InquiryData_struct *inq_buff,
183 drive_info_struct *drv);
184 static void __devinit cciss_interrupt_mode(ctlr_info_t *);
185 static int __devinit cciss_enter_simple_mode(struct ctlr_info *h);
186 static void start_io(ctlr_info_t *h);
187 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
188 __u8 page_code, unsigned char scsi3addr[],
189 int cmd_type);
190 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
191 int attempt_retry);
192 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
194 static int add_to_scan_list(struct ctlr_info *h);
195 static int scan_thread(void *data);
196 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
197 static void cciss_hba_release(struct device *dev);
198 static void cciss_device_release(struct device *dev);
199 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
200 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
201 static inline u32 next_command(ctlr_info_t *h);
202 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
203 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
204 u64 *cfg_offset);
205 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
206 unsigned long *memory_bar);
207 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
208 static __devinit int write_driver_ver_to_cfgtable(
209 CfgTable_struct __iomem *cfgtable);
211 /* performant mode helper functions */
212 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
213 int *bucket_map);
214 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
216 #ifdef CONFIG_PROC_FS
217 static void cciss_procinit(ctlr_info_t *h);
218 #else
219 static void cciss_procinit(ctlr_info_t *h)
220 {
221 }
222 #endif /* CONFIG_PROC_FS */
224 #ifdef CONFIG_COMPAT
225 static int cciss_compat_ioctl(struct block_device *, fmode_t,
226 unsigned, unsigned long);
227 #endif
229 static const struct block_device_operations cciss_fops = {
230 .owner = THIS_MODULE,
231 .open = cciss_unlocked_open,
232 .release = cciss_release,
233 .ioctl = do_ioctl,
234 .getgeo = cciss_getgeo,
235 #ifdef CONFIG_COMPAT
236 .compat_ioctl = cciss_compat_ioctl,
237 #endif
238 .revalidate_disk = cciss_revalidate,
239 };
241 /* set_performant_mode: Modify the tag for cciss performant
242 * set bit 0 for pull model, bits 3-1 for block fetch
243 * register number
244 */
245 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
246 {
247 if (likely(h->transMethod & CFGTBL_Trans_Performant))
248 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
249 }
251 /*
252 * Enqueuing and dequeuing functions for cmdlists.
253 */
254 static inline void addQ(struct list_head *list, CommandList_struct *c)
255 {
256 list_add_tail(&c->list, list);
257 }
259 static inline void removeQ(CommandList_struct *c)
260 {
261 /*
262 * After kexec/dump some commands might still
263 * be in flight, which the firmware will try
264 * to complete. Resetting the firmware doesn't work
265 * with old fw revisions, so we have to mark
266 * them off as 'stale' to prevent the driver from
267 * falling over.
268 */
269 if (WARN_ON(list_empty(&c->list))) {
270 c->cmd_type = CMD_MSG_STALE;
271 return;
272 }
274 list_del_init(&c->list);
275 }
277 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
278 CommandList_struct *c)
279 {
280 unsigned long flags;
281 set_performant_mode(h, c);
282 spin_lock_irqsave(&h->lock, flags);
283 addQ(&h->reqQ, c);
284 h->Qdepth++;
285 if (h->Qdepth > h->maxQsinceinit)
286 h->maxQsinceinit = h->Qdepth;
287 start_io(h);
288 spin_unlock_irqrestore(&h->lock, flags);
289 }
291 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
292 int nr_cmds)
293 {
294 int i;
296 if (!cmd_sg_list)
297 return;
298 for (i = 0; i < nr_cmds; i++) {
299 kfree(cmd_sg_list[i]);
300 cmd_sg_list[i] = NULL;
301 }
302 kfree(cmd_sg_list);
303 }
305 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
306 ctlr_info_t *h, int chainsize, int nr_cmds)
307 {
308 int j;
309 SGDescriptor_struct **cmd_sg_list;
311 if (chainsize <= 0)
312 return NULL;
314 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
315 if (!cmd_sg_list)
316 return NULL;
318 /* Build up chain blocks for each command */
319 for (j = 0; j < nr_cmds; j++) {
320 /* Need a block of chainsized s/g elements. */
321 cmd_sg_list[j] = kmalloc((chainsize *
322 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
323 if (!cmd_sg_list[j]) {
324 dev_err(&h->pdev->dev, "Cannot get memory "
325 "for s/g chains.\n");
326 goto clean;
327 }
328 }
329 return cmd_sg_list;
330 clean:
331 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
332 return NULL;
333 }
335 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
336 {
337 SGDescriptor_struct *chain_sg;
338 u64bit temp64;
340 if (c->Header.SGTotal <= h->max_cmd_sgentries)
341 return;
343 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
344 temp64.val32.lower = chain_sg->Addr.lower;
345 temp64.val32.upper = chain_sg->Addr.upper;
346 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
347 }
349 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
350 SGDescriptor_struct *chain_block, int len)
351 {
352 SGDescriptor_struct *chain_sg;
353 u64bit temp64;
355 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
356 chain_sg->Ext = CCISS_SG_CHAIN;
357 chain_sg->Len = len;
358 temp64.val = pci_map_single(h->pdev, chain_block, len,
359 PCI_DMA_TODEVICE);
360 chain_sg->Addr.lower = temp64.val32.lower;
361 chain_sg->Addr.upper = temp64.val32.upper;
362 }
364 #include "cciss_scsi.c" /* For SCSI tape support */
366 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
367 "UNKNOWN"
368 };
369 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
371 #ifdef CONFIG_PROC_FS
373 /*
374 * Report information about this controller.
375 */
376 #define ENG_GIG 1000000000
377 #define ENG_GIG_FACTOR (ENG_GIG/512)
378 #define ENGAGE_SCSI "engage scsi"
380 static void cciss_seq_show_header(struct seq_file *seq)
381 {
382 ctlr_info_t *h = seq->private;
384 seq_printf(seq, "%s: HP %s Controller\n"
385 "Board ID: 0x%08lx\n"
386 "Firmware Version: %c%c%c%c\n"
387 "IRQ: %d\n"
388 "Logical drives: %d\n"
389 "Current Q depth: %d\n"
390 "Current # commands on controller: %d\n"
391 "Max Q depth since init: %d\n"
392 "Max # commands on controller since init: %d\n"
393 "Max SG entries since init: %d\n",
394 h->devname,
395 h->product_name,
396 (unsigned long)h->board_id,
397 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
398 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
399 h->num_luns,
400 h->Qdepth, h->commands_outstanding,
401 h->maxQsinceinit, h->max_outstanding, h->maxSG);
403 #ifdef CONFIG_CISS_SCSI_TAPE
404 cciss_seq_tape_report(seq, h);
405 #endif /* CONFIG_CISS_SCSI_TAPE */
406 }
408 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
409 {
410 ctlr_info_t *h = seq->private;
411 unsigned long flags;
413 /* prevent displaying bogus info during configuration
414 * or deconfiguration of a logical volume
415 */
416 spin_lock_irqsave(&h->lock, flags);
417 if (h->busy_configuring) {
418 spin_unlock_irqrestore(&h->lock, flags);
419 return ERR_PTR(-EBUSY);
420 }
421 h->busy_configuring = 1;
422 spin_unlock_irqrestore(&h->lock, flags);
424 if (*pos == 0)
425 cciss_seq_show_header(seq);
427 return pos;
428 }
430 static int cciss_seq_show(struct seq_file *seq, void *v)
431 {
432 sector_t vol_sz, vol_sz_frac;
433 ctlr_info_t *h = seq->private;
434 unsigned ctlr = h->ctlr;
435 loff_t *pos = v;
436 drive_info_struct *drv = h->drv[*pos];
438 if (*pos > h->highest_lun)
439 return 0;
441 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
442 return 0;
444 if (drv->heads == 0)
445 return 0;
447 vol_sz = drv->nr_blocks;
448 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
449 vol_sz_frac *= 100;
450 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
452 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
453 drv->raid_level = RAID_UNKNOWN;
454 seq_printf(seq, "cciss/c%dd%d:"
455 "\t%4u.%02uGB\tRAID %s\n",
456 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
457 raid_label[drv->raid_level]);
458 return 0;
459 }
461 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
462 {
463 ctlr_info_t *h = seq->private;
465 if (*pos > h->highest_lun)
466 return NULL;
467 *pos += 1;
469 return pos;
470 }
472 static void cciss_seq_stop(struct seq_file *seq, void *v)
473 {
474 ctlr_info_t *h = seq->private;
476 /* Only reset h->busy_configuring if we succeeded in setting
477 * it during cciss_seq_start. */
478 if (v == ERR_PTR(-EBUSY))
479 return;
481 h->busy_configuring = 0;
482 }
484 static const struct seq_operations cciss_seq_ops = {
485 .start = cciss_seq_start,
486 .show = cciss_seq_show,
487 .next = cciss_seq_next,
488 .stop = cciss_seq_stop,
489 };
491 static int cciss_seq_open(struct inode *inode, struct file *file)
492 {
493 int ret = seq_open(file, &cciss_seq_ops);
494 struct seq_file *seq = file->private_data;
496 if (!ret)
497 seq->private = PDE(inode)->data;
499 return ret;
500 }
502 static ssize_t
503 cciss_proc_write(struct file *file, const char __user *buf,
504 size_t length, loff_t *ppos)
505 {
506 int err;
507 char *buffer;
509 #ifndef CONFIG_CISS_SCSI_TAPE
510 return -EINVAL;
511 #endif
513 if (!buf || length > PAGE_SIZE - 1)
514 return -EINVAL;
516 buffer = (char *)__get_free_page(GFP_KERNEL);
517 if (!buffer)
518 return -ENOMEM;
520 err = -EFAULT;
521 if (copy_from_user(buffer, buf, length))
522 goto out;
523 buffer[length] = '\0';
525 #ifdef CONFIG_CISS_SCSI_TAPE
526 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
527 struct seq_file *seq = file->private_data;
528 ctlr_info_t *h = seq->private;
530 err = cciss_engage_scsi(h);
531 if (err == 0)
532 err = length;
533 } else
534 #endif /* CONFIG_CISS_SCSI_TAPE */
535 err = -EINVAL;
536 /* might be nice to have "disengage" too, but it's not
537 safely possible. (only 1 module use count, lock issues.) */
539 out:
540 free_page((unsigned long)buffer);
541 return err;
542 }
544 static const struct file_operations cciss_proc_fops = {
545 .owner = THIS_MODULE,
546 .open = cciss_seq_open,
547 .read = seq_read,
548 .llseek = seq_lseek,
549 .release = seq_release,
550 .write = cciss_proc_write,
551 };
553 static void __devinit cciss_procinit(ctlr_info_t *h)
554 {
555 struct proc_dir_entry *pde;
557 if (proc_cciss == NULL)
558 proc_cciss = proc_mkdir("driver/cciss", NULL);
559 if (!proc_cciss)
560 return;
561 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
562 S_IROTH, proc_cciss,
563 &cciss_proc_fops, h);
564 }
565 #endif /* CONFIG_PROC_FS */
567 #define MAX_PRODUCT_NAME_LEN 19
569 #define to_hba(n) container_of(n, struct ctlr_info, dev)
570 #define to_drv(n) container_of(n, drive_info_struct, dev)
572 /* List of controllers which cannot be hard reset on kexec with reset_devices */
573 static u32 unresettable_controller[] = {
574 0x324a103C, /* Smart Array P712m */
575 0x324b103C, /* SmartArray P711m */
576 0x3223103C, /* Smart Array P800 */
577 0x3234103C, /* Smart Array P400 */
578 0x3235103C, /* Smart Array P400i */
579 0x3211103C, /* Smart Array E200i */
580 0x3212103C, /* Smart Array E200 */
581 0x3213103C, /* Smart Array E200i */
582 0x3214103C, /* Smart Array E200i */
583 0x3215103C, /* Smart Array E200i */
584 0x3237103C, /* Smart Array E500 */
585 0x323D103C, /* Smart Array P700m */
586 0x409C0E11, /* Smart Array 6400 */
587 0x409D0E11, /* Smart Array 6400 EM */
588 };
590 /* List of controllers which cannot even be soft reset */
591 static u32 soft_unresettable_controller[] = {
592 0x409C0E11, /* Smart Array 6400 */
593 0x409D0E11, /* Smart Array 6400 EM */
594 };
596 static int ctlr_is_hard_resettable(u32 board_id)
597 {
598 int i;
600 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
601 if (unresettable_controller[i] == board_id)
602 return 0;
603 return 1;
604 }
606 static int ctlr_is_soft_resettable(u32 board_id)
607 {
608 int i;
610 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
611 if (soft_unresettable_controller[i] == board_id)
612 return 0;
613 return 1;
614 }
616 static int ctlr_is_resettable(u32 board_id)
617 {
618 return ctlr_is_hard_resettable(board_id) ||
619 ctlr_is_soft_resettable(board_id);
620 }
622 static ssize_t host_show_resettable(struct device *dev,
623 struct device_attribute *attr,
624 char *buf)
625 {
626 struct ctlr_info *h = to_hba(dev);
628 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
629 }
630 static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
632 static ssize_t host_store_rescan(struct device *dev,
633 struct device_attribute *attr,
634 const char *buf, size_t count)
635 {
636 struct ctlr_info *h = to_hba(dev);
638 add_to_scan_list(h);
639 wake_up_process(cciss_scan_thread);
640 wait_for_completion_interruptible(&h->scan_wait);
642 return count;
643 }
644 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
646 static ssize_t host_show_transport_mode(struct device *dev,
647 struct device_attribute *attr,
648 char *buf)
649 {
650 struct ctlr_info *h = to_hba(dev);
652 return snprintf(buf, 20, "%s\n",
653 h->transMethod & CFGTBL_Trans_Performant ?
654 "performant" : "simple");
655 }
656 static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
658 static ssize_t dev_show_unique_id(struct device *dev,
659 struct device_attribute *attr,
660 char *buf)
661 {
662 drive_info_struct *drv = to_drv(dev);
663 struct ctlr_info *h = to_hba(drv->dev.parent);
664 __u8 sn[16];
665 unsigned long flags;
666 int ret = 0;
668 spin_lock_irqsave(&h->lock, flags);
669 if (h->busy_configuring)
670 ret = -EBUSY;
671 else
672 memcpy(sn, drv->serial_no, sizeof(sn));
673 spin_unlock_irqrestore(&h->lock, flags);
675 if (ret)
676 return ret;
677 else
678 return snprintf(buf, 16 * 2 + 2,
679 "%02X%02X%02X%02X%02X%02X%02X%02X"
680 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
681 sn[0], sn[1], sn[2], sn[3],
682 sn[4], sn[5], sn[6], sn[7],
683 sn[8], sn[9], sn[10], sn[11],
684 sn[12], sn[13], sn[14], sn[15]);
685 }
686 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
688 static ssize_t dev_show_vendor(struct device *dev,
689 struct device_attribute *attr,
690 char *buf)
691 {
692 drive_info_struct *drv = to_drv(dev);
693 struct ctlr_info *h = to_hba(drv->dev.parent);
694 char vendor[VENDOR_LEN + 1];
695 unsigned long flags;
696 int ret = 0;
698 spin_lock_irqsave(&h->lock, flags);
699 if (h->busy_configuring)
700 ret = -EBUSY;
701 else
702 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
703 spin_unlock_irqrestore(&h->lock, flags);
705 if (ret)
706 return ret;
707 else
708 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
709 }
710 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
712 static ssize_t dev_show_model(struct device *dev,
713 struct device_attribute *attr,
714 char *buf)
715 {
716 drive_info_struct *drv = to_drv(dev);
717 struct ctlr_info *h = to_hba(drv->dev.parent);
718 char model[MODEL_LEN + 1];
719 unsigned long flags;
720 int ret = 0;
722 spin_lock_irqsave(&h->lock, flags);
723 if (h->busy_configuring)
724 ret = -EBUSY;
725 else
726 memcpy(model, drv->model, MODEL_LEN + 1);
727 spin_unlock_irqrestore(&h->lock, flags);
729 if (ret)
730 return ret;
731 else
732 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
733 }
734 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
736 static ssize_t dev_show_rev(struct device *dev,
737 struct device_attribute *attr,
738 char *buf)
739 {
740 drive_info_struct *drv = to_drv(dev);
741 struct ctlr_info *h = to_hba(drv->dev.parent);
742 char rev[REV_LEN + 1];
743 unsigned long flags;
744 int ret = 0;
746 spin_lock_irqsave(&h->lock, flags);
747 if (h->busy_configuring)
748 ret = -EBUSY;
749 else
750 memcpy(rev, drv->rev, REV_LEN + 1);
751 spin_unlock_irqrestore(&h->lock, flags);
753 if (ret)
754 return ret;
755 else
756 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
757 }
758 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
760 static ssize_t cciss_show_lunid(struct device *dev,
761 struct device_attribute *attr, char *buf)
762 {
763 drive_info_struct *drv = to_drv(dev);
764 struct ctlr_info *h = to_hba(drv->dev.parent);
765 unsigned long flags;
766 unsigned char lunid[8];
768 spin_lock_irqsave(&h->lock, flags);
769 if (h->busy_configuring) {
770 spin_unlock_irqrestore(&h->lock, flags);
771 return -EBUSY;
772 }
773 if (!drv->heads) {
774 spin_unlock_irqrestore(&h->lock, flags);
775 return -ENOTTY;
776 }
777 memcpy(lunid, drv->LunID, sizeof(lunid));
778 spin_unlock_irqrestore(&h->lock, flags);
779 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
780 lunid[0], lunid[1], lunid[2], lunid[3],
781 lunid[4], lunid[5], lunid[6], lunid[7]);
782 }
783 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
785 static ssize_t cciss_show_raid_level(struct device *dev,
786 struct device_attribute *attr, char *buf)
787 {
788 drive_info_struct *drv = to_drv(dev);
789 struct ctlr_info *h = to_hba(drv->dev.parent);
790 int raid;
791 unsigned long flags;
793 spin_lock_irqsave(&h->lock, flags);
794 if (h->busy_configuring) {
795 spin_unlock_irqrestore(&h->lock, flags);
796 return -EBUSY;
797 }
798 raid = drv->raid_level;
799 spin_unlock_irqrestore(&h->lock, flags);
800 if (raid < 0 || raid > RAID_UNKNOWN)
801 raid = RAID_UNKNOWN;
803 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
804 raid_label[raid]);
805 }
806 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
808 static ssize_t cciss_show_usage_count(struct device *dev,
809 struct device_attribute *attr, char *buf)
810 {
811 drive_info_struct *drv = to_drv(dev);
812 struct ctlr_info *h = to_hba(drv->dev.parent);
813 unsigned long flags;
814 int count;
816 spin_lock_irqsave(&h->lock, flags);
817 if (h->busy_configuring) {
818 spin_unlock_irqrestore(&h->lock, flags);
819 return -EBUSY;
820 }
821 count = drv->usage_count;
822 spin_unlock_irqrestore(&h->lock, flags);
823 return snprintf(buf, 20, "%d\n", count);
824 }
825 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
827 static struct attribute *cciss_host_attrs[] = {
828 &dev_attr_rescan.attr,
829 &dev_attr_resettable.attr,
830 &dev_attr_transport_mode.attr,
831 NULL
832 };
834 static struct attribute_group cciss_host_attr_group = {
835 .attrs = cciss_host_attrs,
836 };
838 static const struct attribute_group *cciss_host_attr_groups[] = {
839 &cciss_host_attr_group,
840 NULL
841 };
843 static struct device_type cciss_host_type = {
844 .name = "cciss_host",
845 .groups = cciss_host_attr_groups,
846 .release = cciss_hba_release,
847 };
849 static struct attribute *cciss_dev_attrs[] = {
850 &dev_attr_unique_id.attr,
851 &dev_attr_model.attr,
852 &dev_attr_vendor.attr,
853 &dev_attr_rev.attr,
854 &dev_attr_lunid.attr,
855 &dev_attr_raid_level.attr,
856 &dev_attr_usage_count.attr,
857 NULL
858 };
860 static struct attribute_group cciss_dev_attr_group = {
861 .attrs = cciss_dev_attrs,
862 };
864 static const struct attribute_group *cciss_dev_attr_groups[] = {
865 &cciss_dev_attr_group,
866 NULL
867 };
869 static struct device_type cciss_dev_type = {
870 .name = "cciss_device",
871 .groups = cciss_dev_attr_groups,
872 .release = cciss_device_release,
873 };
875 static struct bus_type cciss_bus_type = {
876 .name = "cciss",
877 };
879 /*
880 * cciss_hba_release is called when the reference count
881 * of h->dev goes to zero.
882 */
883 static void cciss_hba_release(struct device *dev)
884 {
885 /*
886 * nothing to do, but need this to avoid a warning
887 * about not having a release handler from lib/kref.c.
888 */
889 }
891 /*
892 * Initialize sysfs entry for each controller. This sets up and registers
893 * the 'cciss#' directory for each individual controller under
894 * /sys/bus/pci/devices/<dev>/.
895 */
896 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
897 {
898 device_initialize(&h->dev);
899 h->dev.type = &cciss_host_type;
900 h->dev.bus = &cciss_bus_type;
901 dev_set_name(&h->dev, "%s", h->devname);
902 h->dev.parent = &h->pdev->dev;
904 return device_add(&h->dev);
905 }
907 /*
908 * Remove sysfs entries for an hba.
909 */
910 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
911 {
912 device_del(&h->dev);
913 put_device(&h->dev); /* final put. */
914 }
916 /* cciss_device_release is called when the reference count
917 * of h->drv[x]dev goes to zero.
918 */
919 static void cciss_device_release(struct device *dev)
920 {
921 drive_info_struct *drv = to_drv(dev);
922 kfree(drv);
923 }
925 /*
926 * Initialize sysfs for each logical drive. This sets up and registers
927 * the 'c#d#' directory for each individual logical drive under
928 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
929 * /sys/block/cciss!c#d# to this entry.
930 */
931 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
932 int drv_index)
933 {
934 struct device *dev;
936 if (h->drv[drv_index]->device_initialized)
937 return 0;
939 dev = &h->drv[drv_index]->dev;
940 device_initialize(dev);
941 dev->type = &cciss_dev_type;
942 dev->bus = &cciss_bus_type;
943 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
944 dev->parent = &h->dev;
945 h->drv[drv_index]->device_initialized = 1;
946 return device_add(dev);
947 }
949 /*
950 * Remove sysfs entries for a logical drive.
951 */
952 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
953 int ctlr_exiting)
954 {
955 struct device *dev = &h->drv[drv_index]->dev;
957 /* special case for c*d0, we only destroy it on controller exit */
958 if (drv_index == 0 && !ctlr_exiting)
959 return;
961 device_del(dev);
962 put_device(dev); /* the "final" put. */
963 h->drv[drv_index] = NULL;
964 }
966 /*
967 * For operations that cannot sleep, a command block is allocated at init,
968 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
969 * which ones are free or in use.
970 */
971 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
972 {
973 CommandList_struct *c;
974 int i;
975 u64bit temp64;
976 dma_addr_t cmd_dma_handle, err_dma_handle;
978 do {
979 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
980 if (i == h->nr_cmds)
981 return NULL;
982 } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
983 c = h->cmd_pool + i;
984 memset(c, 0, sizeof(CommandList_struct));
985 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
986 c->err_info = h->errinfo_pool + i;
987 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
988 err_dma_handle = h->errinfo_pool_dhandle
989 + i * sizeof(ErrorInfo_struct);
990 h->nr_allocs++;
992 c->cmdindex = i;
994 INIT_LIST_HEAD(&c->list);
995 c->busaddr = (__u32) cmd_dma_handle;
996 temp64.val = (__u64) err_dma_handle;
997 c->ErrDesc.Addr.lower = temp64.val32.lower;
998 c->ErrDesc.Addr.upper = temp64.val32.upper;
999 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1001 c->ctlr = h->ctlr;
1002 return c;
1003 }
1005 /* allocate a command using pci_alloc_consistent, used for ioctls,
1006 * etc., not for the main i/o path.
1007 */
1008 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1009 {
1010 CommandList_struct *c;
1011 u64bit temp64;
1012 dma_addr_t cmd_dma_handle, err_dma_handle;
1014 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
1015 sizeof(CommandList_struct), &cmd_dma_handle);
1016 if (c == NULL)
1017 return NULL;
1018 memset(c, 0, sizeof(CommandList_struct));
1020 c->cmdindex = -1;
1022 c->err_info = (ErrorInfo_struct *)
1023 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1024 &err_dma_handle);
1026 if (c->err_info == NULL) {
1027 pci_free_consistent(h->pdev,
1028 sizeof(CommandList_struct), c, cmd_dma_handle);
1029 return NULL;
1030 }
1031 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1033 INIT_LIST_HEAD(&c->list);
1034 c->busaddr = (__u32) cmd_dma_handle;
1035 temp64.val = (__u64) err_dma_handle;
1036 c->ErrDesc.Addr.lower = temp64.val32.lower;
1037 c->ErrDesc.Addr.upper = temp64.val32.upper;
1038 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1040 c->ctlr = h->ctlr;
1041 return c;
1042 }
1044 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1045 {
1046 int i;
1048 i = c - h->cmd_pool;
1049 clear_bit(i, h->cmd_pool_bits);
1050 h->nr_frees++;
1051 }
1053 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1054 {
1055 u64bit temp64;
1057 temp64.val32.lower = c->ErrDesc.Addr.lower;
1058 temp64.val32.upper = c->ErrDesc.Addr.upper;
1059 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1060 c->err_info, (dma_addr_t) temp64.val);
1061 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1062 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1063 }
1065 static inline ctlr_info_t *get_host(struct gendisk *disk)
1066 {
1067 return disk->queue->queuedata;
1068 }
1070 static inline drive_info_struct *get_drv(struct gendisk *disk)
1071 {
1072 return disk->private_data;
1073 }
1075 /*
1076 * Open. Make sure the device is really there.
1077 */
1078 static int cciss_open(struct block_device *bdev, fmode_t mode)
1079 {
1080 ctlr_info_t *h = get_host(bdev->bd_disk);
1081 drive_info_struct *drv = get_drv(bdev->bd_disk);
1083 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1084 if (drv->busy_configuring)
1085 return -EBUSY;
1086 /*
1087 * Root is allowed to open raw volume zero even if it's not configured
1088 * so array config can still work. Root is also allowed to open any
1089 * volume that has a LUN ID, so it can issue IOCTL to reread the
1090 * disk information. I don't think I really like this
1091 * but I'm already using way to many device nodes to claim another one
1092 * for "raw controller".
1093 */
1094 if (drv->heads == 0) {
1095 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1096 /* if not node 0 make sure it is a partition = 0 */
1097 if (MINOR(bdev->bd_dev) & 0x0f) {
1098 return -ENXIO;
1099 /* if it is, make sure we have a LUN ID */
1100 } else if (memcmp(drv->LunID, CTLR_LUNID,
1101 sizeof(drv->LunID))) {
1102 return -ENXIO;
1103 }
1104 }
1105 if (!capable(CAP_SYS_ADMIN))
1106 return -EPERM;
1107 }
1108 drv->usage_count++;
1109 h->usage_count++;
1110 return 0;
1111 }
1113 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1114 {
1115 int ret;
1117 mutex_lock(&cciss_mutex);
1118 ret = cciss_open(bdev, mode);
1119 mutex_unlock(&cciss_mutex);
1121 return ret;
1122 }
1124 /*
1125 * Close. Sync first.
1126 */
1127 static int cciss_release(struct gendisk *disk, fmode_t mode)
1128 {
1129 ctlr_info_t *h;
1130 drive_info_struct *drv;
1132 mutex_lock(&cciss_mutex);
1133 h = get_host(disk);
1134 drv = get_drv(disk);
1135 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1136 drv->usage_count--;
1137 h->usage_count--;
1138 mutex_unlock(&cciss_mutex);
1139 return 0;
1140 }
1142 static int do_ioctl(struct block_device *bdev, fmode_t mode,
1143 unsigned cmd, unsigned long arg)
1144 {
1145 int ret;
1146 mutex_lock(&cciss_mutex);
1147 ret = cciss_ioctl(bdev, mode, cmd, arg);
1148 mutex_unlock(&cciss_mutex);
1149 return ret;
1150 }
1152 #ifdef CONFIG_COMPAT
1154 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1155 unsigned cmd, unsigned long arg);
1156 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1157 unsigned cmd, unsigned long arg);
1159 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1160 unsigned cmd, unsigned long arg)
1161 {
1162 switch (cmd) {
1163 case CCISS_GETPCIINFO:
1164 case CCISS_GETINTINFO:
1165 case CCISS_SETINTINFO:
1166 case CCISS_GETNODENAME:
1167 case CCISS_SETNODENAME:
1168 case CCISS_GETHEARTBEAT:
1169 case CCISS_GETBUSTYPES:
1170 case CCISS_GETFIRMVER:
1171 case CCISS_GETDRIVVER:
1172 case CCISS_REVALIDVOLS:
1173 case CCISS_DEREGDISK:
1174 case CCISS_REGNEWDISK:
1175 case CCISS_REGNEWD:
1176 case CCISS_RESCANDISK:
1177 case CCISS_GETLUNINFO:
1178 return do_ioctl(bdev, mode, cmd, arg);
1180 case CCISS_PASSTHRU32:
1181 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1182 case CCISS_BIG_PASSTHRU32:
1183 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1185 default:
1186 return -ENOIOCTLCMD;
1187 }
1188 }
1190 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1191 unsigned cmd, unsigned long arg)
1192 {
1193 IOCTL32_Command_struct __user *arg32 =
1194 (IOCTL32_Command_struct __user *) arg;
1195 IOCTL_Command_struct arg64;
1196 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1197 int err;
1198 u32 cp;
1200 err = 0;
1201 err |=
1202 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1203 sizeof(arg64.LUN_info));
1204 err |=
1205 copy_from_user(&arg64.Request, &arg32->Request,
1206 sizeof(arg64.Request));
1207 err |=
1208 copy_from_user(&arg64.error_info, &arg32->error_info,
1209 sizeof(arg64.error_info));
1210 err |= get_user(arg64.buf_size, &arg32->buf_size);
1211 err |= get_user(cp, &arg32->buf);
1212 arg64.buf = compat_ptr(cp);
1213 err |= copy_to_user(p, &arg64, sizeof(arg64));
1215 if (err)
1216 return -EFAULT;
1218 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1219 if (err)
1220 return err;
1221 err |=
1222 copy_in_user(&arg32->error_info, &p->error_info,
1223 sizeof(arg32->error_info));
1224 if (err)
1225 return -EFAULT;
1226 return err;
1227 }
1229 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1230 unsigned cmd, unsigned long arg)
1231 {
1232 BIG_IOCTL32_Command_struct __user *arg32 =
1233 (BIG_IOCTL32_Command_struct __user *) arg;
1234 BIG_IOCTL_Command_struct arg64;
1235 BIG_IOCTL_Command_struct __user *p =
1236 compat_alloc_user_space(sizeof(arg64));
1237 int err;
1238 u32 cp;
1240 memset(&arg64, 0, sizeof(arg64));
1241 err = 0;
1242 err |=
1243 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1244 sizeof(arg64.LUN_info));
1245 err |=
1246 copy_from_user(&arg64.Request, &arg32->Request,
1247 sizeof(arg64.Request));
1248 err |=
1249 copy_from_user(&arg64.error_info, &arg32->error_info,
1250 sizeof(arg64.error_info));
1251 err |= get_user(arg64.buf_size, &arg32->buf_size);
1252 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1253 err |= get_user(cp, &arg32->buf);
1254 arg64.buf = compat_ptr(cp);
1255 err |= copy_to_user(p, &arg64, sizeof(arg64));
1257 if (err)
1258 return -EFAULT;
1260 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1261 if (err)
1262 return err;
1263 err |=
1264 copy_in_user(&arg32->error_info, &p->error_info,
1265 sizeof(arg32->error_info));
1266 if (err)
1267 return -EFAULT;
1268 return err;
1269 }
1270 #endif
1272 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1273 {
1274 drive_info_struct *drv = get_drv(bdev->bd_disk);
1276 if (!drv->cylinders)
1277 return -ENXIO;
1279 geo->heads = drv->heads;
1280 geo->sectors = drv->sectors;
1281 geo->cylinders = drv->cylinders;
1282 return 0;
1283 }
1285 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1286 {
1287 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1288 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1289 (void)check_for_unit_attention(h, c);
1290 }
1292 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1293 {
1294 cciss_pci_info_struct pciinfo;
1296 if (!argp)
1297 return -EINVAL;
1298 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1299 pciinfo.bus = h->pdev->bus->number;
1300 pciinfo.dev_fn = h->pdev->devfn;
1301 pciinfo.board_id = h->board_id;
1302 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1303 return -EFAULT;
1304 return 0;
1305 }
1307 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1308 {
1309 cciss_coalint_struct intinfo;
1311 if (!argp)
1312 return -EINVAL;
1313 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1314 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1315 if (copy_to_user
1316 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1317 return -EFAULT;
1318 return 0;
1319 }
1321 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1322 {
1323 cciss_coalint_struct intinfo;
1324 unsigned long flags;
1325 int i;
1327 if (!argp)
1328 return -EINVAL;
1329 if (!capable(CAP_SYS_ADMIN))
1330 return -EPERM;
1331 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1332 return -EFAULT;
1333 if ((intinfo.delay == 0) && (intinfo.count == 0))
1334 return -EINVAL;
1335 spin_lock_irqsave(&h->lock, flags);
1336 /* Update the field, and then ring the doorbell */
1337 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1338 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1339 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1341 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1342 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1343 break;
1344 udelay(1000); /* delay and try again */
1345 }
1346 spin_unlock_irqrestore(&h->lock, flags);
1347 if (i >= MAX_IOCTL_CONFIG_WAIT)
1348 return -EAGAIN;
1349 return 0;
1350 }
1352 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1353 {
1354 NodeName_type NodeName;
1355 int i;
1357 if (!argp)
1358 return -EINVAL;
1359 for (i = 0; i < 16; i++)
1360 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1361 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1362 return -EFAULT;
1363 return 0;
1364 }
1366 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1367 {
1368 NodeName_type NodeName;
1369 unsigned long flags;
1370 int i;
1372 if (!argp)
1373 return -EINVAL;
1374 if (!capable(CAP_SYS_ADMIN))
1375 return -EPERM;
1376 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1377 return -EFAULT;
1378 spin_lock_irqsave(&h->lock, flags);
1379 /* Update the field, and then ring the doorbell */
1380 for (i = 0; i < 16; i++)
1381 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1382 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1383 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1384 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1385 break;
1386 udelay(1000); /* delay and try again */
1387 }
1388 spin_unlock_irqrestore(&h->lock, flags);
1389 if (i >= MAX_IOCTL_CONFIG_WAIT)
1390 return -EAGAIN;
1391 return 0;
1392 }
1394 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1395 {
1396 Heartbeat_type heartbeat;
1398 if (!argp)
1399 return -EINVAL;
1400 heartbeat = readl(&h->cfgtable->HeartBeat);
1401 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1402 return -EFAULT;
1403 return 0;
1404 }
1406 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1407 {
1408 BusTypes_type BusTypes;
1410 if (!argp)
1411 return -EINVAL;
1412 BusTypes = readl(&h->cfgtable->BusTypes);
1413 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1414 return -EFAULT;
1415 return 0;
1416 }
1418 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1419 {
1420 FirmwareVer_type firmware;
1422 if (!argp)
1423 return -EINVAL;
1424 memcpy(firmware, h->firm_ver, 4);
1426 if (copy_to_user
1427 (argp, firmware, sizeof(FirmwareVer_type)))
1428 return -EFAULT;
1429 return 0;
1430 }
1432 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1433 {
1434 DriverVer_type DriverVer = DRIVER_VERSION;
1436 if (!argp)
1437 return -EINVAL;
1438 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1439 return -EFAULT;
1440 return 0;
1441 }
1443 static int cciss_getluninfo(ctlr_info_t *h,
1444 struct gendisk *disk, void __user *argp)
1445 {
1446 LogvolInfo_struct luninfo;
1447 drive_info_struct *drv = get_drv(disk);
1449 if (!argp)
1450 return -EINVAL;
1451 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1452 luninfo.num_opens = drv->usage_count;
1453 luninfo.num_parts = 0;
1454 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1455 return -EFAULT;
1456 return 0;
1457 }
1459 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1460 {
1461 IOCTL_Command_struct iocommand;
1462 CommandList_struct *c;
1463 char *buff = NULL;
1464 u64bit temp64;
1465 DECLARE_COMPLETION_ONSTACK(wait);
1467 if (!argp)
1468 return -EINVAL;
1470 if (!capable(CAP_SYS_RAWIO))
1471 return -EPERM;
1473 if (copy_from_user
1474 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1475 return -EFAULT;
1476 if ((iocommand.buf_size < 1) &&
1477 (iocommand.Request.Type.Direction != XFER_NONE)) {
1478 return -EINVAL;
1479 }
1480 if (iocommand.buf_size > 0) {
1481 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1482 if (buff == NULL)
1483 return -EFAULT;
1484 }
1485 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1486 /* Copy the data into the buffer we created */
1487 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1488 kfree(buff);
1489 return -EFAULT;
1490 }
1491 } else {
1492 memset(buff, 0, iocommand.buf_size);
1493 }
1494 c = cmd_special_alloc(h);
1495 if (!c) {
1496 kfree(buff);
1497 return -ENOMEM;
1498 }
1499 /* Fill in the command type */
1500 c->cmd_type = CMD_IOCTL_PEND;
1501 /* Fill in Command Header */
1502 c->Header.ReplyQueue = 0; /* unused in simple mode */
1503 if (iocommand.buf_size > 0) { /* buffer to fill */
1504 c->Header.SGList = 1;
1505 c->Header.SGTotal = 1;
1506 } else { /* no buffers to fill */
1507 c->Header.SGList = 0;
1508 c->Header.SGTotal = 0;
1509 }
1510 c->Header.LUN = iocommand.LUN_info;
1511 /* use the kernel address the cmd block for tag */
1512 c->Header.Tag.lower = c->busaddr;
1514 /* Fill in Request block */
1515 c->Request = iocommand.Request;
1517 /* Fill in the scatter gather information */
1518 if (iocommand.buf_size > 0) {
1519 temp64.val = pci_map_single(h->pdev, buff,
1520 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1521 c->SG[0].Addr.lower = temp64.val32.lower;
1522 c->SG[0].Addr.upper = temp64.val32.upper;
1523 c->SG[0].Len = iocommand.buf_size;
1524 c->SG[0].Ext = 0; /* we are not chaining */
1525 }
1526 c->waiting = &wait;
1528 enqueue_cmd_and_start_io(h, c);
1529 wait_for_completion(&wait);
1531 /* unlock the buffers from DMA */
1532 temp64.val32.lower = c->SG[0].Addr.lower;
1533 temp64.val32.upper = c->SG[0].Addr.upper;
1534 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1535 PCI_DMA_BIDIRECTIONAL);
1536 check_ioctl_unit_attention(h, c);
1538 /* Copy the error information out */
1539 iocommand.error_info = *(c->err_info);
1540 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1541 kfree(buff);
1542 cmd_special_free(h, c);
1543 return -EFAULT;
1544 }
1546 if (iocommand.Request.Type.Direction == XFER_READ) {
1547 /* Copy the data out of the buffer we created */
1548 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1549 kfree(buff);
1550 cmd_special_free(h, c);
1551 return -EFAULT;
1552 }
1553 }
1554 kfree(buff);
1555 cmd_special_free(h, c);
1556 return 0;
1557 }
1559 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1560 {
1561 BIG_IOCTL_Command_struct *ioc;
1562 CommandList_struct *c;
1563 unsigned char **buff = NULL;
1564 int *buff_size = NULL;
1565 u64bit temp64;
1566 BYTE sg_used = 0;
1567 int status = 0;
1568 int i;
1569 DECLARE_COMPLETION_ONSTACK(wait);
1570 __u32 left;
1571 __u32 sz;
1572 BYTE __user *data_ptr;
1574 if (!argp)
1575 return -EINVAL;
1576 if (!capable(CAP_SYS_RAWIO))
1577 return -EPERM;
1578 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
1579 if (!ioc) {
1580 status = -ENOMEM;
1581 goto cleanup1;
1582 }
1583 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1584 status = -EFAULT;
1585 goto cleanup1;
1586 }
1587 if ((ioc->buf_size < 1) &&
1588 (ioc->Request.Type.Direction != XFER_NONE)) {
1589 status = -EINVAL;
1590 goto cleanup1;
1591 }
1592 /* Check kmalloc limits using all SGs */
1593 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1594 status = -EINVAL;
1595 goto cleanup1;
1596 }
1597 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1598 status = -EINVAL;
1599 goto cleanup1;
1600 }
1601 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1602 if (!buff) {
1603 status = -ENOMEM;
1604 goto cleanup1;
1605 }
1606 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1607 if (!buff_size) {
1608 status = -ENOMEM;
1609 goto cleanup1;
1610 }
1611 left = ioc->buf_size;
1612 data_ptr = ioc->buf;
1613 while (left) {
1614 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1615 buff_size[sg_used] = sz;
1616 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1617 if (buff[sg_used] == NULL) {
1618 status = -ENOMEM;
1619 goto cleanup1;
1620 }
1621 if (ioc->Request.Type.Direction == XFER_WRITE) {
1622 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1623 status = -EFAULT;
1624 goto cleanup1;
1625 }
1626 } else {
1627 memset(buff[sg_used], 0, sz);
1628 }
1629 left -= sz;
1630 data_ptr += sz;
1631 sg_used++;
1632 }
1633 c = cmd_special_alloc(h);
1634 if (!c) {
1635 status = -ENOMEM;
1636 goto cleanup1;
1637 }
1638 c->cmd_type = CMD_IOCTL_PEND;
1639 c->Header.ReplyQueue = 0;
1640 c->Header.SGList = sg_used;
1641 c->Header.SGTotal = sg_used;
1642 c->Header.LUN = ioc->LUN_info;
1643 c->Header.Tag.lower = c->busaddr;
1645 c->Request = ioc->Request;
1646 for (i = 0; i < sg_used; i++) {
1647 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1648 PCI_DMA_BIDIRECTIONAL);
1649 c->SG[i].Addr.lower = temp64.val32.lower;
1650 c->SG[i].Addr.upper = temp64.val32.upper;
1651 c->SG[i].Len = buff_size[i];
1652 c->SG[i].Ext = 0; /* we are not chaining */
1653 }
1654 c->waiting = &wait;
1655 enqueue_cmd_and_start_io(h, c);
1656 wait_for_completion(&wait);
1657 /* unlock the buffers from DMA */
1658 for (i = 0; i < sg_used; i++) {
1659 temp64.val32.lower = c->SG[i].Addr.lower;
1660 temp64.val32.upper = c->SG[i].Addr.upper;
1661 pci_unmap_single(h->pdev,
1662 (dma_addr_t) temp64.val, buff_size[i],
1663 PCI_DMA_BIDIRECTIONAL);
1664 }
1665 check_ioctl_unit_attention(h, c);
1666 /* Copy the error information out */
1667 ioc->error_info = *(c->err_info);
1668 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1669 cmd_special_free(h, c);
1670 status = -EFAULT;
1671 goto cleanup1;
1672 }
1673 if (ioc->Request.Type.Direction == XFER_READ) {
1674 /* Copy the data out of the buffer we created */
1675 BYTE __user *ptr = ioc->buf;
1676 for (i = 0; i < sg_used; i++) {
1677 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1678 cmd_special_free(h, c);
1679 status = -EFAULT;
1680 goto cleanup1;
1681 }
1682 ptr += buff_size[i];
1683 }
1684 }
1685 cmd_special_free(h, c);
1686 status = 0;
1687 cleanup1:
1688 if (buff) {
1689 for (i = 0; i < sg_used; i++)
1690 kfree(buff[i]);
1691 kfree(buff);
1692 }
1693 kfree(buff_size);
1694 kfree(ioc);
1695 return status;
1696 }
1698 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1699 unsigned int cmd, unsigned long arg)
1700 {
1701 struct gendisk *disk = bdev->bd_disk;
1702 ctlr_info_t *h = get_host(disk);
1703 void __user *argp = (void __user *)arg;
1705 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1706 cmd, arg);
1707 switch (cmd) {
1708 case CCISS_GETPCIINFO:
1709 return cciss_getpciinfo(h, argp);
1710 case CCISS_GETINTINFO:
1711 return cciss_getintinfo(h, argp);
1712 case CCISS_SETINTINFO:
1713 return cciss_setintinfo(h, argp);
1714 case CCISS_GETNODENAME:
1715 return cciss_getnodename(h, argp);
1716 case CCISS_SETNODENAME:
1717 return cciss_setnodename(h, argp);
1718 case CCISS_GETHEARTBEAT:
1719 return cciss_getheartbeat(h, argp);
1720 case CCISS_GETBUSTYPES:
1721 return cciss_getbustypes(h, argp);
1722 case CCISS_GETFIRMVER:
1723 return cciss_getfirmver(h, argp);
1724 case CCISS_GETDRIVVER:
1725 return cciss_getdrivver(h, argp);
1726 case CCISS_DEREGDISK:
1727 case CCISS_REGNEWD:
1728 case CCISS_REVALIDVOLS:
1729 return rebuild_lun_table(h, 0, 1);
1730 case CCISS_GETLUNINFO:
1731 return cciss_getluninfo(h, disk, argp);
1732 case CCISS_PASSTHRU:
1733 return cciss_passthru(h, argp);
1734 case CCISS_BIG_PASSTHRU:
1735 return cciss_bigpassthru(h, argp);
1737 /* scsi_cmd_blk_ioctl handles these, below, though some are not */
1738 /* very meaningful for cciss. SG_IO is the main one people want. */
1740 case SG_GET_VERSION_NUM:
1741 case SG_SET_TIMEOUT:
1742 case SG_GET_TIMEOUT:
1743 case SG_GET_RESERVED_SIZE:
1744 case SG_SET_RESERVED_SIZE:
1745 case SG_EMULATED_HOST:
1746 case SG_IO:
1747 case SCSI_IOCTL_SEND_COMMAND:
1748 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
1750 /* scsi_cmd_blk_ioctl would normally handle these, below, but */
1751 /* they aren't a good fit for cciss, as CD-ROMs are */
1752 /* not supported, and we don't have any bus/target/lun */
1753 /* which we present to the kernel. */
1755 case CDROM_SEND_PACKET:
1756 case CDROMCLOSETRAY:
1757 case CDROMEJECT:
1758 case SCSI_IOCTL_GET_IDLUN:
1759 case SCSI_IOCTL_GET_BUS_NUMBER:
1760 default:
1761 return -ENOTTY;
1762 }
1763 }
1765 static void cciss_check_queues(ctlr_info_t *h)
1766 {
1767 int start_queue = h->next_to_run;
1768 int i;
1770 /* check to see if we have maxed out the number of commands that can
1771 * be placed on the queue. If so then exit. We do this check here
1772 * in case the interrupt we serviced was from an ioctl and did not
1773 * free any new commands.
1774 */
1775 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1776 return;
1778 /* We have room on the queue for more commands. Now we need to queue
1779 * them up. We will also keep track of the next queue to run so
1780 * that every queue gets a chance to be started first.
1781 */
1782 for (i = 0; i < h->highest_lun + 1; i++) {
1783 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1784 /* make sure the disk has been added and the drive is real
1785 * because this can be called from the middle of init_one.
1786 */
1787 if (!h->drv[curr_queue])
1788 continue;
1789 if (!(h->drv[curr_queue]->queue) ||
1790 !(h->drv[curr_queue]->heads))
1791 continue;
1792 blk_start_queue(h->gendisk[curr_queue]->queue);
1794 /* check to see if we have maxed out the number of commands
1795 * that can be placed on the queue.
1796 */
1797 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1798 if (curr_queue == start_queue) {
1799 h->next_to_run =
1800 (start_queue + 1) % (h->highest_lun + 1);
1801 break;
1802 } else {
1803 h->next_to_run = curr_queue;
1804 break;
1805 }
1806 }
1807 }
1808 }
1810 static void cciss_softirq_done(struct request *rq)
1811 {
1812 CommandList_struct *c = rq->completion_data;
1813 ctlr_info_t *h = hba[c->ctlr];
1814 SGDescriptor_struct *curr_sg = c->SG;
1815 u64bit temp64;
1816 unsigned long flags;
1817 int i, ddir;
1818 int sg_index = 0;
1820 if (c->Request.Type.Direction == XFER_READ)
1821 ddir = PCI_DMA_FROMDEVICE;
1822 else
1823 ddir = PCI_DMA_TODEVICE;
1825 /* command did not need to be retried */
1826 /* unmap the DMA mapping for all the scatter gather elements */
1827 for (i = 0; i < c->Header.SGList; i++) {
1828 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1829 cciss_unmap_sg_chain_block(h, c);
1830 /* Point to the next block */
1831 curr_sg = h->cmd_sg_list[c->cmdindex];
1832 sg_index = 0;
1833 }
1834 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1835 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1836 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1837 ddir);
1838 ++sg_index;
1839 }
1841 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1843 /* set the residual count for pc requests */
1844 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1845 rq->resid_len = c->err_info->ResidualCnt;
1847 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1849 spin_lock_irqsave(&h->lock, flags);
1850 cmd_free(h, c);
1851 cciss_check_queues(h);
1852 spin_unlock_irqrestore(&h->lock, flags);
1853 }
1855 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1856 unsigned char scsi3addr[], uint32_t log_unit)
1857 {
1858 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1859 sizeof(h->drv[log_unit]->LunID));
1860 }
1862 /* This function gets the SCSI vendor, model, and revision of a logical drive
1863 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1864 * they cannot be read.
1865 */
1866 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1867 char *vendor, char *model, char *rev)
1868 {
1869 int rc;
1870 InquiryData_struct *inq_buf;
1871 unsigned char scsi3addr[8];
1873 *vendor = '\0';
1874 *model = '\0';
1875 *rev = '\0';
1877 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1878 if (!inq_buf)
1879 return;
1881 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1882 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1883 scsi3addr, TYPE_CMD);
1884 if (rc == IO_OK) {
1885 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1886 vendor[VENDOR_LEN] = '\0';
1887 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1888 model[MODEL_LEN] = '\0';
1889 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1890 rev[REV_LEN] = '\0';
1891 }
1893 kfree(inq_buf);
1894 return;
1895 }
1897 /* This function gets the serial number of a logical drive via
1898 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1899 * number cannot be had, for whatever reason, 16 bytes of 0xff
1900 * are returned instead.
1901 */
1902 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1903 unsigned char *serial_no, int buflen)
1904 {
1905 #define PAGE_83_INQ_BYTES 64
1906 int rc;
1907 unsigned char *buf;
1908 unsigned char scsi3addr[8];
1910 if (buflen > 16)
1911 buflen = 16;
1912 memset(serial_no, 0xff, buflen);
1913 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1914 if (!buf)
1915 return;
1916 memset(serial_no, 0, buflen);
1917 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1918 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1919 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1920 if (rc == IO_OK)
1921 memcpy(serial_no, &buf[8], buflen);
1922 kfree(buf);
1923 return;
1924 }
1926 /*
1927 * cciss_add_disk sets up the block device queue for a logical drive
1928 */
1929 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1930 int drv_index)
1931 {
1932 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1933 if (!disk->queue)
1934 goto init_queue_failure;
1935 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1936 disk->major = h->major;
1937 disk->first_minor = drv_index << NWD_SHIFT;
1938 disk->fops = &cciss_fops;
1939 if (cciss_create_ld_sysfs_entry(h, drv_index))
1940 goto cleanup_queue;
1941 disk->private_data = h->drv[drv_index];
1942 disk->driverfs_dev = &h->drv[drv_index]->dev;
1944 /* Set up queue information */
1945 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1947 /* This is a hardware imposed limit. */
1948 blk_queue_max_segments(disk->queue, h->maxsgentries);
1950 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1952 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1954 disk->queue->queuedata = h;
1956 blk_queue_logical_block_size(disk->queue,
1957 h->drv[drv_index]->block_size);
1959 /* Make sure all queue data is written out before */
1960 /* setting h->drv[drv_index]->queue, as setting this */
1961 /* allows the interrupt handler to start the queue */
1962 wmb();
1963 h->drv[drv_index]->queue = disk->queue;
1964 add_disk(disk);
1965 return 0;
1967 cleanup_queue:
1968 blk_cleanup_queue(disk->queue);
1969 disk->queue = NULL;
1970 init_queue_failure:
1971 return -1;
1972 }
1974 /* This function will check the usage_count of the drive to be updated/added.
1975 * If the usage_count is zero and it is a heretofore unknown drive, or,
1976 * the drive's capacity, geometry, or serial number has changed,
1977 * then the drive information will be updated and the disk will be
1978 * re-registered with the kernel. If these conditions don't hold,
1979 * then it will be left alone for the next reboot. The exception to this
1980 * is disk 0 which will always be left registered with the kernel since it
1981 * is also the controller node. Any changes to disk 0 will show up on
1982 * the next reboot.
1983 */
1984 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1985 int first_time, int via_ioctl)
1986 {
1987 struct gendisk *disk;
1988 InquiryData_struct *inq_buff = NULL;
1989 unsigned int block_size;
1990 sector_t total_size;
1991 unsigned long flags = 0;
1992 int ret = 0;
1993 drive_info_struct *drvinfo;
1995 /* Get information about the disk and modify the driver structure */
1996 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1997 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
1998 if (inq_buff == NULL || drvinfo == NULL)
1999 goto mem_msg;
2001 /* testing to see if 16-byte CDBs are already being used */
2002 if (h->cciss_read == CCISS_READ_16) {
2003 cciss_read_capacity_16(h, drv_index,
2004 &total_size, &block_size);
2006 } else {
2007 cciss_read_capacity(h, drv_index, &total_size, &block_size);
2008 /* if read_capacity returns all F's this volume is >2TB */
2009 /* in size so we switch to 16-byte CDB's for all */
2010 /* read/write ops */
2011 if (total_size == 0xFFFFFFFFULL) {
2012 cciss_read_capacity_16(h, drv_index,
2013 &total_size, &block_size);
2014 h->cciss_read = CCISS_READ_16;
2015 h->cciss_write = CCISS_WRITE_16;
2016 } else {
2017 h->cciss_read = CCISS_READ_10;
2018 h->cciss_write = CCISS_WRITE_10;
2019 }
2020 }
2022 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
2023 inq_buff, drvinfo);
2024 drvinfo->block_size = block_size;
2025 drvinfo->nr_blocks = total_size + 1;
2027 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
2028 drvinfo->model, drvinfo->rev);
2029 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
2030 sizeof(drvinfo->serial_no));
2031 /* Save the lunid in case we deregister the disk, below. */
2032 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2033 sizeof(drvinfo->LunID));
2035 /* Is it the same disk we already know, and nothing's changed? */
2036 if (h->drv[drv_index]->raid_level != -1 &&
2037 ((memcmp(drvinfo->serial_no,
2038 h->drv[drv_index]->serial_no, 16) == 0) &&
2039 drvinfo->block_size == h->drv[drv_index]->block_size &&
2040 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2041 drvinfo->heads == h->drv[drv_index]->heads &&
2042 drvinfo->sectors == h->drv[drv_index]->sectors &&
2043 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2044 /* The disk is unchanged, nothing to update */
2045 goto freeret;
2047 /* If we get here it's not the same disk, or something's changed,
2048 * so we need to * deregister it, and re-register it, if it's not
2049 * in use.
2050 * If the disk already exists then deregister it before proceeding
2051 * (unless it's the first disk (for the controller node).
2052 */
2053 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2054 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2055 spin_lock_irqsave(&h->lock, flags);
2056 h->drv[drv_index]->busy_configuring = 1;
2057 spin_unlock_irqrestore(&h->lock, flags);
2059 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2060 * which keeps the interrupt handler from starting
2061 * the queue.
2062 */
2063 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2064 }
2066 /* If the disk is in use return */
2067 if (ret)
2068 goto freeret;
2070 /* Save the new information from cciss_geometry_inquiry
2071 * and serial number inquiry. If the disk was deregistered
2072 * above, then h->drv[drv_index] will be NULL.
2073 */
2074 if (h->drv[drv_index] == NULL) {
2075 drvinfo->device_initialized = 0;
2076 h->drv[drv_index] = drvinfo;
2077 drvinfo = NULL; /* so it won't be freed below. */
2078 } else {
2079 /* special case for cxd0 */
2080 h->drv[drv_index]->block_size = drvinfo->block_size;
2081 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2082 h->drv[drv_index]->heads = drvinfo->heads;
2083 h->drv[drv_index]->sectors = drvinfo->sectors;
2084 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2085 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2086 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2087 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2088 VENDOR_LEN + 1);
2089 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2090 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2091 }
2093 ++h->num_luns;
2094 disk = h->gendisk[drv_index];
2095 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2097 /* If it's not disk 0 (drv_index != 0)
2098 * or if it was disk 0, but there was previously
2099 * no actual corresponding configured logical drive
2100 * (raid_leve == -1) then we want to update the
2101 * logical drive's information.
2102 */
2103 if (drv_index || first_time) {
2104 if (cciss_add_disk(h, disk, drv_index) != 0) {
2105 cciss_free_gendisk(h, drv_index);
2106 cciss_free_drive_info(h, drv_index);
2107 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2108 drv_index);
2109 --h->num_luns;
2110 }
2111 }
2113 freeret:
2114 kfree(inq_buff);
2115 kfree(drvinfo);
2116 return;
2117 mem_msg:
2118 dev_err(&h->pdev->dev, "out of memory\n");
2119 goto freeret;
2120 }
2122 /* This function will find the first index of the controllers drive array
2123 * that has a null drv pointer and allocate the drive info struct and
2124 * will return that index This is where new drives will be added.
2125 * If the index to be returned is greater than the highest_lun index for
2126 * the controller then highest_lun is set * to this new index.
2127 * If there are no available indexes or if tha allocation fails, then -1
2128 * is returned. * "controller_node" is used to know if this is a real
2129 * logical drive, or just the controller node, which determines if this
2130 * counts towards highest_lun.
2131 */
2132 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2133 {
2134 int i;
2135 drive_info_struct *drv;
2137 /* Search for an empty slot for our drive info */
2138 for (i = 0; i < CISS_MAX_LUN; i++) {
2140 /* if not cxd0 case, and it's occupied, skip it. */
2141 if (h->drv[i] && i != 0)
2142 continue;
2143 /*
2144 * If it's cxd0 case, and drv is alloc'ed already, and a
2145 * disk is configured there, skip it.
2146 */
2147 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2148 continue;
2150 /*
2151 * We've found an empty slot. Update highest_lun
2152 * provided this isn't just the fake cxd0 controller node.
2153 */
2154 if (i > h->highest_lun && !controller_node)
2155 h->highest_lun = i;
2157 /* If adding a real disk at cxd0, and it's already alloc'ed */
2158 if (i == 0 && h->drv[i] != NULL)
2159 return i;
2161 /*
2162 * Found an empty slot, not already alloc'ed. Allocate it.
2163 * Mark it with raid_level == -1, so we know it's new later on.
2164 */
2165 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2166 if (!drv)
2167 return -1;
2168 drv->raid_level = -1; /* so we know it's new */
2169 h->drv[i] = drv;
2170 return i;
2171 }
2172 return -1;
2173 }
2175 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2176 {
2177 kfree(h->drv[drv_index]);
2178 h->drv[drv_index] = NULL;
2179 }
2181 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2182 {
2183 put_disk(h->gendisk[drv_index]);
2184 h->gendisk[drv_index] = NULL;
2185 }
2187 /* cciss_add_gendisk finds a free hba[]->drv structure
2188 * and allocates a gendisk if needed, and sets the lunid
2189 * in the drvinfo structure. It returns the index into
2190 * the ->drv[] array, or -1 if none are free.
2191 * is_controller_node indicates whether highest_lun should
2192 * count this disk, or if it's only being added to provide
2193 * a means to talk to the controller in case no logical
2194 * drives have yet been configured.
2195 */
2196 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2197 int controller_node)
2198 {
2199 int drv_index;
2201 drv_index = cciss_alloc_drive_info(h, controller_node);
2202 if (drv_index == -1)
2203 return -1;
2205 /*Check if the gendisk needs to be allocated */
2206 if (!h->gendisk[drv_index]) {
2207 h->gendisk[drv_index] =
2208 alloc_disk(1 << NWD_SHIFT);
2209 if (!h->gendisk[drv_index]) {
2210 dev_err(&h->pdev->dev,
2211 "could not allocate a new disk %d\n",
2212 drv_index);
2213 goto err_free_drive_info;
2214 }
2215 }
2216 memcpy(h->drv[drv_index]->LunID, lunid,
2217 sizeof(h->drv[drv_index]->LunID));
2218 if (cciss_create_ld_sysfs_entry(h, drv_index))
2219 goto err_free_disk;
2220 /* Don't need to mark this busy because nobody */
2221 /* else knows about this disk yet to contend */
2222 /* for access to it. */
2223 h->drv[drv_index]->busy_configuring = 0;
2224 wmb();
2225 return drv_index;
2227 err_free_disk:
2228 cciss_free_gendisk(h, drv_index);
2229 err_free_drive_info:
2230 cciss_free_drive_info(h, drv_index);
2231 return -1;
2232 }
2234 /* This is for the special case of a controller which
2235 * has no logical drives. In this case, we still need
2236 * to register a disk so the controller can be accessed
2237 * by the Array Config Utility.
2238 */
2239 static void cciss_add_controller_node(ctlr_info_t *h)
2240 {
2241 struct gendisk *disk;
2242 int drv_index;
2244 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2245 return;
2247 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2248 if (drv_index == -1)
2249 goto error;
2250 h->drv[drv_index]->block_size = 512;
2251 h->drv[drv_index]->nr_blocks = 0;
2252 h->drv[drv_index]->heads = 0;
2253 h->drv[drv_index]->sectors = 0;
2254 h->drv[drv_index]->cylinders = 0;
2255 h->drv[drv_index]->raid_level = -1;
2256 memset(h->drv[drv_index]->serial_no, 0, 16);
2257 disk = h->gendisk[drv_index];
2258 if (cciss_add_disk(h, disk, drv_index) == 0)
2259 return;
2260 cciss_free_gendisk(h, drv_index);
2261 cciss_free_drive_info(h, drv_index);
2262 error:
2263 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2264 return;
2265 }
2267 /* This function will add and remove logical drives from the Logical
2268 * drive array of the controller and maintain persistency of ordering
2269 * so that mount points are preserved until the next reboot. This allows
2270 * for the removal of logical drives in the middle of the drive array
2271 * without a re-ordering of those drives.
2272 * INPUT
2273 * h = The controller to perform the operations on
2274 */
2275 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2276 int via_ioctl)
2277 {
2278 int num_luns;
2279 ReportLunData_struct *ld_buff = NULL;
2280 int return_code;
2281 int listlength = 0;
2282 int i;
2283 int drv_found;
2284 int drv_index = 0;
2285 unsigned char lunid[8] = CTLR_LUNID;
2286 unsigned long flags;
2288 if (!capable(CAP_SYS_RAWIO))
2289 return -EPERM;
2291 /* Set busy_configuring flag for this operation */
2292 spin_lock_irqsave(&h->lock, flags);
2293 if (h->busy_configuring) {
2294 spin_unlock_irqrestore(&h->lock, flags);
2295 return -EBUSY;
2296 }
2297 h->busy_configuring = 1;
2298 spin_unlock_irqrestore(&h->lock, flags);
2300 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2301 if (ld_buff == NULL)
2302 goto mem_msg;
2304 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2305 sizeof(ReportLunData_struct),
2306 0, CTLR_LUNID, TYPE_CMD);
2308 if (return_code == IO_OK)
2309 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2310 else { /* reading number of logical volumes failed */
2311 dev_warn(&h->pdev->dev,
2312 "report logical volume command failed\n");
2313 listlength = 0;
2314 goto freeret;
2315 }
2317 num_luns = listlength / 8; /* 8 bytes per entry */
2318 if (num_luns > CISS_MAX_LUN) {
2319 num_luns = CISS_MAX_LUN;
2320 dev_warn(&h->pdev->dev, "more luns configured"
2321 " on controller than can be handled by"
2322 " this driver.\n");
2323 }
2325 if (num_luns == 0)
2326 cciss_add_controller_node(h);
2328 /* Compare controller drive array to driver's drive array
2329 * to see if any drives are missing on the controller due
2330 * to action of Array Config Utility (user deletes drive)
2331 * and deregister logical drives which have disappeared.
2332 */
2333 for (i = 0; i <= h->highest_lun; i++) {
2334 int j;
2335 drv_found = 0;
2337 /* skip holes in the array from already deleted drives */
2338 if (h->drv[i] == NULL)
2339 continue;
2341 for (j = 0; j < num_luns; j++) {
2342 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2343 if (memcmp(h->drv[i]->LunID, lunid,
2344 sizeof(lunid)) == 0) {
2345 drv_found = 1;
2346 break;
2347 }
2348 }
2349 if (!drv_found) {
2350 /* Deregister it from the OS, it's gone. */
2351 spin_lock_irqsave(&h->lock, flags);
2352 h->drv[i]->busy_configuring = 1;
2353 spin_unlock_irqrestore(&h->lock, flags);
2354 return_code = deregister_disk(h, i, 1, via_ioctl);
2355 if (h->drv[i] != NULL)
2356 h->drv[i]->busy_configuring = 0;
2357 }
2358 }
2360 /* Compare controller drive array to driver's drive array.
2361 * Check for updates in the drive information and any new drives
2362 * on the controller due to ACU adding logical drives, or changing
2363 * a logical drive's size, etc. Reregister any new/changed drives
2364 */
2365 for (i = 0; i < num_luns; i++) {
2366 int j;
2368 drv_found = 0;
2370 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2371 /* Find if the LUN is already in the drive array
2372 * of the driver. If so then update its info
2373 * if not in use. If it does not exist then find
2374 * the first free index and add it.
2375 */
2376 for (j = 0; j <= h->highest_lun; j++) {
2377 if (h->drv[j] != NULL &&
2378 memcmp(h->drv[j]->LunID, lunid,
2379 sizeof(h->drv[j]->LunID)) == 0) {
2380 drv_index = j;
2381 drv_found = 1;
2382 break;
2383 }
2384 }
2386 /* check if the drive was found already in the array */
2387 if (!drv_found) {
2388 drv_index = cciss_add_gendisk(h, lunid, 0);
2389 if (drv_index == -1)
2390 goto freeret;
2391 }
2392 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2393 } /* end for */
2395 freeret:
2396 kfree(ld_buff);
2397 h->busy_configuring = 0;
2398 /* We return -1 here to tell the ACU that we have registered/updated
2399 * all of the drives that we can and to keep it from calling us
2400 * additional times.
2401 */
2402 return -1;
2403 mem_msg:
2404 dev_err(&h->pdev->dev, "out of memory\n");
2405 h->busy_configuring = 0;
2406 goto freeret;
2407 }
2409 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2410 {
2411 /* zero out the disk size info */
2412 drive_info->nr_blocks = 0;
2413 drive_info->block_size = 0;
2414 drive_info->heads = 0;
2415 drive_info->sectors = 0;
2416 drive_info->cylinders = 0;
2417 drive_info->raid_level = -1;
2418 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2419 memset(drive_info->model, 0, sizeof(drive_info->model));
2420 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2421 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2422 /*
2423 * don't clear the LUNID though, we need to remember which
2424 * one this one is.
2425 */
2426 }
2428 /* This function will deregister the disk and it's queue from the
2429 * kernel. It must be called with the controller lock held and the
2430 * drv structures busy_configuring flag set. It's parameters are:
2431 *
2432 * disk = This is the disk to be deregistered
2433 * drv = This is the drive_info_struct associated with the disk to be
2434 * deregistered. It contains information about the disk used
2435 * by the driver.
2436 * clear_all = This flag determines whether or not the disk information
2437 * is going to be completely cleared out and the highest_lun
2438 * reset. Sometimes we want to clear out information about
2439 * the disk in preparation for re-adding it. In this case
2440 * the highest_lun should be left unchanged and the LunID
2441 * should not be cleared.
2442 * via_ioctl
2443 * This indicates whether we've reached this path via ioctl.
2444 * This affects the maximum usage count allowed for c0d0 to be messed with.
2445 * If this path is reached via ioctl(), then the max_usage_count will
2446 * be 1, as the process calling ioctl() has got to have the device open.
2447 * If we get here via sysfs, then the max usage count will be zero.
2448 */
2449 static int deregister_disk(ctlr_info_t *h, int drv_index,
2450 int clear_all, int via_ioctl)
2451 {
2452 int i;
2453 struct gendisk *disk;
2454 drive_info_struct *drv;
2455 int recalculate_highest_lun;
2457 if (!capable(CAP_SYS_RAWIO))
2458 return -EPERM;
2460 drv = h->drv[drv_index];
2461 disk = h->gendisk[drv_index];
2463 /* make sure logical volume is NOT is use */
2464 if (clear_all || (h->gendisk[0] == disk)) {
2465 if (drv->usage_count > via_ioctl)
2466 return -EBUSY;
2467 } else if (drv->usage_count > 0)
2468 return -EBUSY;
2470 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2472 /* invalidate the devices and deregister the disk. If it is disk
2473 * zero do not deregister it but just zero out it's values. This
2474 * allows us to delete disk zero but keep the controller registered.
2475 */
2476 if (h->gendisk[0] != disk) {
2477 struct request_queue *q = disk->queue;
2478 if (disk->flags & GENHD_FL_UP) {
2479 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2480 del_gendisk(disk);
2481 }
2482 if (q)
2483 blk_cleanup_queue(q);
2484 /* If clear_all is set then we are deleting the logical
2485 * drive, not just refreshing its info. For drives
2486 * other than disk 0 we will call put_disk. We do not
2487 * do this for disk 0 as we need it to be able to
2488 * configure the controller.
2489 */
2490 if (clear_all){
2491 /* This isn't pretty, but we need to find the
2492 * disk in our array and NULL our the pointer.
2493 * This is so that we will call alloc_disk if
2494 * this index is used again later.
2495 */
2496 for (i=0; i < CISS_MAX_LUN; i++){
2497 if (h->gendisk[i] == disk) {
2498 h->gendisk[i] = NULL;
2499 break;
2500 }
2501 }
2502 put_disk(disk);
2503 }
2504 } else {
2505 set_capacity(disk, 0);
2506 cciss_clear_drive_info(drv);
2507 }
2509 --h->num_luns;
2511 /* if it was the last disk, find the new hightest lun */
2512 if (clear_all && recalculate_highest_lun) {
2513 int newhighest = -1;
2514 for (i = 0; i <= h->highest_lun; i++) {
2515 /* if the disk has size > 0, it is available */
2516 if (h->drv[i] && h->drv[i]->heads)
2517 newhighest = i;
2518 }
2519 h->highest_lun = newhighest;
2520 }
2521 return 0;
2522 }
2524 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2525 size_t size, __u8 page_code, unsigned char *scsi3addr,
2526 int cmd_type)
2527 {
2528 u64bit buff_dma_handle;
2529 int status = IO_OK;
2531 c->cmd_type = CMD_IOCTL_PEND;
2532 c->Header.ReplyQueue = 0;
2533 if (buff != NULL) {
2534 c->Header.SGList = 1;
2535 c->Header.SGTotal = 1;
2536 } else {
2537 c->Header.SGList = 0;
2538 c->Header.SGTotal = 0;
2539 }
2540 c->Header.Tag.lower = c->busaddr;
2541 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2543 c->Request.Type.Type = cmd_type;
2544 if (cmd_type == TYPE_CMD) {
2545 switch (cmd) {
2546 case CISS_INQUIRY:
2547 /* are we trying to read a vital product page */
2548 if (page_code != 0) {
2549 c->Request.CDB[1] = 0x01;
2550 c->Request.CDB[2] = page_code;
2551 }
2552 c->Request.CDBLen = 6;
2553 c->Request.Type.Attribute = ATTR_SIMPLE;
2554 c->Request.Type.Direction = XFER_READ;
2555 c->Request.Timeout = 0;
2556 c->Request.CDB[0] = CISS_INQUIRY;
2557 c->Request.CDB[4] = size & 0xFF;
2558 break;
2559 case CISS_REPORT_LOG:
2560 case CISS_REPORT_PHYS:
2561 /* Talking to controller so It's a physical command
2562 mode = 00 target = 0. Nothing to write.
2563 */
2564 c->Request.CDBLen = 12;
2565 c->Request.Type.Attribute = ATTR_SIMPLE;
2566 c->Request.Type.Direction = XFER_READ;
2567 c->Request.Timeout = 0;
2568 c->Request.CDB[0] = cmd;
2569 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2570 c->Request.CDB[7] = (size >> 16) & 0xFF;
2571 c->Request.CDB[8] = (size >> 8) & 0xFF;
2572 c->Request.CDB[9] = size & 0xFF;
2573 break;
2575 case CCISS_READ_CAPACITY:
2576 c->Request.CDBLen = 10;
2577 c->Request.Type.Attribute = ATTR_SIMPLE;
2578 c->Request.Type.Direction = XFER_READ;
2579 c->Request.Timeout = 0;
2580 c->Request.CDB[0] = cmd;
2581 break;
2582 case CCISS_READ_CAPACITY_16:
2583 c->Request.CDBLen = 16;
2584 c->Request.Type.Attribute = ATTR_SIMPLE;
2585 c->Request.Type.Direction = XFER_READ;
2586 c->Request.Timeout = 0;
2587 c->Request.CDB[0] = cmd;
2588 c->Request.CDB[1] = 0x10;
2589 c->Request.CDB[10] = (size >> 24) & 0xFF;
2590 c->Request.CDB[11] = (size >> 16) & 0xFF;
2591 c->Request.CDB[12] = (size >> 8) & 0xFF;
2592 c->Request.CDB[13] = size & 0xFF;
2593 c->Request.Timeout = 0;
2594 c->Request.CDB[0] = cmd;
2595 break;
2596 case CCISS_CACHE_FLUSH:
2597 c->Request.CDBLen = 12;
2598 c->Request.Type.Attribute = ATTR_SIMPLE;
2599 c->Request.Type.Direction = XFER_WRITE;
2600 c->Request.Timeout = 0;
2601 c->Request.CDB[0] = BMIC_WRITE;
2602 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2603 c->Request.CDB[7] = (size >> 8) & 0xFF;
2604 c->Request.CDB[8] = size & 0xFF;
2605 break;
2606 case TEST_UNIT_READY:
2607 c->Request.CDBLen = 6;
2608 c->Request.Type.Attribute = ATTR_SIMPLE;
2609 c->Request.Type.Direction = XFER_NONE;
2610 c->Request.Timeout = 0;
2611 break;
2612 default:
2613 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2614 return IO_ERROR;
2615 }
2616 } else if (cmd_type == TYPE_MSG) {
2617 switch (cmd) {
2618 case CCISS_ABORT_MSG:
2619 c->Request.CDBLen = 12;
2620 c->Request.Type.Attribute = ATTR_SIMPLE;
2621 c->Request.Type.Direction = XFER_WRITE;
2622 c->Request.Timeout = 0;
2623 c->Request.CDB[0] = cmd; /* abort */
2624 c->Request.CDB[1] = 0; /* abort a command */
2625 /* buff contains the tag of the command to abort */
2626 memcpy(&c->Request.CDB[4], buff, 8);
2627 break;
2628 case CCISS_RESET_MSG:
2629 c->Request.CDBLen = 16;
2630 c->Request.Type.Attribute = ATTR_SIMPLE;
2631 c->Request.Type.Direction = XFER_NONE;
2632 c->Request.Timeout = 0;
2633 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2634 c->Request.CDB[0] = cmd; /* reset */
2635 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
2636 break;
2637 case CCISS_NOOP_MSG:
2638 c->Request.CDBLen = 1;
2639 c->Request.Type.Attribute = ATTR_SIMPLE;
2640 c->Request.Type.Direction = XFER_WRITE;
2641 c->Request.Timeout = 0;
2642 c->Request.CDB[0] = cmd;
2643 break;
2644 default:
2645 dev_warn(&h->pdev->dev,
2646 "unknown message type %d\n", cmd);
2647 return IO_ERROR;
2648 }
2649 } else {
2650 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2651 return IO_ERROR;
2652 }
2653 /* Fill in the scatter gather information */
2654 if (size > 0) {
2655 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2656 buff, size,
2657 PCI_DMA_BIDIRECTIONAL);
2658 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2659 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2660 c->SG[0].Len = size;
2661 c->SG[0].Ext = 0; /* we are not chaining */
2662 }
2663 return status;
2664 }
2666 static int __devinit cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2667 u8 reset_type)
2668 {
2669 CommandList_struct *c;
2670 int return_status;
2672 c = cmd_alloc(h);
2673 if (!c)
2674 return -ENOMEM;
2675 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2676 CTLR_LUNID, TYPE_MSG);
2677 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2678 if (return_status != IO_OK) {
2679 cmd_special_free(h, c);
2680 return return_status;
2681 }
2682 c->waiting = NULL;
2683 enqueue_cmd_and_start_io(h, c);
2684 /* Don't wait for completion, the reset won't complete. Don't free
2685 * the command either. This is the last command we will send before
2686 * re-initializing everything, so it doesn't matter and won't leak.
2687 */
2688 return 0;
2689 }
2691 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2692 {
2693 switch (c->err_info->ScsiStatus) {
2694 case SAM_STAT_GOOD:
2695 return IO_OK;
2696 case SAM_STAT_CHECK_CONDITION:
2697 switch (0xf & c->err_info->SenseInfo[2]) {
2698 case 0: return IO_OK; /* no sense */
2699 case 1: return IO_OK; /* recovered error */
2700 default:
2701 if (check_for_unit_attention(h, c))
2702 return IO_NEEDS_RETRY;
2703 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2704 "check condition, sense key = 0x%02x\n",
2705 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2706 }
2707 break;
2708 default:
2709 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2710 "scsi status = 0x%02x\n",
2711 c->Request.CDB[0], c->err_info->ScsiStatus);
2712 break;
2713 }
2714 return IO_ERROR;
2715 }
2717 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2718 {
2719 int return_status = IO_OK;
2721 if (c->err_info->CommandStatus == CMD_SUCCESS)
2722 return IO_OK;
2724 switch (c->err_info->CommandStatus) {
2725 case CMD_TARGET_STATUS:
2726 return_status = check_target_status(h, c);
2727 break;
2728 case CMD_DATA_UNDERRUN:
2729 case CMD_DATA_OVERRUN:
2730 /* expected for inquiry and report lun commands */
2731 break;
2732 case CMD_INVALID:
2733 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2734 "reported invalid\n", c->Request.CDB[0]);
2735 return_status = IO_ERROR;
2736 break;
2737 case CMD_PROTOCOL_ERR:
2738 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2739 "protocol error\n", c->Request.CDB[0]);
2740 return_status = IO_ERROR;
2741 break;
2742 case CMD_HARDWARE_ERR:
2743 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2744 " hardware error\n", c->Request.CDB[0]);
2745 return_status = IO_ERROR;
2746 break;
2747 case CMD_CONNECTION_LOST:
2748 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2749 "connection lost\n", c->Request.CDB[0]);
2750 return_status = IO_ERROR;
2751 break;
2752 case CMD_ABORTED:
2753 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2754 "aborted\n", c->Request.CDB[0]);
2755 return_status = IO_ERROR;
2756 break;
2757 case CMD_ABORT_FAILED:
2758 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2759 "abort failed\n", c->Request.CDB[0]);
2760 return_status = IO_ERROR;
2761 break;
2762 case CMD_UNSOLICITED_ABORT:
2763 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2764 c->Request.CDB[0]);
2765 return_status = IO_NEEDS_RETRY;
2766 break;
2767 case CMD_UNABORTABLE:
2768 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2769 return_status = IO_ERROR;
2770 break;
2771 default:
2772 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2773 "unknown status %x\n", c->Request.CDB[0],
2774 c->err_info->CommandStatus);
2775 return_status = IO_ERROR;
2776 }
2777 return return_status;
2778 }
2780 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2781 int attempt_retry)
2782 {
2783 DECLARE_COMPLETION_ONSTACK(wait);
2784 u64bit buff_dma_handle;
2785 int return_status = IO_OK;
2787 resend_cmd2:
2788 c->waiting = &wait;
2789 enqueue_cmd_and_start_io(h, c);
2791 wait_for_completion(&wait);
2793 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2794 goto command_done;
2796 return_status = process_sendcmd_error(h, c);
2798 if (return_status == IO_NEEDS_RETRY &&
2799 c->retry_count < MAX_CMD_RETRIES) {
2800 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2801 c->Request.CDB[0]);
2802 c->retry_count++;
2803 /* erase the old error information */
2804 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2805 return_status = IO_OK;
2806 INIT_COMPLETION(wait);
2807 goto resend_cmd2;
2808 }
2810 command_done:
2811 /* unlock the buffers from DMA */
2812 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2813 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2814 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2815 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2816 return return_status;
2817 }
2819 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2820 __u8 page_code, unsigned char scsi3addr[],
2821 int cmd_type)
2822 {
2823 CommandList_struct *c;
2824 int return_status;
2826 c = cmd_special_alloc(h);
2827 if (!c)
2828 return -ENOMEM;
2829 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2830 scsi3addr, cmd_type);
2831 if (return_status == IO_OK)
2832 return_status = sendcmd_withirq_core(h, c, 1);
2834 cmd_special_free(h, c);
2835 return return_status;
2836 }
2838 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2839 sector_t total_size,
2840 unsigned int block_size,
2841 InquiryData_struct *inq_buff,
2842 drive_info_struct *drv)
2843 {
2844 int return_code;
2845 unsigned long t;
2846 unsigned char scsi3addr[8];
2848 memset(inq_buff, 0, sizeof(InquiryData_struct));
2849 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2850 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2851 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2852 if (return_code == IO_OK) {
2853 if (inq_buff->data_byte[8] == 0xFF) {
2854 dev_warn(&h->pdev->dev,
2855 "reading geometry failed, volume "
2856 "does not support reading geometry\n");
2857 drv->heads = 255;
2858 drv->sectors = 32; /* Sectors per track */
2859 drv->cylinders = total_size + 1;
2860 drv->raid_level = RAID_UNKNOWN;
2861 } else {
2862 drv->heads = inq_buff->data_byte[6];
2863 drv->sectors = inq_buff->data_byte[7];
2864 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2865 drv->cylinders += inq_buff->data_byte[5];
2866 drv->raid_level = inq_buff->data_byte[8];
2867 }
2868 drv->block_size = block_size;
2869 drv->nr_blocks = total_size + 1;
2870 t = drv->heads * drv->sectors;
2871 if (t > 1) {
2872 sector_t real_size = total_size + 1;
2873 unsigned long rem = sector_div(real_size, t);
2874 if (rem)
2875 real_size++;
2876 drv->cylinders = real_size;
2877 }
2878 } else { /* Get geometry failed */
2879 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2880 }
2881 }
2883 static void
2884 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2885 unsigned int *block_size)
2886 {
2887 ReadCapdata_struct *buf;
2888 int return_code;
2889 unsigned char scsi3addr[8];
2891 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2892 if (!buf) {
2893 dev_warn(&h->pdev->dev, "out of memory\n");
2894 return;
2895 }
2897 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2898 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2899 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2900 if (return_code == IO_OK) {
2901 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2902 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2903 } else { /* read capacity command failed */
2904 dev_warn(&h->pdev->dev, "read capacity failed\n");
2905 *total_size = 0;
2906 *block_size = BLOCK_SIZE;
2907 }
2908 kfree(buf);
2909 }
2911 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2912 sector_t *total_size, unsigned int *block_size)
2913 {
2914 ReadCapdata_struct_16 *buf;
2915 int return_code;
2916 unsigned char scsi3addr[8];
2918 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2919 if (!buf) {
2920 dev_warn(&h->pdev->dev, "out of memory\n");
2921 return;
2922 }
2924 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2925 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2926 buf, sizeof(ReadCapdata_struct_16),
2927 0, scsi3addr, TYPE_CMD);
2928 if (return_code == IO_OK) {
2929 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2930 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2931 } else { /* read capacity command failed */
2932 dev_warn(&h->pdev->dev, "read capacity failed\n");
2933 *total_size = 0;
2934 *block_size = BLOCK_SIZE;
2935 }
2936 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2937 (unsigned long long)*total_size+1, *block_size);
2938 kfree(buf);
2939 }
2941 static int cciss_revalidate(struct gendisk *disk)
2942 {
2943 ctlr_info_t *h = get_host(disk);
2944 drive_info_struct *drv = get_drv(disk);
2945 int logvol;
2946 int FOUND = 0;
2947 unsigned int block_size;
2948 sector_t total_size;
2949 InquiryData_struct *inq_buff = NULL;
2951 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
2952 if (!h->drv[logvol])
2953 continue;
2954 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2955 sizeof(drv->LunID)) == 0) {
2956 FOUND = 1;
2957 break;
2958 }
2959 }
2961 if (!FOUND)
2962 return 1;
2964 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2965 if (inq_buff == NULL) {
2966 dev_warn(&h->pdev->dev, "out of memory\n");
2967 return 1;
2968 }
2969 if (h->cciss_read == CCISS_READ_10) {
2970 cciss_read_capacity(h, logvol,
2971 &total_size, &block_size);
2972 } else {
2973 cciss_read_capacity_16(h, logvol,
2974 &total_size, &block_size);
2975 }
2976 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2977 inq_buff, drv);
2979 blk_queue_logical_block_size(drv->queue, drv->block_size);
2980 set_capacity(disk, drv->nr_blocks);
2982 kfree(inq_buff);
2983 return 0;
2984 }
2986 /*
2987 * Map (physical) PCI mem into (virtual) kernel space
2988 */
2989 static void __iomem *remap_pci_mem(ulong base, ulong size)
2990 {
2991 ulong page_base = ((ulong) base) & PAGE_MASK;
2992 ulong page_offs = ((ulong) base) - page_base;
2993 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2995 return page_remapped ? (page_remapped + page_offs) : NULL;
2996 }
2998 /*
2999 * Takes jobs of the Q and sends them to the hardware, then puts it on
3000 * the Q to wait for completion.
3001 */
3002 static void start_io(ctlr_info_t *h)
3003 {
3004 CommandList_struct *c;
3006 while (!list_empty(&h->reqQ)) {
3007 c = list_entry(h->reqQ.next, CommandList_struct, list);
3008 /* can't do anything if fifo is full */
3009 if ((h->access.fifo_full(h))) {
3010 dev_warn(&h->pdev->dev, "fifo full\n");
3011 break;
3012 }
3014 /* Get the first entry from the Request Q */
3015 removeQ(c);
3016 h->Qdepth--;
3018 /* Tell the controller execute command */
3019 h->access.submit_command(h, c);
3021 /* Put job onto the completed Q */
3022 addQ(&h->cmpQ, c);
3023 }
3024 }
3026 /* Assumes that h->lock is held. */
3027 /* Zeros out the error record and then resends the command back */
3028 /* to the controller */
3029 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
3030 {
3031 /* erase the old error information */
3032 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3034 /* add it to software queue and then send it to the controller */
3035 addQ(&h->reqQ, c);
3036 h->Qdepth++;
3037 if (h->Qdepth > h->maxQsinceinit)
3038 h->maxQsinceinit = h->Qdepth;
3040 start_io(h);
3041 }
3043 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3044 unsigned int msg_byte, unsigned int host_byte,
3045 unsigned int driver_byte)
3046 {
3047 /* inverse of macros in scsi.h */
3048 return (scsi_status_byte & 0xff) |
3049 ((msg_byte & 0xff) << 8) |
3050 ((host_byte & 0xff) << 16) |
3051 ((driver_byte & 0xff) << 24);
3052 }
3054 static inline int evaluate_target_status(ctlr_info_t *h,
3055 CommandList_struct *cmd, int *retry_cmd)
3056 {
3057 unsigned char sense_key;
3058 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3059 int error_value;
3061 *retry_cmd = 0;
3062 /* If we get in here, it means we got "target status", that is, scsi status */
3063 status_byte = cmd->err_info->ScsiStatus;
3064 driver_byte = DRIVER_OK;
3065 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3067 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
3068 host_byte = DID_PASSTHROUGH;
3069 else
3070 host_byte = DID_OK;
3072 error_value = make_status_bytes(status_byte, msg_byte,
3073 host_byte, driver_byte);
3075 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3076 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3077 dev_warn(&h->pdev->dev, "cmd %p "
3078 "has SCSI Status 0x%x\n",
3079 cmd, cmd->err_info->ScsiStatus);
3080 return error_value;
3081 }
3083 /* check the sense key */
3084 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3085 /* no status or recovered error */
3086 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3087 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3088 error_value = 0;
3090 if (check_for_unit_attention(h, cmd)) {
3091 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3092 return 0;
3093 }
3095 /* Not SG_IO or similar? */
3096 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3097 if (error_value != 0)
3098 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3099 " sense key = 0x%x\n", cmd, sense_key);
3100 return error_value;
3101 }
3103 /* SG_IO or similar, copy sense data back */
3104 if (cmd->rq->sense) {
3105 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3106 cmd->rq->sense_len = cmd->err_info->SenseLen;
3107 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3108 cmd->rq->sense_len);
3109 } else
3110 cmd->rq->sense_len = 0;
3112 return error_value;
3113 }
3115 /* checks the status of the job and calls complete buffers to mark all
3116 * buffers for the completed job. Note that this function does not need
3117 * to hold the hba/queue lock.
3118 */
3119 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3120 int timeout)
3121 {
3122 int retry_cmd = 0;
3123 struct request *rq = cmd->rq;
3125 rq->errors = 0;
3127 if (timeout)
3128 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3130 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3131 goto after_error_processing;
3133 switch (cmd->err_info->CommandStatus) {
3134 case CMD_TARGET_STATUS:
3135 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3136 break;
3137 case CMD_DATA_UNDERRUN:
3138 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3139 dev_warn(&h->pdev->dev, "cmd %p has"
3140 " completed with data underrun "
3141 "reported\n", cmd);
3142 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3143 }
3144 break;
3145 case CMD_DATA_OVERRUN:
3146 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3147 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3148 " completed with data overrun "
3149 "reported\n", cmd);
3150 break;
3151 case CMD_INVALID:
3152 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3153 "reported invalid\n", cmd);
3154 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3155 cmd->err_info->CommandStatus, DRIVER_OK,
3156 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3157 DID_PASSTHROUGH : DID_ERROR);
3158 break;
3159 case CMD_PROTOCOL_ERR:
3160 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3161 "protocol error\n", cmd);
3162 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3163 cmd->err_info->CommandStatus, DRIVER_OK,
3164 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3165 DID_PASSTHROUGH : DID_ERROR);
3166 break;
3167 case CMD_HARDWARE_ERR:
3168 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3169 " hardware error\n", cmd);
3170 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3171 cmd->err_info->CommandStatus, DRIVER_OK,
3172 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3173 DID_PASSTHROUGH : DID_ERROR);
3174 break;
3175 case CMD_CONNECTION_LOST:
3176 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3177 "connection lost\n", cmd);
3178 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3179 cmd->err_info->CommandStatus, DRIVER_OK,
3180 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3181 DID_PASSTHROUGH : DID_ERROR);
3182 break;
3183 case CMD_ABORTED:
3184 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3185 "aborted\n", cmd);
3186 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3187 cmd->err_info->CommandStatus, DRIVER_OK,
3188 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3189 DID_PASSTHROUGH : DID_ABORT);
3190 break;
3191 case CMD_ABORT_FAILED:
3192 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3193 "abort failed\n", cmd);
3194 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3195 cmd->err_info->CommandStatus, DRIVER_OK,
3196 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3197 DID_PASSTHROUGH : DID_ERROR);
3198 break;
3199 case CMD_UNSOLICITED_ABORT:
3200 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3201 "abort %p\n", h->ctlr, cmd);
3202 if (cmd->retry_count < MAX_CMD_RETRIES) {
3203 retry_cmd = 1;
3204 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3205 cmd->retry_count++;
3206 } else
3207 dev_warn(&h->pdev->dev,
3208 "%p retried too many times\n", cmd);
3209 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3210 cmd->err_info->CommandStatus, DRIVER_OK,
3211 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3212 DID_PASSTHROUGH : DID_ABORT);
3213 break;
3214 case CMD_TIMEOUT:
3215 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3216 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3217 cmd->err_info->CommandStatus, DRIVER_OK,
3218 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3219 DID_PASSTHROUGH : DID_ERROR);
3220 break;
3221 case CMD_UNABORTABLE:
3222 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3223 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3224 cmd->err_info->CommandStatus, DRIVER_OK,
3225 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3226 DID_PASSTHROUGH : DID_ERROR);
3227 break;
3228 default:
3229 dev_warn(&h->pdev->dev, "cmd %p returned "
3230 "unknown status %x\n", cmd,
3231 cmd->err_info->CommandStatus);
3232 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3233 cmd->err_info->CommandStatus, DRIVER_OK,
3234 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3235 DID_PASSTHROUGH : DID_ERROR);
3236 }
3238 after_error_processing:
3240 /* We need to return this command */
3241 if (retry_cmd) {
3242 resend_cciss_cmd(h, cmd);
3243 return;
3244 }
3245 cmd->rq->completion_data = cmd;
3246 blk_complete_request(cmd->rq);
3247 }
3249 static inline u32 cciss_tag_contains_index(u32 tag)
3250 {
3251 #define DIRECT_LOOKUP_BIT 0x10
3252 return tag & DIRECT_LOOKUP_BIT;
3253 }
3255 static inline u32 cciss_tag_to_index(u32 tag)
3256 {
3257 #define DIRECT_LOOKUP_SHIFT 5
3258 return tag >> DIRECT_LOOKUP_SHIFT;
3259 }
3261 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3262 {
3263 #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3264 #define CCISS_SIMPLE_ERROR_BITS 0x03
3265 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3266 return tag & ~CCISS_PERF_ERROR_BITS;
3267 return tag & ~CCISS_SIMPLE_ERROR_BITS;
3268 }
3270 static inline void cciss_mark_tag_indexed(u32 *tag)
3271 {
3272 *tag |= DIRECT_LOOKUP_BIT;
3273 }
3275 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3276 {
3277 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3278 }
3280 /*
3281 * Get a request and submit it to the controller.
3282 */
3283 static void do_cciss_request(struct request_queue *q)
3284 {
3285 ctlr_info_t *h = q->queuedata;
3286 CommandList_struct *c;
3287 sector_t start_blk;
3288 int seg;
3289 struct request *creq;
3290 u64bit temp64;
3291 struct scatterlist *tmp_sg;
3292 SGDescriptor_struct *curr_sg;
3293 drive_info_struct *drv;
3294 int i, dir;
3295 int sg_index = 0;
3296 int chained = 0;
3298 queue:
3299 creq = blk_peek_request(q);
3300 if (!creq)
3301 goto startio;
3303 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3305 c = cmd_alloc(h);
3306 if (!c)
3307 goto full;
3309 blk_start_request(creq);
3311 tmp_sg = h->scatter_list[c->cmdindex];
3312 spin_unlock_irq(q->queue_lock);
3314 c->cmd_type = CMD_RWREQ;
3315 c->rq = creq;
3317 /* fill in the request */
3318 drv = creq->rq_disk->private_data;
3319 c->Header.ReplyQueue = 0; /* unused in simple mode */
3320 /* got command from pool, so use the command block index instead */
3321 /* for direct lookups. */
3322 /* The first 2 bits are reserved for controller error reporting. */
3323 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3324 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3325 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3326 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3327 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3328 c->Request.Type.Attribute = ATTR_SIMPLE;
3329 c->Request.Type.Direction =
3330 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3331 c->Request.Timeout = 0; /* Don't time out */
3332 c->Request.CDB[0] =
3333 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3334 start_blk = blk_rq_pos(creq);
3335 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3336 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3337 sg_init_table(tmp_sg, h->maxsgentries);
3338 seg = blk_rq_map_sg(q, creq, tmp_sg);
3340 /* get the DMA records for the setup */
3341 if (c->Request.Type.Direction == XFER_READ)
3342 dir = PCI_DMA_FROMDEVICE;
3343 else
3344 dir = PCI_DMA_TODEVICE;
3346 curr_sg = c->SG;
3347 sg_index = 0;
3348 chained = 0;
3350 for (i = 0; i < seg; i++) {
3351 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3352 !chained && ((seg - i) > 1)) {
3353 /* Point to next chain block. */
3354 curr_sg = h->cmd_sg_list[c->cmdindex];
3355 sg_index = 0;
3356 chained = 1;
3357 }
3358 curr_sg[sg_index].Len = tmp_sg[i].length;
3359 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3360 tmp_sg[i].offset,
3361 tmp_sg[i].length, dir);
3362 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3363 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3364 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3365 ++sg_index;
3366 }
3367 if (chained)
3368 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3369 (seg - (h->max_cmd_sgentries - 1)) *
3370 sizeof(SGDescriptor_struct));
3372 /* track how many SG entries we are using */
3373 if (seg > h->maxSG)
3374 h->maxSG = seg;
3376 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3377 "chained[%d]\n",
3378 blk_rq_sectors(creq), seg, chained);
3380 c->Header.SGTotal = seg + chained;
3381 if (seg <= h->max_cmd_sgentries)
3382 c->Header.SGList = c->Header.SGTotal;
3383 else
3384 c->Header.SGList = h->max_cmd_sgentries;
3385 set_performant_mode(h, c);
3387 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3388 if(h->cciss_read == CCISS_READ_10) {
3389 c->Request.CDB[1] = 0;
3390 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3391 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3392 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3393 c->Request.CDB[5] = start_blk & 0xff;
3394 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3395 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3396 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3397 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3398 } else {
3399 u32 upper32 = upper_32_bits(start_blk);
3401 c->Request.CDBLen = 16;
3402 c->Request.CDB[1]= 0;
3403 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3404 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3405 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3406 c->Request.CDB[5]= upper32 & 0xff;
3407 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3408 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3409 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3410 c->Request.CDB[9]= start_blk & 0xff;
3411 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3412 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3413 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3414 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3415 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3416 }
3417 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3418 c->Request.CDBLen = creq->cmd_len;
3419 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3420 } else {
3421 dev_warn(&h->pdev->dev, "bad request type %d\n",
3422 creq->cmd_type);
3423 BUG();
3424 }
3426 spin_lock_irq(q->queue_lock);
3428 addQ(&h->reqQ, c);
3429 h->Qdepth++;
3430 if (h->Qdepth > h->maxQsinceinit)
3431 h->maxQsinceinit = h->Qdepth;
3433 goto queue;
3434 full:
3435 blk_stop_queue(q);
3436 startio:
3437 /* We will already have the driver lock here so not need
3438 * to lock it.
3439 */
3440 start_io(h);
3441 }
3443 static inline unsigned long get_next_completion(ctlr_info_t *h)
3444 {
3445 return h->access.command_completed(h);
3446 }
3448 static inline int interrupt_pending(ctlr_info_t *h)
3449 {
3450 return h->access.intr_pending(h);
3451 }
3453 static inline long interrupt_not_for_us(ctlr_info_t *h)
3454 {
3455 return ((h->access.intr_pending(h) == 0) ||
3456 (h->interrupts_enabled == 0));
3457 }
3459 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3460 u32 raw_tag)
3461 {
3462 if (unlikely(tag_index >= h->nr_cmds)) {
3463 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3464 return 1;
3465 }
3466 return 0;
3467 }
3469 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3470 u32 raw_tag)
3471 {
3472 removeQ(c);
3473 if (likely(c->cmd_type == CMD_RWREQ))
3474 complete_command(h, c, 0);
3475 else if (c->cmd_type == CMD_IOCTL_PEND)
3476 complete(c->waiting);
3477 #ifdef CONFIG_CISS_SCSI_TAPE
3478 else if (c->cmd_type == CMD_SCSI)
3479 complete_scsi_command(c, 0, raw_tag);
3480 #endif
3481 }
3483 static inline u32 next_command(ctlr_info_t *h)
3484 {
3485 u32 a;
3487 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3488 return h->access.command_completed(h);
3490 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3491 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3492 (h->reply_pool_head)++;
3493 h->commands_outstanding--;
3494 } else {
3495 a = FIFO_EMPTY;
3496 }
3497 /* Check for wraparound */
3498 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3499 h->reply_pool_head = h->reply_pool;
3500 h->reply_pool_wraparound ^= 1;
3501 }
3502 return a;
3503 }
3505 /* process completion of an indexed ("direct lookup") command */
3506 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3507 {
3508 u32 tag_index;
3509 CommandList_struct *c;
3511 tag_index = cciss_tag_to_index(raw_tag);
3512 if (bad_tag(h, tag_index, raw_tag))
3513 return next_command(h);
3514 c = h->cmd_pool + tag_index;
3515 finish_cmd(h, c, raw_tag);
3516 return next_command(h);
3517 }
3519 /* process completion of a non-indexed command */
3520 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3521 {
3522 CommandList_struct *c = NULL;
3523 __u32 busaddr_masked, tag_masked;
3525 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3526 list_for_each_entry(c, &h->cmpQ, list) {
3527 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3528 if (busaddr_masked == tag_masked) {
3529 finish_cmd(h, c, raw_tag);
3530 return next_command(h);
3531 }
3532 }
3533 bad_tag(h, h->nr_cmds + 1, raw_tag);
3534 return next_command(h);
3535 }
3537 /* Some controllers, like p400, will give us one interrupt
3538 * after a soft reset, even if we turned interrupts off.
3539 * Only need to check for this in the cciss_xxx_discard_completions
3540 * functions.
3541 */
3542 static int ignore_bogus_interrupt(ctlr_info_t *h)
3543 {
3544 if (likely(!reset_devices))
3545 return 0;
3547 if (likely(h->interrupts_enabled))
3548 return 0;
3550 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3551 "(known firmware bug.) Ignoring.\n");
3553 return 1;
3554 }
3556 static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3557 {
3558 ctlr_info_t *h = dev_id;
3559 unsigned long flags;
3560 u32 raw_tag;
3562 if (ignore_bogus_interrupt(h))
3563 return IRQ_NONE;
3565 if (interrupt_not_for_us(h))
3566 return IRQ_NONE;
3567 spin_lock_irqsave(&h->lock, flags);
3568 while (interrupt_pending(h)) {
3569 raw_tag = get_next_completion(h);
3570 while (raw_tag != FIFO_EMPTY)
3571 raw_tag = next_command(h);
3572 }
3573 spin_unlock_irqrestore(&h->lock, flags);
3574 return IRQ_HANDLED;
3575 }
3577 static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3578 {
3579 ctlr_info_t *h = dev_id;
3580 unsigned long flags;
3581 u32 raw_tag;
3583 if (ignore_bogus_interrupt(h))
3584 return IRQ_NONE;
3586 spin_lock_irqsave(&h->lock, flags);
3587 raw_tag = get_next_completion(h);
3588 while (raw_tag != FIFO_EMPTY)
3589 raw_tag = next_command(h);
3590 spin_unlock_irqrestore(&h->lock, flags);
3591 return IRQ_HANDLED;
3592 }
3594 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3595 {
3596 ctlr_info_t *h = dev_id;
3597 unsigned long flags;
3598 u32 raw_tag;
3600 if (interrupt_not_for_us(h))
3601 return IRQ_NONE;
3602 spin_lock_irqsave(&h->lock, flags);
3603 while (interrupt_pending(h)) {
3604 raw_tag = get_next_completion(h);
3605 while (raw_tag != FIFO_EMPTY) {
3606 if (cciss_tag_contains_index(raw_tag))
3607 raw_tag = process_indexed_cmd(h, raw_tag);
3608 else
3609 raw_tag = process_nonindexed_cmd(h, raw_tag);
3610 }
3611 }
3612 spin_unlock_irqrestore(&h->lock, flags);
3613 return IRQ_HANDLED;
3614 }
3616 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3617 * check the interrupt pending register because it is not set.
3618 */
3619 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3620 {
3621 ctlr_info_t *h = dev_id;
3622 unsigned long flags;
3623 u32 raw_tag;
3625 spin_lock_irqsave(&h->lock, flags);
3626 raw_tag = get_next_completion(h);
3627 while (raw_tag != FIFO_EMPTY) {
3628 if (cciss_tag_contains_index(raw_tag))
3629 raw_tag = process_indexed_cmd(h, raw_tag);
3630 else
3631 raw_tag = process_nonindexed_cmd(h, raw_tag);
3632 }
3633 spin_unlock_irqrestore(&h->lock, flags);
3634 return IRQ_HANDLED;
3635 }
3637 /**
3638 * add_to_scan_list() - add controller to rescan queue
3639 * @h: Pointer to the controller.
3640 *
3641 * Adds the controller to the rescan queue if not already on the queue.
3642 *
3643 * returns 1 if added to the queue, 0 if skipped (could be on the
3644 * queue already, or the controller could be initializing or shutting
3645 * down).
3646 **/
3647 static int add_to_scan_list(struct ctlr_info *h)
3648 {
3649 struct ctlr_info *test_h;
3650 int found = 0;
3651 int ret = 0;
3653 if (h->busy_initializing)
3654 return 0;
3656 if (!mutex_trylock(&h->busy_shutting_down))
3657 return 0;
3659 mutex_lock(&scan_mutex);
3660 list_for_each_entry(test_h, &scan_q, scan_list) {
3661 if (test_h == h) {
3662 found = 1;
3663 break;
3664 }
3665 }
3666 if (!found && !h->busy_scanning) {
3667 INIT_COMPLETION(h->scan_wait);
3668 list_add_tail(&h->scan_list, &scan_q);
3669 ret = 1;
3670 }
3671 mutex_unlock(&scan_mutex);
3672 mutex_unlock(&h->busy_shutting_down);
3674 return ret;
3675 }
3677 /**
3678 * remove_from_scan_list() - remove controller from rescan queue
3679 * @h: Pointer to the controller.
3680 *
3681 * Removes the controller from the rescan queue if present. Blocks if
3682 * the controller is currently conducting a rescan. The controller
3683 * can be in one of three states:
3684 * 1. Doesn't need a scan
3685 * 2. On the scan list, but not scanning yet (we remove it)
3686 * 3. Busy scanning (and not on the list). In this case we want to wait for
3687 * the scan to complete to make sure the scanning thread for this
3688 * controller is completely idle.
3689 **/
3690 static void remove_from_scan_list(struct ctlr_info *h)
3691 {
3692 struct ctlr_info *test_h, *tmp_h;
3694 mutex_lock(&scan_mutex);
3695 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3696 if (test_h == h) { /* state 2. */
3697 list_del(&h->scan_list);
3698 complete_all(&h->scan_wait);
3699 mutex_unlock(&scan_mutex);
3700 return;
3701 }
3702 }
3703 if (h->busy_scanning) { /* state 3. */
3704 mutex_unlock(&scan_mutex);
3705 wait_for_completion(&h->scan_wait);
3706 } else { /* state 1, nothing to do. */
3707 mutex_unlock(&scan_mutex);
3708 }
3709 }
3711 /**
3712 * scan_thread() - kernel thread used to rescan controllers
3713 * @data: Ignored.
3714 *
3715 * A kernel thread used scan for drive topology changes on
3716 * controllers. The thread processes only one controller at a time
3717 * using a queue. Controllers are added to the queue using
3718 * add_to_scan_list() and removed from the queue either after done
3719 * processing or using remove_from_scan_list().
3720 *
3721 * returns 0.
3722 **/
3723 static int scan_thread(void *data)
3724 {
3725 struct ctlr_info *h;
3727 while (1) {
3728 set_current_state(TASK_INTERRUPTIBLE);
3729 schedule();
3730 if (kthread_should_stop())
3731 break;
3733 while (1) {
3734 mutex_lock(&scan_mutex);
3735 if (list_empty(&scan_q)) {
3736 mutex_unlock(&scan_mutex);
3737 break;
3738 }
3740 h = list_entry(scan_q.next,
3741 struct ctlr_info,
3742 scan_list);
3743 list_del(&h->scan_list);
3744 h->busy_scanning = 1;
3745 mutex_unlock(&scan_mutex);
3747 rebuild_lun_table(h, 0, 0);
3748 complete_all(&h->scan_wait);
3749 mutex_lock(&scan_mutex);
3750 h->busy_scanning = 0;
3751 mutex_unlock(&scan_mutex);
3752 }
3753 }
3755 return 0;
3756 }
3758 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3759 {
3760 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3761 return 0;
3763 switch (c->err_info->SenseInfo[12]) {
3764 case STATE_CHANGED:
3765 dev_warn(&h->pdev->dev, "a state change "
3766 "detected, command retried\n");
3767 return 1;
3768 break;
3769 case LUN_FAILED:
3770 dev_warn(&h->pdev->dev, "LUN failure "
3771 "detected, action required\n");
3772 return 1;
3773 break;
3774 case REPORT_LUNS_CHANGED:
3775 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3776 /*
3777 * Here, we could call add_to_scan_list and wake up the scan thread,
3778 * except that it's quite likely that we will get more than one
3779 * REPORT_LUNS_CHANGED condition in quick succession, which means
3780 * that those which occur after the first one will likely happen
3781 * *during* the scan_thread's rescan. And the rescan code is not
3782 * robust enough to restart in the middle, undoing what it has already
3783 * done, and it's not clear that it's even possible to do this, since
3784 * part of what it does is notify the block layer, which starts
3785 * doing it's own i/o to read partition tables and so on, and the
3786 * driver doesn't have visibility to know what might need undoing.
3787 * In any event, if possible, it is horribly complicated to get right
3788 * so we just don't do it for now.
3789 *
3790 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3791 */
3792 return 1;
3793 break;
3794 case POWER_OR_RESET:
3795 dev_warn(&h->pdev->dev,
3796 "a power on or device reset detected\n");
3797 return 1;
3798 break;
3799 case UNIT_ATTENTION_CLEARED:
3800 dev_warn(&h->pdev->dev,
3801 "unit attention cleared by another initiator\n");
3802 return 1;
3803 break;
3804 default:
3805 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3806 return 1;
3807 }
3808 }
3810 /*
3811 * We cannot read the structure directly, for portability we must use
3812 * the io functions.
3813 * This is for debug only.
3814 */
3815 static void print_cfg_table(ctlr_info_t *h)
3816 {
3817 int i;
3818 char temp_name[17];
3819 CfgTable_struct *tb = h->cfgtable;
3821 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3822 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3823 for (i = 0; i < 4; i++)
3824 temp_name[i] = readb(&(tb->Signature[i]));
3825 temp_name[4] = '\0';
3826 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3827 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3828 readl(&(tb->SpecValence)));
3829 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3830 readl(&(tb->TransportSupport)));
3831 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3832 readl(&(tb->TransportActive)));
3833 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3834 readl(&(tb->HostWrite.TransportRequest)));
3835 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3836 readl(&(tb->HostWrite.CoalIntDelay)));
3837 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3838 readl(&(tb->HostWrite.CoalIntCount)));
3839 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3840 readl(&(tb->CmdsOutMax)));
3841 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3842 readl(&(tb->BusTypes)));
3843 for (i = 0; i < 16; i++)
3844 temp_name[i] = readb(&(tb->ServerName[i]));
3845 temp_name[16] = '\0';
3846 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3847 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3848 readl(&(tb->HeartBeat)));
3849 }
3851 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3852 {
3853 int i, offset, mem_type, bar_type;
3854 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3855 return 0;
3856 offset = 0;
3857 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3858 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3859 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3860 offset += 4;
3861 else {
3862 mem_type = pci_resource_flags(pdev, i) &
3863 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3864 switch (mem_type) {
3865 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3866 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3867 offset += 4; /* 32 bit */
3868 break;
3869 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3870 offset += 8;
3871 break;
3872 default: /* reserved in PCI 2.2 */
3873 dev_warn(&pdev->dev,
3874 "Base address is invalid\n");
3875 return -1;
3876 break;
3877 }
3878 }
3879 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3880 return i + 1;
3881 }
3882 return -1;
3883 }
3885 /* Fill in bucket_map[], given nsgs (the max number of
3886 * scatter gather elements supported) and bucket[],
3887 * which is an array of 8 integers. The bucket[] array
3888 * contains 8 different DMA transfer sizes (in 16
3889 * byte increments) which the controller uses to fetch
3890 * commands. This function fills in bucket_map[], which
3891 * maps a given number of scatter gather elements to one of
3892 * the 8 DMA transfer sizes. The point of it is to allow the
3893 * controller to only do as much DMA as needed to fetch the
3894 * command, with the DMA transfer size encoded in the lower
3895 * bits of the command address.
3896 */
3897 static void calc_bucket_map(int bucket[], int num_buckets,
3898 int nsgs, int *bucket_map)
3899 {
3900 int i, j, b, size;
3902 /* even a command with 0 SGs requires 4 blocks */
3903 #define MINIMUM_TRANSFER_BLOCKS 4
3904 #define NUM_BUCKETS 8
3905 /* Note, bucket_map must have nsgs+1 entries. */
3906 for (i = 0; i <= nsgs; i++) {
3907 /* Compute size of a command with i SG entries */
3908 size = i + MINIMUM_TRANSFER_BLOCKS;
3909 b = num_buckets; /* Assume the biggest bucket */
3910 /* Find the bucket that is just big enough */
3911 for (j = 0; j < 8; j++) {
3912 if (bucket[j] >= size) {
3913 b = j;
3914 break;
3915 }
3916 }
3917 /* for a command with i SG entries, use bucket b. */
3918 bucket_map[i] = b;
3919 }
3920 }
3922 static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3923 {
3924 int i;
3926 /* under certain very rare conditions, this can take awhile.
3927 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3928 * as we enter this code.) */
3929 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3930 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3931 break;
3932 usleep_range(10000, 20000);
3933 }
3934 }
3936 static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
3937 u32 use_short_tags)
3938 {
3939 /* This is a bit complicated. There are 8 registers on
3940 * the controller which we write to to tell it 8 different
3941 * sizes of commands which there may be. It's a way of
3942 * reducing the DMA done to fetch each command. Encoded into
3943 * each command's tag are 3 bits which communicate to the controller
3944 * which of the eight sizes that command fits within. The size of
3945 * each command depends on how many scatter gather entries there are.
3946 * Each SG entry requires 16 bytes. The eight registers are programmed
3947 * with the number of 16-byte blocks a command of that size requires.
3948 * The smallest command possible requires 5 such 16 byte blocks.
3949 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3950 * blocks. Note, this only extends to the SG entries contained
3951 * within the command block, and does not extend to chained blocks
3952 * of SG elements. bft[] contains the eight values we write to
3953 * the registers. They are not evenly distributed, but have more
3954 * sizes for small commands, and fewer sizes for larger commands.
3955 */
3956 __u32 trans_offset;
3957 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3958 /*
3959 * 5 = 1 s/g entry or 4k
3960 * 6 = 2 s/g entry or 8k
3961 * 8 = 4 s/g entry or 16k
3962 * 10 = 6 s/g entry or 24k
3963 */
3964 unsigned long register_value;
3965 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3967 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3969 /* Controller spec: zero out this buffer. */
3970 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3971 h->reply_pool_head = h->reply_pool;
3973 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3974 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3975 h->blockFetchTable);
3976 writel(bft[0], &h->transtable->BlockFetch0);
3977 writel(bft[1], &h->transtable->BlockFetch1);
3978 writel(bft[2], &h->transtable->BlockFetch2);
3979 writel(bft[3], &h->transtable->BlockFetch3);
3980 writel(bft[4], &h->transtable->BlockFetch4);
3981 writel(bft[5], &h->transtable->BlockFetch5);
3982 writel(bft[6], &h->transtable->BlockFetch6);
3983 writel(bft[7], &h->transtable->BlockFetch7);
3985 /* size of controller ring buffer */
3986 writel(h->max_commands, &h->transtable->RepQSize);
3987 writel(1, &h->transtable->RepQCount);
3988 writel(0, &h->transtable->RepQCtrAddrLow32);
3989 writel(0, &h->transtable->RepQCtrAddrHigh32);
3990 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3991 writel(0, &h->transtable->RepQAddr0High32);
3992 writel(CFGTBL_Trans_Performant | use_short_tags,
3993 &(h->cfgtable->HostWrite.TransportRequest));
3995 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3996 cciss_wait_for_mode_change_ack(h);
3997 register_value = readl(&(h->cfgtable->TransportActive));
3998 if (!(register_value & CFGTBL_Trans_Performant))
3999 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
4000 " performant mode\n");
4001 }
4003 static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
4004 {
4005 __u32 trans_support;
4007 if (cciss_simple_mode)
4008 return;
4010 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4011 /* Attempt to put controller into performant mode if supported */
4012 /* Does board support performant mode? */
4013 trans_support = readl(&(h->cfgtable->TransportSupport));
4014 if (!(trans_support & PERFORMANT_MODE))
4015 return;
4017 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
4018 /* Performant mode demands commands on a 32 byte boundary
4019 * pci_alloc_consistent aligns on page boundarys already.
4020 * Just need to check if divisible by 32
4021 */
4022 if ((sizeof(CommandList_struct) % 32) != 0) {
4023 dev_warn(&h->pdev->dev, "%s %d %s\n",
4024 "cciss info: command size[",
4025 (int)sizeof(CommandList_struct),
4026 "] not divisible by 32, no performant mode..\n");
4027 return;
4028 }
4030 /* Performant mode ring buffer and supporting data structures */
4031 h->reply_pool = (__u64 *)pci_alloc_consistent(
4032 h->pdev, h->max_commands * sizeof(__u64),
4033 &(h->reply_pool_dhandle));
4035 /* Need a block fetch table for performant mode */
4036 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4037 sizeof(__u32)), GFP_KERNEL);
4039 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4040 goto clean_up;
4042 cciss_enter_performant_mode(h,
4043 trans_support & CFGTBL_Trans_use_short_tags);
4045 /* Change the access methods to the performant access methods */
4046 h->access = SA5_performant_access;
4047 h->transMethod = CFGTBL_Trans_Performant;
4049 return;
4050 clean_up:
4051 kfree(h->blockFetchTable);
4052 if (h->reply_pool)
4053 pci_free_consistent(h->pdev,
4054 h->max_commands * sizeof(__u64),
4055 h->reply_pool,
4056 h->reply_pool_dhandle);
4057 return;
4059 } /* cciss_put_controller_into_performant_mode */
4061 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4062 * controllers that are capable. If not, we use IO-APIC mode.
4063 */
4065 static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
4066 {
4067 #ifdef CONFIG_PCI_MSI
4068 int err;
4069 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4070 {0, 2}, {0, 3}
4071 };
4073 /* Some boards advertise MSI but don't really support it */
4074 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4075 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4076 goto default_int_mode;
4078 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4079 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
4080 if (!err) {
4081 h->intr[0] = cciss_msix_entries[0].vector;
4082 h->intr[1] = cciss_msix_entries[1].vector;
4083 h->intr[2] = cciss_msix_entries[2].vector;
4084 h->intr[3] = cciss_msix_entries[3].vector;
4085 h->msix_vector = 1;
4086 return;
4087 }
4088 if (err > 0) {
4089 dev_warn(&h->pdev->dev,
4090 "only %d MSI-X vectors available\n", err);
4091 goto default_int_mode;
4092 } else {
4093 dev_warn(&h->pdev->dev,
4094 "MSI-X init failed %d\n", err);
4095 goto default_int_mode;
4096 }
4097 }
4098 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4099 if (!pci_enable_msi(h->pdev))
4100 h->msi_vector = 1;
4101 else
4102 dev_warn(&h->pdev->dev, "MSI init failed\n");
4103 }
4104 default_int_mode:
4105 #endif /* CONFIG_PCI_MSI */
4106 /* if we get here we're going to use the default interrupt mode */
4107 h->intr[h->intr_mode] = h->pdev->irq;
4108 return;
4109 }
4111 static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4112 {
4113 int i;
4114 u32 subsystem_vendor_id, subsystem_device_id;
4116 subsystem_vendor_id = pdev->subsystem_vendor;
4117 subsystem_device_id = pdev->subsystem_device;
4118 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4119 subsystem_vendor_id;
4121 for (i = 0; i < ARRAY_SIZE(products); i++)
4122 if (*board_id == products[i].board_id)
4123 return i;
4124 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4125 *board_id);
4126 return -ENODEV;
4127 }
4129 static inline bool cciss_board_disabled(ctlr_info_t *h)
4130 {
4131 u16 command;
4133 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4134 return ((command & PCI_COMMAND_MEMORY) == 0);
4135 }
4137 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4138 unsigned long *memory_bar)
4139 {
4140 int i;
4142 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4143 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4144 /* addressing mode bits already removed */
4145 *memory_bar = pci_resource_start(pdev, i);
4146 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4147 *memory_bar);
4148 return 0;
4149 }
4150 dev_warn(&pdev->dev, "no memory BAR found\n");
4151 return -ENODEV;
4152 }
4154 static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
4155 void __iomem *vaddr, int wait_for_ready)
4156 #define BOARD_READY 1
4157 #define BOARD_NOT_READY 0
4158 {
4159 int i, iterations;
4160 u32 scratchpad;
4162 if (wait_for_ready)
4163 iterations = CCISS_BOARD_READY_ITERATIONS;
4164 else
4165 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4167 for (i = 0; i < iterations; i++) {
4168 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4169 if (wait_for_ready) {
4170 if (scratchpad == CCISS_FIRMWARE_READY)
4171 return 0;
4172 } else {
4173 if (scratchpad != CCISS_FIRMWARE_READY)
4174 return 0;
4175 }
4176 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4177 }
4178 dev_warn(&pdev->dev, "board not ready, timed out.\n");
4179 return -ENODEV;
4180 }
4182 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4183 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4184 u64 *cfg_offset)
4185 {
4186 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4187 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4188 *cfg_base_addr &= (u32) 0x0000ffff;
4189 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4190 if (*cfg_base_addr_index == -1) {
4191 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4192 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4193 return -ENODEV;
4194 }
4195 return 0;
4196 }
4198 static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4199 {
4200 u64 cfg_offset;
4201 u32 cfg_base_addr;
4202 u64 cfg_base_addr_index;
4203 u32 trans_offset;
4204 int rc;
4206 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4207 &cfg_base_addr_index, &cfg_offset);
4208 if (rc)
4209 return rc;
4210 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4211 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4212 if (!h->cfgtable)
4213 return -ENOMEM;
4214 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4215 if (rc)
4216 return rc;
4217 /* Find performant mode table. */
4218 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4219 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4220 cfg_base_addr_index)+cfg_offset+trans_offset,
4221 sizeof(*h->transtable));
4222 if (!h->transtable)
4223 return -ENOMEM;
4224 return 0;
4225 }
4227 static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4228 {
4229 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4231 /* Limit commands in memory limited kdump scenario. */
4232 if (reset_devices && h->max_commands > 32)
4233 h->max_commands = 32;
4235 if (h->max_commands < 16) {
4236 dev_warn(&h->pdev->dev, "Controller reports "
4237 "max supported commands of %d, an obvious lie. "
4238 "Using 16. Ensure that firmware is up to date.\n",
4239 h->max_commands);
4240 h->max_commands = 16;
4241 }
4242 }
4244 /* Interrogate the hardware for some limits:
4245 * max commands, max SG elements without chaining, and with chaining,
4246 * SG chain block size, etc.
4247 */
4248 static void __devinit cciss_find_board_params(ctlr_info_t *h)
4249 {
4250 cciss_get_max_perf_mode_cmds(h);
4251 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
4252 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4253 /*
4254 * Limit in-command s/g elements to 32 save dma'able memory.
4255 * Howvever spec says if 0, use 31
4256 */
4257 h->max_cmd_sgentries = 31;
4258 if (h->maxsgentries > 512) {
4259 h->max_cmd_sgentries = 32;
4260 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4261 h->maxsgentries--; /* save one for chain pointer */
4262 } else {
4263 h->maxsgentries = 31; /* default to traditional values */
4264 h->chainsize = 0;
4265 }
4266 }
4268 static inline bool CISS_signature_present(ctlr_info_t *h)
4269 {
4270 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4271 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4272 return false;
4273 }
4274 return true;
4275 }
4277 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4278 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4279 {
4280 #ifdef CONFIG_X86
4281 u32 prefetch;
4283 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4284 prefetch |= 0x100;
4285 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4286 #endif
4287 }
4289 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4290 * in a prefetch beyond physical memory.
4291 */
4292 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4293 {
4294 u32 dma_prefetch;
4295 __u32 dma_refetch;
4297 if (h->board_id != 0x3225103C)
4298 return;
4299 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4300 dma_prefetch |= 0x8000;
4301 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4302 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4303 dma_refetch |= 0x1;
4304 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4305 }
4307 static int __devinit cciss_pci_init(ctlr_info_t *h)
4308 {
4309 int prod_index, err;
4311 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4312 if (prod_index < 0)
4313 return -ENODEV;
4314 h->product_name = products[prod_index].product_name;
4315 h->access = *(products[prod_index].access);
4317 if (cciss_board_disabled(h)) {
4318 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4319 return -ENODEV;
4320 }
4322 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4323 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4325 err = pci_enable_device(h->pdev);
4326 if (err) {
4327 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4328 return err;
4329 }
4331 err = pci_request_regions(h->pdev, "cciss");
4332 if (err) {
4333 dev_warn(&h->pdev->dev,
4334 "Cannot obtain PCI resources, aborting\n");
4335 return err;
4336 }
4338 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4339 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4341 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4342 * else we use the IO-APIC interrupt assigned to us by system ROM.
4343 */
4344 cciss_interrupt_mode(h);
4345 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4346 if (err)
4347 goto err_out_free_res;
4348 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4349 if (!h->vaddr) {
4350 err = -ENOMEM;
4351 goto err_out_free_res;
4352 }
4353 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4354 if (err)
4355 goto err_out_free_res;
4356 err = cciss_find_cfgtables(h);
4357 if (err)
4358 goto err_out_free_res;
4359 print_cfg_table(h);
4360 cciss_find_board_params(h);
4362 if (!CISS_signature_present(h)) {
4363 err = -ENODEV;
4364 goto err_out_free_res;
4365 }
4366 cciss_enable_scsi_prefetch(h);
4367 cciss_p600_dma_prefetch_quirk(h);
4368 err = cciss_enter_simple_mode(h);
4369 if (err)
4370 goto err_out_free_res;
4371 cciss_put_controller_into_performant_mode(h);
4372 return 0;
4374 err_out_free_res:
4375 /*
4376 * Deliberately omit pci_disable_device(): it does something nasty to
4377 * Smart Array controllers that pci_enable_device does not undo
4378 */
4379 if (h->transtable)
4380 iounmap(h->transtable);
4381 if (h->cfgtable)
4382 iounmap(h->cfgtable);
4383 if (h->vaddr)
4384 iounmap(h->vaddr);
4385 pci_release_regions(h->pdev);
4386 return err;
4387 }
4389 /* Function to find the first free pointer into our hba[] array
4390 * Returns -1 if no free entries are left.
4391 */
4392 static int alloc_cciss_hba(struct pci_dev *pdev)
4393 {
4394 int i;
4396 for (i = 0; i < MAX_CTLR; i++) {
4397 if (!hba[i]) {
4398 ctlr_info_t *h;
4400 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4401 if (!h)
4402 goto Enomem;
4403 hba[i] = h;
4404 return i;
4405 }
4406 }
4407 dev_warn(&pdev->dev, "This driver supports a maximum"
4408 " of %d controllers.\n", MAX_CTLR);
4409 return -1;
4410 Enomem:
4411 dev_warn(&pdev->dev, "out of memory.\n");
4412 return -1;
4413 }
4415 static void free_hba(ctlr_info_t *h)
4416 {
4417 int i;
4419 hba[h->ctlr] = NULL;
4420 for (i = 0; i < h->highest_lun + 1; i++)
4421 if (h->gendisk[i] != NULL)
4422 put_disk(h->gendisk[i]);
4423 kfree(h);
4424 }
4426 /* Send a message CDB to the firmware. */
4427 static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4428 {
4429 typedef struct {
4430 CommandListHeader_struct CommandHeader;
4431 RequestBlock_struct Request;
4432 ErrDescriptor_struct ErrorDescriptor;
4433 } Command;
4434 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4435 Command *cmd;
4436 dma_addr_t paddr64;
4437 uint32_t paddr32, tag;
4438 void __iomem *vaddr;
4439 int i, err;
4441 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4442 if (vaddr == NULL)
4443 return -ENOMEM;
4445 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4446 CCISS commands, so they must be allocated from the lower 4GiB of
4447 memory. */
4448 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4449 if (err) {
4450 iounmap(vaddr);
4451 return -ENOMEM;
4452 }
4454 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4455 if (cmd == NULL) {
4456 iounmap(vaddr);
4457 return -ENOMEM;
4458 }
4460 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4461 although there's no guarantee, we assume that the address is at
4462 least 4-byte aligned (most likely, it's page-aligned). */
4463 paddr32 = paddr64;
4465 cmd->CommandHeader.ReplyQueue = 0;
4466 cmd->CommandHeader.SGList = 0;
4467 cmd->CommandHeader.SGTotal = 0;
4468 cmd->CommandHeader.Tag.lower = paddr32;
4469 cmd->CommandHeader.Tag.upper = 0;
4470 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4472 cmd->Request.CDBLen = 16;
4473 cmd->Request.Type.Type = TYPE_MSG;
4474 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4475 cmd->Request.Type.Direction = XFER_NONE;
4476 cmd->Request.Timeout = 0; /* Don't time out */
4477 cmd->Request.CDB[0] = opcode;
4478 cmd->Request.CDB[1] = type;
4479 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4481 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4482 cmd->ErrorDescriptor.Addr.upper = 0;
4483 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4485 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4487 for (i = 0; i < 10; i++) {
4488 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4489 if ((tag & ~3) == paddr32)
4490 break;
4491 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
4492 }
4494 iounmap(vaddr);
4496 /* we leak the DMA buffer here ... no choice since the controller could
4497 still complete the command. */
4498 if (i == 10) {
4499 dev_err(&pdev->dev,
4500 "controller message %02x:%02x timed out\n",
4501 opcode, type);
4502 return -ETIMEDOUT;
4503 }
4505 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4507 if (tag & 2) {
4508 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4509 opcode, type);
4510 return -EIO;
4511 }
4513 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4514 opcode, type);
4515 return 0;
4516 }
4518 #define cciss_noop(p) cciss_message(p, 3, 0)
4520 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4521 void * __iomem vaddr, u32 use_doorbell)
4522 {
4523 u16 pmcsr;
4524 int pos;
4526 if (use_doorbell) {
4527 /* For everything after the P600, the PCI power state method
4528 * of resetting the controller doesn't work, so we have this
4529 * other way using the doorbell register.
4530 */
4531 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4532 writel(use_doorbell, vaddr + SA5_DOORBELL);
4533 } else { /* Try to do it the PCI power state way */
4535 /* Quoting from the Open CISS Specification: "The Power
4536 * Management Control/Status Register (CSR) controls the power
4537 * state of the device. The normal operating state is D0,
4538 * CSR=00h. The software off state is D3, CSR=03h. To reset
4539 * the controller, place the interface device in D3 then to D0,
4540 * this causes a secondary PCI reset which will reset the
4541 * controller." */
4543 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4544 if (pos == 0) {
4545 dev_err(&pdev->dev,
4546 "cciss_controller_hard_reset: "
4547 "PCI PM not supported\n");
4548 return -ENODEV;
4549 }
4550 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4551 /* enter the D3hot power management state */
4552 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4553 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4554 pmcsr |= PCI_D3hot;
4555 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4557 msleep(500);
4559 /* enter the D0 power management state */
4560 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4561 pmcsr |= PCI_D0;
4562 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4564 /*
4565 * The P600 requires a small delay when changing states.
4566 * Otherwise we may think the board did not reset and we bail.
4567 * This for kdump only and is particular to the P600.
4568 */
4569 msleep(500);
4570 }
4571 return 0;
4572 }
4574 static __devinit void init_driver_version(char *driver_version, int len)
4575 {
4576 memset(driver_version, 0, len);
4577 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4578 }
4580 static __devinit int write_driver_ver_to_cfgtable(
4581 CfgTable_struct __iomem *cfgtable)
4582 {
4583 char *driver_version;
4584 int i, size = sizeof(cfgtable->driver_version);
4586 driver_version = kmalloc(size, GFP_KERNEL);
4587 if (!driver_version)
4588 return -ENOMEM;
4590 init_driver_version(driver_version, size);
4591 for (i = 0; i < size; i++)
4592 writeb(driver_version[i], &cfgtable->driver_version[i]);
4593 kfree(driver_version);
4594 return 0;
4595 }
4597 static __devinit void read_driver_ver_from_cfgtable(
4598 CfgTable_struct __iomem *cfgtable, unsigned char *driver_ver)
4599 {
4600 int i;
4602 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4603 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4604 }
4606 static __devinit int controller_reset_failed(
4607 CfgTable_struct __iomem *cfgtable)
4608 {
4610 char *driver_ver, *old_driver_ver;
4611 int rc, size = sizeof(cfgtable->driver_version);
4613 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4614 if (!old_driver_ver)
4615 return -ENOMEM;
4616 driver_ver = old_driver_ver + size;
4618 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4619 * should have been changed, otherwise we know the reset failed.
4620 */
4621 init_driver_version(old_driver_ver, size);
4622 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4623 rc = !memcmp(driver_ver, old_driver_ver, size);
4624 kfree(old_driver_ver);
4625 return rc;
4626 }
4628 /* This does a hard reset of the controller using PCI power management
4629 * states or using the doorbell register. */
4630 static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4631 {
4632 u64 cfg_offset;
4633 u32 cfg_base_addr;
4634 u64 cfg_base_addr_index;
4635 void __iomem *vaddr;
4636 unsigned long paddr;
4637 u32 misc_fw_support;
4638 int rc;
4639 CfgTable_struct __iomem *cfgtable;
4640 u32 use_doorbell;
4641 u32 board_id;
4642 u16 command_register;
4644 /* For controllers as old a the p600, this is very nearly
4645 * the same thing as
4646 *
4647 * pci_save_state(pci_dev);
4648 * pci_set_power_state(pci_dev, PCI_D3hot);
4649 * pci_set_power_state(pci_dev, PCI_D0);
4650 * pci_restore_state(pci_dev);
4651 *
4652 * For controllers newer than the P600, the pci power state
4653 * method of resetting doesn't work so we have another way
4654 * using the doorbell register.
4655 */
4657 /* Exclude 640x boards. These are two pci devices in one slot
4658 * which share a battery backed cache module. One controls the
4659 * cache, the other accesses the cache through the one that controls
4660 * it. If we reset the one controlling the cache, the other will
4661 * likely not be happy. Just forbid resetting this conjoined mess.
4662 */
4663 cciss_lookup_board_id(pdev, &board_id);
4664 if (!ctlr_is_resettable(board_id)) {
4665 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4666 "due to shared cache module.");
4667 return -ENODEV;
4668 }
4670 /* if controller is soft- but not hard resettable... */
4671 if (!ctlr_is_hard_resettable(board_id))
4672 return -ENOTSUPP; /* try soft reset later. */
4674 /* Save the PCI command register */
4675 pci_read_config_word(pdev, 4, &command_register);
4676 /* Turn the board off. This is so that later pci_restore_state()
4677 * won't turn the board on before the rest of config space is ready.
4678 */
4679 pci_disable_device(pdev);
4680 pci_save_state(pdev);
4682 /* find the first memory BAR, so we can find the cfg table */
4683 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4684 if (rc)
4685 return rc;
4686 vaddr = remap_pci_mem(paddr, 0x250);
4687 if (!vaddr)
4688 return -ENOMEM;
4690 /* find cfgtable in order to check if reset via doorbell is supported */
4691 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4692 &cfg_base_addr_index, &cfg_offset);
4693 if (rc)
4694 goto unmap_vaddr;
4695 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4696 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4697 if (!cfgtable) {
4698 rc = -ENOMEM;
4699 goto unmap_vaddr;
4700 }
4701 rc = write_driver_ver_to_cfgtable(cfgtable);
4702 if (rc)
4703 goto unmap_vaddr;
4705 /* If reset via doorbell register is supported, use that.
4706 * There are two such methods. Favor the newest method.
4707 */
4708 misc_fw_support = readl(&cfgtable->misc_fw_support);
4709 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4710 if (use_doorbell) {
4711 use_doorbell = DOORBELL_CTLR_RESET2;
4712 } else {
4713 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4714 if (use_doorbell) {
4715 dev_warn(&pdev->dev, "Controller claims that "
4716 "'Bit 2 doorbell reset' is "
4717 "supported, but not 'bit 5 doorbell reset'. "
4718 "Firmware update is recommended.\n");
4719 rc = -ENOTSUPP; /* use the soft reset */
4720 goto unmap_cfgtable;
4721 }
4722 }
4724 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4725 if (rc)
4726 goto unmap_cfgtable;
4727 pci_restore_state(pdev);
4728 rc = pci_enable_device(pdev);
4729 if (rc) {
4730 dev_warn(&pdev->dev, "failed to enable device.\n");
4731 goto unmap_cfgtable;
4732 }
4733 pci_write_config_word(pdev, 4, command_register);
4735 /* Some devices (notably the HP Smart Array 5i Controller)
4736 need a little pause here */
4737 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4739 /* Wait for board to become not ready, then ready. */
4740 dev_info(&pdev->dev, "Waiting for board to reset.\n");
4741 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4742 if (rc) {
4743 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4744 " Will try soft reset.\n");
4745 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4746 goto unmap_cfgtable;
4747 }
4748 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4749 if (rc) {
4750 dev_warn(&pdev->dev,
4751 "failed waiting for board to become ready "
4752 "after hard reset\n");
4753 goto unmap_cfgtable;
4754 }
4756 rc = controller_reset_failed(vaddr);
4757 if (rc < 0)
4758 goto unmap_cfgtable;
4759 if (rc) {
4760 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4761 "controller. Will try soft reset.\n");
4762 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4763 } else {
4764 dev_info(&pdev->dev, "Board ready after hard reset.\n");
4765 }
4767 unmap_cfgtable:
4768 iounmap(cfgtable);
4770 unmap_vaddr:
4771 iounmap(vaddr);
4772 return rc;
4773 }
4775 static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4776 {
4777 int rc, i;
4779 if (!reset_devices)
4780 return 0;
4782 /* Reset the controller with a PCI power-cycle or via doorbell */
4783 rc = cciss_kdump_hard_reset_controller(pdev);
4785 /* -ENOTSUPP here means we cannot reset the controller
4786 * but it's already (and still) up and running in
4787 * "performant mode". Or, it might be 640x, which can't reset
4788 * due to concerns about shared bbwc between 6402/6404 pair.
4789 */
4790 if (rc == -ENOTSUPP)
4791 return rc; /* just try to do the kdump anyhow. */
4792 if (rc)
4793 return -ENODEV;
4795 /* Now try to get the controller to respond to a no-op */
4796 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4797 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4798 if (cciss_noop(pdev) == 0)
4799 break;
4800 else
4801 dev_warn(&pdev->dev, "no-op failed%s\n",
4802 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4803 "; re-trying" : ""));
4804 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4805 }
4806 return 0;
4807 }
4809 static __devinit int cciss_allocate_cmd_pool(ctlr_info_t *h)
4810 {
4811 h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
4812 sizeof(unsigned long), GFP_KERNEL);
4813 h->cmd_pool = pci_alloc_consistent(h->pdev,
4814 h->nr_cmds * sizeof(CommandList_struct),
4815 &(h->cmd_pool_dhandle));
4816 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4817 h->nr_cmds * sizeof(ErrorInfo_struct),
4818 &(h->errinfo_pool_dhandle));
4819 if ((h->cmd_pool_bits == NULL)
4820 || (h->cmd_pool == NULL)
4821 || (h->errinfo_pool == NULL)) {
4822 dev_err(&h->pdev->dev, "out of memory");
4823 return -ENOMEM;
4824 }
4825 return 0;
4826 }
4828 static __devinit int cciss_allocate_scatterlists(ctlr_info_t *h)
4829 {
4830 int i;
4832 /* zero it, so that on free we need not know how many were alloc'ed */
4833 h->scatter_list = kzalloc(h->max_commands *
4834 sizeof(struct scatterlist *), GFP_KERNEL);
4835 if (!h->scatter_list)
4836 return -ENOMEM;
4838 for (i = 0; i < h->nr_cmds; i++) {
4839 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4840 h->maxsgentries, GFP_KERNEL);
4841 if (h->scatter_list[i] == NULL) {
4842 dev_err(&h->pdev->dev, "could not allocate "
4843 "s/g lists\n");
4844 return -ENOMEM;
4845 }
4846 }
4847 return 0;
4848 }
4850 static void cciss_free_scatterlists(ctlr_info_t *h)
4851 {
4852 int i;
4854 if (h->scatter_list) {
4855 for (i = 0; i < h->nr_cmds; i++)
4856 kfree(h->scatter_list[i]);
4857 kfree(h->scatter_list);
4858 }
4859 }
4861 static void cciss_free_cmd_pool(ctlr_info_t *h)
4862 {
4863 kfree(h->cmd_pool_bits);
4864 if (h->cmd_pool)
4865 pci_free_consistent(h->pdev,
4866 h->nr_cmds * sizeof(CommandList_struct),
4867 h->cmd_pool, h->cmd_pool_dhandle);
4868 if (h->errinfo_pool)
4869 pci_free_consistent(h->pdev,
4870 h->nr_cmds * sizeof(ErrorInfo_struct),
4871 h->errinfo_pool, h->errinfo_pool_dhandle);
4872 }
4874 static int cciss_request_irq(ctlr_info_t *h,
4875 irqreturn_t (*msixhandler)(int, void *),
4876 irqreturn_t (*intxhandler)(int, void *))
4877 {
4878 if (h->msix_vector || h->msi_vector) {
4879 if (!request_irq(h->intr[h->intr_mode], msixhandler,
4880 0, h->devname, h))
4881 return 0;
4882 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4883 " for %s\n", h->intr[h->intr_mode],
4884 h->devname);
4885 return -1;
4886 }
4888 if (!request_irq(h->intr[h->intr_mode], intxhandler,
4889 IRQF_SHARED, h->devname, h))
4890 return 0;
4891 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4892 h->intr[h->intr_mode], h->devname);
4893 return -1;
4894 }
4896 static int __devinit cciss_kdump_soft_reset(ctlr_info_t *h)
4897 {
4898 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4899 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4900 return -EIO;
4901 }
4903 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4904 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4905 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4906 return -1;
4907 }
4909 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4910 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4911 dev_warn(&h->pdev->dev, "Board failed to become ready "
4912 "after soft reset.\n");
4913 return -1;
4914 }
4916 return 0;
4917 }
4919 static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4920 {
4921 int ctlr = h->ctlr;
4923 free_irq(h->intr[h->intr_mode], h);
4924 #ifdef CONFIG_PCI_MSI
4925 if (h->msix_vector)
4926 pci_disable_msix(h->pdev);
4927 else if (h->msi_vector)
4928 pci_disable_msi(h->pdev);
4929 #endif /* CONFIG_PCI_MSI */
4930 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4931 cciss_free_scatterlists(h);
4932 cciss_free_cmd_pool(h);
4933 kfree(h->blockFetchTable);
4934 if (h->reply_pool)
4935 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4936 h->reply_pool, h->reply_pool_dhandle);
4937 if (h->transtable)
4938 iounmap(h->transtable);
4939 if (h->cfgtable)
4940 iounmap(h->cfgtable);
4941 if (h->vaddr)
4942 iounmap(h->vaddr);
4943 unregister_blkdev(h->major, h->devname);
4944 cciss_destroy_hba_sysfs_entry(h);
4945 pci_release_regions(h->pdev);
4946 kfree(h);
4947 hba[ctlr] = NULL;
4948 }
4950 /*
4951 * This is it. Find all the controllers and register them. I really hate
4952 * stealing all these major device numbers.
4953 * returns the number of block devices registered.
4954 */
4955 static int __devinit cciss_init_one(struct pci_dev *pdev,
4956 const struct pci_device_id *ent)
4957 {
4958 int i;
4959 int j = 0;
4960 int rc;
4961 int try_soft_reset = 0;
4962 int dac, return_code;
4963 InquiryData_struct *inq_buff;
4964 ctlr_info_t *h;
4965 unsigned long flags;
4967 rc = cciss_init_reset_devices(pdev);
4968 if (rc) {
4969 if (rc != -ENOTSUPP)
4970 return rc;
4971 /* If the reset fails in a particular way (it has no way to do
4972 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4973 * a soft reset once we get the controller configured up to the
4974 * point that it can accept a command.
4975 */
4976 try_soft_reset = 1;
4977 rc = 0;
4978 }
4980 reinit_after_soft_reset:
4982 i = alloc_cciss_hba(pdev);
4983 if (i < 0)
4984 return -1;
4986 h = hba[i];
4987 h->pdev = pdev;
4988 h->busy_initializing = 1;
4989 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4990 INIT_LIST_HEAD(&h->cmpQ);
4991 INIT_LIST_HEAD(&h->reqQ);
4992 mutex_init(&h->busy_shutting_down);
4994 if (cciss_pci_init(h) != 0)
4995 goto clean_no_release_regions;
4997 sprintf(h->devname, "cciss%d", i);
4998 h->ctlr = i;
5000 if (cciss_tape_cmds < 2)
5001 cciss_tape_cmds = 2;
5002 if (cciss_tape_cmds > 16)
5003 cciss_tape_cmds = 16;
5005 init_completion(&h->scan_wait);
5007 if (cciss_create_hba_sysfs_entry(h))
5008 goto clean0;
5010 /* configure PCI DMA stuff */
5011 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5012 dac = 1;
5013 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
5014 dac = 0;
5015 else {
5016 dev_err(&h->pdev->dev, "no suitable DMA available\n");
5017 goto clean1;
5018 }
5020 /*
5021 * register with the major number, or get a dynamic major number
5022 * by passing 0 as argument. This is done for greater than
5023 * 8 controller support.
5024 */
5025 if (i < MAX_CTLR_ORIG)
5026 h->major = COMPAQ_CISS_MAJOR + i;
5027 rc = register_blkdev(h->major, h->devname);
5028 if (rc == -EBUSY || rc == -EINVAL) {
5029 dev_err(&h->pdev->dev,
5030 "Unable to get major number %d for %s "
5031 "on hba %d\n", h->major, h->devname, i);
5032 goto clean1;
5033 } else {
5034 if (i >= MAX_CTLR_ORIG)
5035 h->major = rc;
5036 }
5038 /* make sure the board interrupts are off */
5039 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5040 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5041 if (rc)
5042 goto clean2;
5044 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
5045 h->devname, pdev->device, pci_name(pdev),
5046 h->intr[h->intr_mode], dac ? "" : " not");
5048 if (cciss_allocate_cmd_pool(h))
5049 goto clean4;
5051 if (cciss_allocate_scatterlists(h))
5052 goto clean4;
5054 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5055 h->chainsize, h->nr_cmds);
5056 if (!h->cmd_sg_list && h->chainsize > 0)
5057 goto clean4;
5059 spin_lock_init(&h->lock);
5061 /* Initialize the pdev driver private data.
5062 have it point to h. */
5063 pci_set_drvdata(pdev, h);
5064 /* command and error info recs zeroed out before
5065 they are used */
5066 bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
5068 h->num_luns = 0;
5069 h->highest_lun = -1;
5070 for (j = 0; j < CISS_MAX_LUN; j++) {
5071 h->drv[j] = NULL;
5072 h->gendisk[j] = NULL;
5073 }
5075 /* At this point, the controller is ready to take commands.
5076 * Now, if reset_devices and the hard reset didn't work, try
5077 * the soft reset and see if that works.
5078 */
5079 if (try_soft_reset) {
5081 /* This is kind of gross. We may or may not get a completion
5082 * from the soft reset command, and if we do, then the value
5083 * from the fifo may or may not be valid. So, we wait 10 secs
5084 * after the reset throwing away any completions we get during
5085 * that time. Unregister the interrupt handler and register
5086 * fake ones to scoop up any residual completions.
5087 */
5088 spin_lock_irqsave(&h->lock, flags);
5089 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5090 spin_unlock_irqrestore(&h->lock, flags);
5091 free_irq(h->intr[h->intr_mode], h);
5092 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5093 cciss_intx_discard_completions);
5094 if (rc) {
5095 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5096 "soft reset.\n");
5097 goto clean4;
5098 }
5100 rc = cciss_kdump_soft_reset(h);
5101 if (rc) {
5102 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5103 goto clean4;
5104 }
5106 dev_info(&h->pdev->dev, "Board READY.\n");
5107 dev_info(&h->pdev->dev,
5108 "Waiting for stale completions to drain.\n");
5109 h->access.set_intr_mask(h, CCISS_INTR_ON);
5110 msleep(10000);
5111 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5113 rc = controller_reset_failed(h->cfgtable);
5114 if (rc)
5115 dev_info(&h->pdev->dev,
5116 "Soft reset appears to have failed.\n");
5118 /* since the controller's reset, we have to go back and re-init
5119 * everything. Easiest to just forget what we've done and do it
5120 * all over again.
5121 */
5122 cciss_undo_allocations_after_kdump_soft_reset(h);
5123 try_soft_reset = 0;
5124 if (rc)
5125 /* don't go to clean4, we already unallocated */
5126 return -ENODEV;
5128 goto reinit_after_soft_reset;
5129 }
5131 cciss_scsi_setup(h);
5133 /* Turn the interrupts on so we can service requests */
5134 h->access.set_intr_mask(h, CCISS_INTR_ON);
5136 /* Get the firmware version */
5137 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5138 if (inq_buff == NULL) {
5139 dev_err(&h->pdev->dev, "out of memory\n");
5140 goto clean4;
5141 }
5143 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
5144 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
5145 if (return_code == IO_OK) {
5146 h->firm_ver[0] = inq_buff->data_byte[32];
5147 h->firm_ver[1] = inq_buff->data_byte[33];
5148 h->firm_ver[2] = inq_buff->data_byte[34];
5149 h->firm_ver[3] = inq_buff->data_byte[35];
5150 } else { /* send command failed */
5151 dev_warn(&h->pdev->dev, "unable to determine firmware"
5152 " version of controller\n");
5153 }
5154 kfree(inq_buff);
5156 cciss_procinit(h);
5158 h->cciss_max_sectors = 8192;
5160 rebuild_lun_table(h, 1, 0);
5161 cciss_engage_scsi(h);
5162 h->busy_initializing = 0;
5163 return 1;
5165 clean4:
5166 cciss_free_cmd_pool(h);
5167 cciss_free_scatterlists(h);
5168 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5169 free_irq(h->intr[h->intr_mode], h);
5170 clean2:
5171 unregister_blkdev(h->major, h->devname);
5172 clean1:
5173 cciss_destroy_hba_sysfs_entry(h);
5174 clean0:
5175 pci_release_regions(pdev);
5176 clean_no_release_regions:
5177 h->busy_initializing = 0;
5179 /*
5180 * Deliberately omit pci_disable_device(): it does something nasty to
5181 * Smart Array controllers that pci_enable_device does not undo
5182 */
5183 pci_set_drvdata(pdev, NULL);
5184 free_hba(h);
5185 return -1;
5186 }
5188 static void cciss_shutdown(struct pci_dev *pdev)
5189 {
5190 ctlr_info_t *h;
5191 char *flush_buf;
5192 int return_code;
5194 h = pci_get_drvdata(pdev);
5195 flush_buf = kzalloc(4, GFP_KERNEL);
5196 if (!flush_buf) {
5197 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
5198 return;
5199 }
5200 /* write all data in the battery backed cache to disk */
5201 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
5202 4, 0, CTLR_LUNID, TYPE_CMD);
5203 kfree(flush_buf);
5204 if (return_code != IO_OK)
5205 dev_warn(&h->pdev->dev, "Error flushing cache\n");
5206 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5207 free_irq(h->intr[h->intr_mode], h);
5208 }
5210 static int __devinit cciss_enter_simple_mode(struct ctlr_info *h)
5211 {
5212 u32 trans_support;
5214 trans_support = readl(&(h->cfgtable->TransportSupport));
5215 if (!(trans_support & SIMPLE_MODE))
5216 return -ENOTSUPP;
5218 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5219 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5220 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5221 cciss_wait_for_mode_change_ack(h);
5222 print_cfg_table(h);
5223 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5224 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5225 return -ENODEV;
5226 }
5227 h->transMethod = CFGTBL_Trans_Simple;
5228 return 0;
5229 }
5232 static void __devexit cciss_remove_one(struct pci_dev *pdev)
5233 {
5234 ctlr_info_t *h;
5235 int i, j;
5237 if (pci_get_drvdata(pdev) == NULL) {
5238 dev_err(&pdev->dev, "Unable to remove device\n");
5239 return;
5240 }
5242 h = pci_get_drvdata(pdev);
5243 i = h->ctlr;
5244 if (hba[i] == NULL) {
5245 dev_err(&pdev->dev, "device appears to already be removed\n");
5246 return;
5247 }
5249 mutex_lock(&h->busy_shutting_down);
5251 remove_from_scan_list(h);
5252 remove_proc_entry(h->devname, proc_cciss);
5253 unregister_blkdev(h->major, h->devname);
5255 /* remove it from the disk list */
5256 for (j = 0; j < CISS_MAX_LUN; j++) {
5257 struct gendisk *disk = h->gendisk[j];
5258 if (disk) {
5259 struct request_queue *q = disk->queue;
5261 if (disk->flags & GENHD_FL_UP) {
5262 cciss_destroy_ld_sysfs_entry(h, j, 1);
5263 del_gendisk(disk);
5264 }
5265 if (q)
5266 blk_cleanup_queue(q);
5267 }
5268 }
5270 #ifdef CONFIG_CISS_SCSI_TAPE
5271 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
5272 #endif
5274 cciss_shutdown(pdev);
5276 #ifdef CONFIG_PCI_MSI
5277 if (h->msix_vector)
5278 pci_disable_msix(h->pdev);
5279 else if (h->msi_vector)
5280 pci_disable_msi(h->pdev);
5281 #endif /* CONFIG_PCI_MSI */
5283 iounmap(h->transtable);
5284 iounmap(h->cfgtable);
5285 iounmap(h->vaddr);
5287 cciss_free_cmd_pool(h);
5288 /* Free up sg elements */
5289 for (j = 0; j < h->nr_cmds; j++)
5290 kfree(h->scatter_list[j]);
5291 kfree(h->scatter_list);
5292 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5293 kfree(h->blockFetchTable);
5294 if (h->reply_pool)
5295 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5296 h->reply_pool, h->reply_pool_dhandle);
5297 /*
5298 * Deliberately omit pci_disable_device(): it does something nasty to
5299 * Smart Array controllers that pci_enable_device does not undo
5300 */
5301 pci_release_regions(pdev);
5302 pci_set_drvdata(pdev, NULL);
5303 cciss_destroy_hba_sysfs_entry(h);
5304 mutex_unlock(&h->busy_shutting_down);
5305 free_hba(h);
5306 }
5308 static struct pci_driver cciss_pci_driver = {
5309 .name = "cciss",
5310 .probe = cciss_init_one,
5311 .remove = __devexit_p(cciss_remove_one),
5312 .id_table = cciss_pci_device_id, /* id_table */
5313 .shutdown = cciss_shutdown,
5314 };
5316 /*
5317 * This is it. Register the PCI driver information for the cards we control
5318 * the OS will call our registered routines when it finds one of our cards.
5319 */
5320 static int __init cciss_init(void)
5321 {
5322 int err;
5324 /*
5325 * The hardware requires that commands are aligned on a 64-bit
5326 * boundary. Given that we use pci_alloc_consistent() to allocate an
5327 * array of them, the size must be a multiple of 8 bytes.
5328 */
5329 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
5330 printk(KERN_INFO DRIVER_NAME "\n");
5332 err = bus_register(&cciss_bus_type);
5333 if (err)
5334 return err;
5336 /* Start the scan thread */
5337 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5338 if (IS_ERR(cciss_scan_thread)) {
5339 err = PTR_ERR(cciss_scan_thread);
5340 goto err_bus_unregister;
5341 }
5343 /* Register for our PCI devices */
5344 err = pci_register_driver(&cciss_pci_driver);
5345 if (err)
5346 goto err_thread_stop;
5348 return err;
5350 err_thread_stop:
5351 kthread_stop(cciss_scan_thread);
5352 err_bus_unregister:
5353 bus_unregister(&cciss_bus_type);
5355 return err;
5356 }
5358 static void __exit cciss_cleanup(void)
5359 {
5360 int i;
5362 pci_unregister_driver(&cciss_pci_driver);
5363 /* double check that all controller entrys have been removed */
5364 for (i = 0; i < MAX_CTLR; i++) {
5365 if (hba[i] != NULL) {
5366 dev_warn(&hba[i]->pdev->dev,
5367 "had to remove controller\n");
5368 cciss_remove_one(hba[i]->pdev);
5369 }
5370 }
5371 kthread_stop(cciss_scan_thread);
5372 if (proc_cciss)
5373 remove_proc_entry("driver/cciss", NULL);
5374 bus_unregister(&cciss_bus_type);
5375 }
5377 module_init(cciss_init);
5378 module_exit(cciss_cleanup);