1 /*
2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
3 *
4 * Copyright (C) 2007 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
21 #include <linux/kernel.h>
22 #include <linux/slab.h>
23 #include <linux/gpio.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c/pcf857x.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/irqdomain.h>
29 #include <linux/module.h>
30 #include <linux/spinlock.h>
31 #include <linux/workqueue.h>
34 static const struct i2c_device_id pcf857x_id[] = {
35 { "pcf8574", 8 },
36 { "pcf8574a", 8 },
37 { "pca8574", 8 },
38 { "pca9670", 8 },
39 { "pca9672", 8 },
40 { "pca9674", 8 },
41 { "pcf8575", 16 },
42 { "pca8575", 16 },
43 { "pca9671", 16 },
44 { "pca9673", 16 },
45 { "pca9675", 16 },
46 { "max7328", 8 },
47 { "max7329", 8 },
48 { }
49 };
50 MODULE_DEVICE_TABLE(i2c, pcf857x_id);
52 /*
53 * The pcf857x, pca857x, and pca967x chips only expose one read and one
54 * write register. Writing a "one" bit (to match the reset state) lets
55 * that pin be used as an input; it's not an open-drain model, but acts
56 * a bit like one. This is described as "quasi-bidirectional"; read the
57 * chip documentation for details.
58 *
59 * Many other I2C GPIO expander chips (like the pca953x models) have
60 * more complex register models and more conventional circuitry using
61 * push/pull drivers. They often use the same 0x20..0x27 addresses as
62 * pcf857x parts, making the "legacy" I2C driver model problematic.
63 */
64 struct pcf857x {
65 struct gpio_chip chip;
66 struct i2c_client *client;
67 struct mutex lock; /* protect 'out' */
68 struct work_struct work; /* irq demux work */
69 struct irq_domain *irq_domain; /* for irq demux */
70 spinlock_t slock; /* protect irq demux */
71 unsigned out; /* software latch */
72 unsigned status; /* current status */
73 int irq; /* real irq number */
75 int (*write)(struct i2c_client *client, unsigned data);
76 int (*read)(struct i2c_client *client);
77 };
79 /*-------------------------------------------------------------------------*/
81 /* Talk to 8-bit I/O expander */
83 static int i2c_write_le8(struct i2c_client *client, unsigned data)
84 {
85 return i2c_smbus_write_byte(client, data);
86 }
88 static int i2c_read_le8(struct i2c_client *client)
89 {
90 return (int)i2c_smbus_read_byte(client);
91 }
93 /* Talk to 16-bit I/O expander */
95 static int i2c_write_le16(struct i2c_client *client, unsigned word)
96 {
97 u8 buf[2] = { word & 0xff, word >> 8, };
98 int status;
100 status = i2c_master_send(client, buf, 2);
101 return (status < 0) ? status : 0;
102 }
104 static int i2c_read_le16(struct i2c_client *client)
105 {
106 u8 buf[2];
107 int status;
109 status = i2c_master_recv(client, buf, 2);
110 if (status < 0)
111 return status;
112 return (buf[1] << 8) | buf[0];
113 }
115 /*-------------------------------------------------------------------------*/
117 static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
118 {
119 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
120 int status;
122 mutex_lock(&gpio->lock);
123 gpio->out |= (1 << offset);
124 status = gpio->write(gpio->client, gpio->out);
125 mutex_unlock(&gpio->lock);
127 return status;
128 }
130 static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
131 {
132 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
133 int value;
135 value = gpio->read(gpio->client);
136 return (value < 0) ? 0 : (value & (1 << offset));
137 }
139 static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
140 {
141 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
142 unsigned bit = 1 << offset;
143 int status;
145 mutex_lock(&gpio->lock);
146 if (value)
147 gpio->out |= bit;
148 else
149 gpio->out &= ~bit;
150 status = gpio->write(gpio->client, gpio->out);
151 mutex_unlock(&gpio->lock);
153 return status;
154 }
156 static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
157 {
158 pcf857x_output(chip, offset, value);
159 }
161 /*-------------------------------------------------------------------------*/
163 static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset)
164 {
165 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
167 return irq_create_mapping(gpio->irq_domain, offset);
168 }
170 static void pcf857x_irq_demux_work(struct work_struct *work)
171 {
172 struct pcf857x *gpio = container_of(work,
173 struct pcf857x,
174 work);
175 unsigned long change, i, status, flags;
177 status = gpio->read(gpio->client);
179 spin_lock_irqsave(&gpio->slock, flags);
181 change = gpio->status ^ status;
182 for_each_set_bit(i, &change, gpio->chip.ngpio)
183 generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
184 gpio->status = status;
186 spin_unlock_irqrestore(&gpio->slock, flags);
187 }
189 static irqreturn_t pcf857x_irq_demux(int irq, void *data)
190 {
191 struct pcf857x *gpio = data;
193 /*
194 * pcf857x can't read/write data here,
195 * since i2c data access might go to sleep.
196 */
197 schedule_work(&gpio->work);
199 return IRQ_HANDLED;
200 }
202 static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int virq,
203 irq_hw_number_t hw)
204 {
205 irq_set_chip_and_handler(virq,
206 &dummy_irq_chip,
207 handle_level_irq);
208 return 0;
209 }
211 static struct irq_domain_ops pcf857x_irq_domain_ops = {
212 .map = pcf857x_irq_domain_map,
213 };
215 static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio)
216 {
217 if (gpio->irq_domain)
218 irq_domain_remove(gpio->irq_domain);
220 if (gpio->irq)
221 free_irq(gpio->irq, gpio);
222 }
224 static int pcf857x_irq_domain_init(struct pcf857x *gpio,
225 struct pcf857x_platform_data *pdata,
226 struct i2c_client *client)
227 {
228 int status;
230 gpio->irq_domain = irq_domain_add_linear(client->dev.of_node,
231 gpio->chip.ngpio,
232 &pcf857x_irq_domain_ops,
233 NULL);
234 if (!gpio->irq_domain)
235 goto fail;
237 /* enable real irq */
238 status = request_irq(client->irq, pcf857x_irq_demux, 0,
239 dev_name(&client->dev), gpio);
240 if (status)
241 goto fail;
243 /* enable gpio_to_irq() */
244 INIT_WORK(&gpio->work, pcf857x_irq_demux_work);
245 gpio->chip.to_irq = pcf857x_to_irq;
246 gpio->irq = client->irq;
248 return 0;
250 fail:
251 pcf857x_irq_domain_cleanup(gpio);
252 return -EINVAL;
253 }
255 /*-------------------------------------------------------------------------*/
257 struct pcf857x_platform_data *of_gpio_pcf857x(struct device *dev)
258 {
259 struct pcf857x_platform_data *pdata;
260 int r;
262 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
263 if (!pdata)
264 return NULL;
266 pdata->gpio_base = -1;
268 r = of_property_read_u32(dev->of_node, "n_latch", &pdata->n_latch);
269 if (r) {
270 dev_dbg(dev, "couldn't find n-latch, use default\n");
271 pdata->n_latch = ~0;
272 }
274 return pdata;
275 }
277 static int pcf857x_probe(struct i2c_client *client,
278 const struct i2c_device_id *id)
279 {
280 struct pcf857x_platform_data *pdata;
281 struct device_node *node;
282 struct pcf857x *gpio;
283 int status;
285 pdata = client->dev.platform_data;
286 node = client->dev.of_node;
288 if (!pdata && node)
289 pdata = of_gpio_pcf857x(&client->dev);
291 if (!pdata)
292 dev_dbg(&client->dev, "no platform data\n");
294 /* Allocate, initialize, and register this gpio_chip. */
295 gpio = kzalloc(sizeof *gpio, GFP_KERNEL);
296 if (!gpio)
297 return -ENOMEM;
299 mutex_init(&gpio->lock);
300 spin_lock_init(&gpio->slock);
302 gpio->chip.base = pdata ? pdata->gpio_base : -1;
303 gpio->chip.can_sleep = 1;
304 gpio->chip.dev = &client->dev;
305 gpio->chip.owner = THIS_MODULE;
306 gpio->chip.get = pcf857x_get;
307 gpio->chip.set = pcf857x_set;
308 gpio->chip.direction_input = pcf857x_input;
309 gpio->chip.direction_output = pcf857x_output;
310 gpio->chip.ngpio = id->driver_data;
312 /* enable gpio_to_irq() if platform has settings */
313 if (pdata && client->irq) {
314 status = pcf857x_irq_domain_init(gpio, pdata, client);
315 if (status < 0) {
316 dev_err(&client->dev, "irq_domain init failed\n");
317 goto fail;
318 }
319 }
321 /* NOTE: the OnSemi jlc1562b is also largely compatible with
322 * these parts, notably for output. It has a low-resolution
323 * DAC instead of pin change IRQs; and its inputs can be the
324 * result of comparators.
325 */
327 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
328 * 9670, 9672, 9764, and 9764a use quite a variety.
329 *
330 * NOTE: we don't distinguish here between *4 and *4a parts.
331 */
332 if (gpio->chip.ngpio == 8) {
333 gpio->write = i2c_write_le8;
334 gpio->read = i2c_read_le8;
336 if (!i2c_check_functionality(client->adapter,
337 I2C_FUNC_SMBUS_BYTE))
338 status = -EIO;
340 /* fail if there's no chip present */
341 else
342 status = i2c_smbus_read_byte(client);
344 /* '75/'75c addresses are 0x20..0x27, just like the '74;
345 * the '75c doesn't have a current source pulling high.
346 * 9671, 9673, and 9765 use quite a variety of addresses.
347 *
348 * NOTE: we don't distinguish here between '75 and '75c parts.
349 */
350 } else if (gpio->chip.ngpio == 16) {
351 gpio->write = i2c_write_le16;
352 gpio->read = i2c_read_le16;
354 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
355 status = -EIO;
357 /* fail if there's no chip present */
358 else
359 status = i2c_read_le16(client);
361 } else {
362 dev_dbg(&client->dev, "unsupported number of gpios\n");
363 status = -EINVAL;
364 }
366 if (status < 0)
367 goto fail;
369 gpio->chip.label = client->name;
371 gpio->client = client;
372 i2c_set_clientdata(client, gpio);
374 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
375 * We can't actually know whether a pin is configured (a) as output
376 * and driving the signal low, or (b) as input and reporting a low
377 * value ... without knowing the last value written since the chip
378 * came out of reset (if any). We can't read the latched output.
379 *
380 * In short, the only reliable solution for setting up pin direction
381 * is to do it explicitly. The setup() method can do that, but it
382 * may cause transient glitching since it can't know the last value
383 * written (some pins may need to be driven low).
384 *
385 * Using pdata->n_latch avoids that trouble. When left initialized
386 * to zero, our software copy of the "latch" then matches the chip's
387 * all-ones reset state. Otherwise it flags pins to be driven low.
388 */
389 gpio->out = pdata ? ~pdata->n_latch : ~0;
390 gpio->status = gpio->out;
392 status = gpiochip_add(&gpio->chip);
393 if (status < 0)
394 goto fail;
396 /* Let platform code set up the GPIOs and their users.
397 * Now is the first time anyone could use them.
398 */
399 if (pdata && pdata->setup) {
400 status = pdata->setup(client,
401 gpio->chip.base, gpio->chip.ngpio,
402 pdata->context);
403 if (status < 0)
404 dev_warn(&client->dev, "setup --> %d\n", status);
405 }
407 dev_info(&client->dev, "probed\n");
409 return 0;
411 fail:
412 dev_dbg(&client->dev, "probe error %d for '%s'\n",
413 status, client->name);
415 if (pdata && client->irq)
416 pcf857x_irq_domain_cleanup(gpio);
418 kfree(gpio);
419 return status;
420 }
422 static int pcf857x_remove(struct i2c_client *client)
423 {
424 struct pcf857x_platform_data *pdata = client->dev.platform_data;
425 struct pcf857x *gpio = i2c_get_clientdata(client);
426 int status = 0;
428 if (pdata && pdata->teardown) {
429 status = pdata->teardown(client,
430 gpio->chip.base, gpio->chip.ngpio,
431 pdata->context);
432 if (status < 0) {
433 dev_err(&client->dev, "%s --> %d\n",
434 "teardown", status);
435 return status;
436 }
437 }
439 if (pdata && client->irq)
440 pcf857x_irq_domain_cleanup(gpio);
442 status = gpiochip_remove(&gpio->chip);
443 if (status == 0)
444 kfree(gpio);
445 else
446 dev_err(&client->dev, "%s --> %d\n", "remove", status);
447 return status;
448 }
450 static const struct of_device_id pcf857x_dt_ids[] = {
451 { .compatible = "ti,pcf8574", },
452 { .compatible = "ti,pcf8574a", },
453 { .compatible = "ti,pca8574", },
454 { .compatible = "ti,pca9670", },
455 { .compatible = "ti,pca9672", },
456 { .compatible = "ti,pca9674", },
457 { .compatible = "ti,pcf8575", },
458 { .compatible = "ti,pca8575", },
459 { .compatible = "ti,pca9671", },
460 { .compatible = "ti,pca9673", },
461 { .compatible = "ti,pca9675", },
462 { .compatible = "ti,max7328", },
463 { .compatible = "ti,max7329", },
464 { }
465 };
467 MODULE_DEVICE_TABLE(of, pcf857x_dt_ids);
469 static struct i2c_driver pcf857x_driver = {
470 .driver = {
471 .name = "pcf857x",
472 .owner = THIS_MODULE,
473 .of_match_table = pcf857x_dt_ids,
474 },
475 .probe = pcf857x_probe,
476 .remove = pcf857x_remove,
477 .id_table = pcf857x_id,
478 };
480 static int __init pcf857x_init(void)
481 {
482 return i2c_add_driver(&pcf857x_driver);
483 }
484 /* register after i2c postcore initcall and before
485 * subsys initcalls that may rely on these GPIOs
486 */
487 subsys_initcall(pcf857x_init);
489 static void __exit pcf857x_exit(void)
490 {
491 i2c_del_driver(&pcf857x_driver);
492 }
493 module_exit(pcf857x_exit);
495 MODULE_LICENSE("GPL");
496 MODULE_AUTHOR("David Brownell");