index eab9eea847cad997fd92b46c7ecb87a2f8ca20d8..9c2a078e764a8f0ca7287772596b9c2b29f7f324 100644 (file)
reg = <0x80000000 0x60000000>; /* 1536 MB */
};
- reserved-memory {
+ reserved_mem: reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
};
- extcon1: dra7x_usbid_extcon1 {
- compatible = "linux,extcon-gpio";
- gpios = <&pcf_gpio_21 1 GPIO_ACTIVE_LOW>;
- cable-name = "USB-HOST";
+ extcon_usb1: extcon_usb1 {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpios = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
};
- extcon2: dra7x_usbid_extcon2 {
- compatible = "linux,extcon-gpio";
- gpios = <&pcf_gpio_21 2 GPIO_ACTIVE_LOW>;
- cable-name = "USB-HOST";
+ extcon_usb2: extcon_usb2 {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpios = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
};
evm_3v3_sd: fixedregulator-sd {
};
};
+ ocp {
+ gpu: gpu@0x56000000 {
+ gpu0-voltdm = <&voltdm_gpu>;
+ };
+ };
+
primary_sound: primary_sound {
compatible = "ti,dra7xx-evm-audio";
ti,model = "DRA7xx-EVM";
+ ti,always-on;
ti,audio-codec = <&tlv320aic3106>;
ti,mcasp-controller = <&mcasp3>;
- ti,codec-clock-rate = <5644800>;
+ ti,codec-clock-rate = <11289600>;
clocks = <&atl_clkin2_ck>;
clock-names = "mclk";
ti,audio-routing =
"LINE1L", "Line In",
"LINE1R", "Line In";
};
-};
-
-&dra7_pmx_core {
- wlan_pins: pinmux_wlan_pins {
- pinctrl-single,pins = <
- 0x3e8 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
- 0x3ec (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
- 0x3f0 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
- 0x3f4 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
- 0x3f8 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
- 0x3fc (PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
- 0x2cc (PIN_OUTPUT | MUX_MODE14) /* mcasp1_axr6.gpio5_8 - WLAN_EN */
- >;
- };
-
- wlirq_pins: pinmux_wlirq_pins {
- pinctrl-single,pins = <
- 0x2c8 (PIN_INPUT_PULLUP | WAKEUP_EN | MUX_MODE14 ) /* mcasp1_axr5.gpio5_7 - WLAN_IRQ */
- >;
- };
- cpsw_default: cpsw_default {
- pinctrl-single,pins = <
- /* Slave 1 */
- 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
- 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
- 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
- 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
- 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
- 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
- 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
- 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
- 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
- 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
- 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
- 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
-
- /* Slave 2 */
- 0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
- 0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
- 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
- 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
- 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
- 0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
- 0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
- 0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
- 0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
- 0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
- 0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
- 0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
- >;
-
- };
-
- cpsw_sleep: cpsw_sleep {
- pinctrl-single,pins = <
- /* Slave 1 */
- 0x250 (PIN_OFF_NONE)
- 0x254 (PIN_OFF_NONE)
- 0x258 (PIN_OFF_NONE)
- 0x25c (PIN_OFF_NONE)
- 0x260 (PIN_OFF_NONE)
- 0x264 (PIN_OFF_NONE)
- 0x268 (PIN_OFF_NONE)
- 0x26c (PIN_OFF_NONE)
- 0x270 (PIN_OFF_NONE)
- 0x274 (PIN_OFF_NONE)
- 0x278 (PIN_OFF_NONE)
- 0x27c (PIN_OFF_NONE)
-
- /* Slave 1 */
- 0x198 (PIN_OFF_NONE)
- 0x19c (PIN_OFF_NONE)
- 0x1a0 (PIN_OFF_NONE)
- 0x1a4 (PIN_OFF_NONE)
- 0x1a8 (PIN_OFF_NONE)
- 0x1ac (PIN_OFF_NONE)
- 0x1b0 (PIN_OFF_NONE)
- 0x1b4 (PIN_OFF_NONE)
- 0x1b8 (PIN_OFF_NONE)
- 0x1bc (PIN_OFF_NONE)
- 0x1c0 (PIN_OFF_NONE)
- 0x1c4 (PIN_OFF_NONE)
- >;
- };
-
- davinci_mdio_default: davinci_mdio_default {
- pinctrl-single,pins = <
- /* MDIO */
- 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_data */
- 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk */
- >;
+ btwilink_sound: btwilink_sound {
+ #sound-dai-cells = <0>;
+ compatible = "linux,bt-sco-audio";
+ status = "okay";
};
- davinci_mdio_sleep: davinci_mdio_sleep {
- pinctrl-single,pins = <
- 0x23c (PIN_OFF_NONE)
- 0x240 (PIN_OFF_NONE)
- >;
- };
+ simple_bt_sco_card: bt_sco_card {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "DRA7xx-WiLink";
+ simple-audio-card,format = "dsp_a";
+ simple-audio-card,frame-master = <&btwilink_codec>;
+ simple-audio-card,bitclock-master = <&btwilink_codec>;
+ simple-audio-card,frame-inversion;
- nand_flash_x16: nand_flash_x16 {
- /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch
- * So NAND flash requires following switch settings:
- * SW5.9 (GPMC_WPN) = LOW
- * SW5.1 (NAND_BOOTn) = HIGH */
- pinctrl-single,pins = <
- 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
- 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
- 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
- 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
- 0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
- 0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
- 0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
- 0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
- 0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
- 0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
- 0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
- 0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
- 0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
- 0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
- 0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
- 0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
- 0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0 */
- 0xcc (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
- 0xb4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0 */
- 0xc4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
- 0xc8 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
- 0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */
- >;
- };
+ simple-audio-card,cpu {
+ sound-dai = <&mcasp7>;
+ };
- tsc_pins: pinmux_tsc_pins {
- pinctrl-single,pins = <
- 0x420 (PIN_INPUT_PULLUP | MUX_MODE1) /* sys_nirq2 */
- >;
+ btwilink_codec: simple-audio-card,codec {
+ sound-dai = <&btwilink_sound>;
+ };
};
+};
+&dra7_pmx_core {
dcan1_pins_default: dcan1_pins_default {
pinctrl-single,pins = <
0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
>;
};
+ mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins {
+ pinctrl-single,pins = <
+ 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
+ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+ >;
+ };
+
mmc1_pins_hs: pinmux_mmc1_hs_pins {
pinctrl-single,pins = <
0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
>;
};
+ mmc1_pins_sdr25: pinmux_mmc1_sdr25_pins {
+ pinctrl-single,pins = <
+ 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
+ 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
+ 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
+ 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
+ 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */
+ 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */
+ >;
+ };
+
+ mmc1_pins_ddr50: pinmux_mmc1_ddr50_pins {
+ pinctrl-single,pins = <
+ 0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.clk */
+ 0x358 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_cmd.cmd */
+ 0x35c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat0.dat0 */
+ 0x360 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat1.dat1 */
+ 0x364 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat2.dat2 */
+ 0x368 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat3.dat3 */
+ >;
+ };
+
mmc2_pins_default: mmc2_pins_default {
pinctrl-single,pins = <
0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
>;
};
+
+ mmc2_pins_ddr_3_3v: pinmux_mmc2_ddr_3_3v_pins {
+ pinctrl-single,pins = <
+ 0x9c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a23.mmc2_clk */
+ 0xb0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
+ 0xa0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
+ 0xa4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
+ 0xa8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
+ 0xac (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
+ 0x8c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
+ 0x90 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
+ 0x94 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
+ 0x98 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
+ >;
+ };
+};
+
+&dra7_iodelay_core {
+ mmc1_iodelay_ddr50_conf: mmc1_iodelay_ddr50_conf {
+ pinctrl-single,pins = <
+ 0x618 (A_DELAY(572) | G_DELAY(540)) /* CFG_MMC1_CLK_IN */
+ 0x624 (A_DELAY(0) | G_DELAY(600)) /* CFG_MMC1_CMD_IN */
+ 0x630 (A_DELAY(403) | G_DELAY(120)) /* CFG_MMC1_DAT0_IN */
+ 0x63c (A_DELAY(23) | G_DELAY(60)) /* CFG_MMC1_DAT1_IN */
+ 0x648 (A_DELAY(25) | G_DELAY(60)) /* CFG_MMC1_DAT2_IN */
+ 0x654 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */
+ 0x620 (A_DELAY(1525) | G_DELAY(0)) /* CFG_MMC1_CLK_IN */
+ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
+ 0x62c (A_DELAY(55) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
+ 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
+ 0x638 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */
+ 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
+ 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
+ 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
+ 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
+ 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
+ 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
+ >;
+ };
+
+ mmc2_iodelay_ddr_3_3v_conf: mmc2_iodelay_ddr_3_3v_conf {
+ pinctrl-single,pins = <
+ 0x18c (A_DELAY(0) | G_DELAY(120)) /* CFG_GPMC_A19_IN */
+ 0x1a4 (A_DELAY(265) | G_DELAY(360)) /* CFG_GPMC_A20_IN */
+ 0x1b0 (A_DELAY(0) | G_DELAY(120)) /* CFG_GPMC_A21_IN */
+ 0x1bc (A_DELAY(0) | G_DELAY(120)) /* CFG_GPMC_A22_IN */
+ 0x1c8 (A_DELAY(287) | G_DELAY(420)) /* CFG_GPMC_A23_IN */
+ 0x1d4 (A_DELAY(144) | G_DELAY(240)) /* CFG_GPMC_A24_IN */
+ 0x1e0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_IN */
+ 0x1ec (A_DELAY(0) | G_DELAY(120)) /* CFG_GPMC_A26_IN */
+ 0x1f8 (A_DELAY(120) | G_DELAY(180)) /* CFG_GPMC_A27_IN */
+ 0x360 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_IN */
+ 0x190 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */
+ 0x194 (A_DELAY(174) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */
+ 0x1a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */
+ 0x1ac (A_DELAY(168) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */
+ 0x1b4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */
+ 0x1b8 (A_DELAY(136) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */
+ 0x1c0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */
+ 0x1c4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */
+ 0x1d0 (A_DELAY(879) | G_DELAY(0)) /* CFG_GPMC_A23_OUT */
+ 0x1d8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */
+ 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */
+ 0x1e4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */
+ 0x1e8 (A_DELAY(34) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */
+ 0x1f0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */
+ 0x1f4 (A_DELAY(120) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */
+ 0x1fc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */
+ 0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */
+ 0x364 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */
+ 0x368 (A_DELAY(11) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */
+ >;
+ };
};
&i2c1 {
};
pcf_gpio_21: gpio@21 {
- compatible = "ti,pcf8575";
+ compatible = "nxp,pcf8575";
reg = <0x21>;
lines-initial-states = <0x1408>;
gpio-controller;
#interrupt-cells = <2>;
};
+
tlv320aic3106: tlv320aic3106@18 {
compatible = "ti,tlv320aic3106";
reg = <0x18>;
};
};
-&i2c2 {
+i2c_p3_exp: &i2c2 {
status = "okay";
clock-frequency = <400000>;
remote-endpoint = <&vin1a>;
hsync-active = <1>;
vsync-active = <1>;
- pclk-sample = <1>;
+ pclk-sample = <0>;
};
};
};
* is always hardwired.
*/
cd-gpios = <&gpio6 27 0>;
- pinctrl-names = "default", "hs";
+ pinctrl-names = "default", "hs", "sdr12", "sdr25", "ddr50";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-1 = <&mmc1_pins_hs>;
+ pinctrl-2 = <&mmc1_pins_sdr12>;
+ pinctrl-3 = <&mmc1_pins_sdr25>;
+ pinctrl-4 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_conf>;
+ sd-uhs-ddr50;
+ sd-uhs-sdr25;
+ sd-uhs-sdr12;
};
&mmc2 {
status = "okay";
vmmc-supply = <&evm_3v3_sw>;
bus-width = <8>;
- pinctrl-names = "default", "hs";
+ pinctrl-names = "default", "hs", "ddr_3_3v";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
+ pinctrl-2 = <&mmc2_pins_ddr_3_3v &mmc2_iodelay_ddr_3_3v_conf>;
+ mmc-ddr-1_8v;
};
&mmc4 {
status = "okay";
vmmc-supply = <&vmmcwl_fixed>;
bus-width = <4>;
- pinctrl-names = "default";
- pinctrl-0 = <&wlan_pins &wlirq_pins>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
compatible = "ti,wlcore";
reg = <2>;
interrupt-parent = <&gpio5>;
- interrupts = <7 IRQ_TYPE_NONE>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
&omap_dwc3_1 {
- extcon = <&extcon1>;
+ extcon = <&extcon_usb1>;
};
&omap_dwc3_2 {
- extcon = <&extcon2>;
+ extcon = <&extcon_usb2>;
};
&usb1 {
- dr_mode = "peripheral";
+ dr_mode = "otg";
};
&usb2 {
memory-region = <&ipu1_cma_pool>;
mboxes = <&mailbox5 &mbox_ipu1_legacy>;
timers = <&timer11>;
+ watchdog-timers = <&timer7>, <&timer8>;
};
&dsp1 {
memory-region = <&dsp1_cma_pool>;
mboxes = <&mailbox5 &mbox_dsp1_legacy>;
timers = <&timer5>;
+ watchdog-timers = <&timer10>;
};
&dsp2 {
>;
};
+&mcasp7 {
+ #sound-dai-cells = <0>;
+
+ status = "okay";
+
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <4>;
+ /* 4 serializer */
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 2 1 0 0
+ >;
+ tx-num-evt = <8>;
+ rx-num-evt = <8>;
+};
+
&usb2_phy1 {
phy-supply = <&ldousb_reg>;
};
remote-endpoint = <&onboardLI>;
};
};
+
+#include "dra7xx-jamr3.dtsi"