ARM: dts: DRA7: enabling optional clks in DT

[android-sdk/kernel-video.git] / arch / arm / boot / dts / dra72-evm.dts

diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 8805d8cd913b18e08cb95e3d607dced8cf8225ef..080f1844a511e5e4583a6245a5484a1b00f09b63 100644 (file)
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -625,6 +625,7 @@
                                        regulator-name = "ldo1";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <3300000>;
+                                       regulator-always-on;
                                        regulator-boot-on;
                                };
 
@@ -690,7 +691,7 @@
                interrupt-controller;
                #interrupt-cells = <2>;
 
-               cpsw_sel_s0 {
+               sel_enet_mux_hog: cpsw_sel_s0 {
                        gpio-hog;
                        gpios = <4 GPIO_ACTIVE_HIGH>;
                        output-low;
@@ -817,7 +818,7 @@ i2c_p3_exp: &i2c5 {
        #address-cells = <1>;
        #size-cells = <0>;
        wlcore: wlcore@0 {
-               compatible = "ti,wlcore";
+               compatible = "ti,wl1835";
                reg = <2>;
                interrupt-parent = <&gpio5>;
                interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
@@ -959,6 +960,7 @@ i2c_p3_exp: &i2c5 {
 
 &dss {
        status = "ok";
+       ti,enable-opt-clks-on-reset;
 
        vdda_video-supply = <&ldo5_reg>;
 };
@@ -1109,7 +1111,7 @@ i2c_p3_exp: &i2c5 {
 };
 
 &usb1 {
-       dr_mode = "otg";
+       dr_mode = "peripheral";
        pinctrl-names = "default";
        pinctrl-0 = <&usb1_pins>;
 };
@@ -1198,7 +1200,8 @@ i2c_p3_exp: &i2c5 {
        status = "okay";
 };
 
-&vin2a {
+video_in: &vin2a {
+       status = "okay";
        endpoint@0 {
                slave-mode;
                remote-endpoint = <&onboardLI>;
@@ -1214,3 +1217,9 @@ i2c_p3_exp: &i2c5 {
         pinctrl-names = "default";
         pinctrl-0 = <&radio_pins>;
 };
+
+&tvp_5158{
+       mux-gpios = <&pcf_hdmi 2 GPIO_ACTIVE_LOW>,      /*VIN2_S0*/
+                       <&pcf_jamr3_21 8 GPIO_ACTIVE_LOW>,      /*SEL_TVP_FPD*/
+                       <&pcf_hdmi 6 GPIO_ACTIVE_HIGH>; /*VIN2_S2*/
+};