Merge commit '2ed93f46' into tmp

[android-sdk/kernel-video.git] / arch / arm / boot / dts / omap5.dtsi

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 9e182a9cd551ebafcdcd84a300241a6aac12f352..5d4b5a5ef99ec8266aa008bba89de3eab11f5b3d 100644 (file)
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -18,6 +18,9 @@
 /include/ "skeleton.dtsi"
 
 / {
+       #address-cells = <1>;
+       #size-cells = <1>;
+
        compatible = "ti,omap5";
        interrupt-parent = <&gic>;
 
@@ -33,24 +36,32 @@
        cpus {
                cpu@0 {
                        compatible = "arm,cortex-a15";
-                       timer {
-                               compatible = "arm,armv7-timer";
-                               /* 14th PPI IRQ, active low level-sensitive */
-                               interrupts = <1 14 0x308>;
-                               clock-frequency = <6144000>;
-                       };
                };
                cpu@1 {
                        compatible = "arm,cortex-a15";
-                       timer {
-                               compatible = "arm,armv7-timer";
-                               /* 14th PPI IRQ, active low level-sensitive */
-                               interrupts = <1 14 0x308>;
-                               clock-frequency = <6144000>;
-                       };
                };
        };
 
+       timer {
+               compatible = "arm,armv7-timer";
+               /* PPI secure/nonsecure IRQ, active low level-sensitive */
+               interrupts = <1 13 0x308>,
+                            <1 14 0x308>,
+                            <1 11 0x308>,
+                            <1 10 0x308>;
+               clock-frequency = <6144000>;
+       };
+
+       gic: interrupt-controller@48211000 {
+               compatible = "arm,cortex-a15-gic";
+               interrupt-controller;
+               #interrupt-cells = <3>;
+               reg = <0x48211000 0x1000>,
+                     <0x48212000 0x1000>,
+                     <0x48214000 0x2000>,
+                     <0x48216000 0x2000>;
+       };
+
        /*
         * The soc node represents the soc top level view. It is uses for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.
@@ -100,14 +111,6 @@
                        pinctrl-single,function-mask = <0x7fff>;
                };
 
-               gic: interrupt-controller@48211000 {
-                       compatible = "arm,cortex-a15-gic";
-                       interrupt-controller;
-                       #interrupt-cells = <3>;
-                       reg = <0x48211000 0x1000>,
-                             <0x48212000 0x1000>;
-               };
-
                gpio1: gpio@4ae10000 {
                        compatible = "ti,omap4-gpio";
                        reg = <0x4ae10000 0x200>;
@@ -372,6 +375,7 @@
 
                keypad: keypad@4ae1c000 {
                        compatible = "ti,omap4-keypad";
+                       reg = <0x4ae1c000 0x400>;
                        ti,hwmods = "kbd";
                };
 
@@ -536,5 +540,12 @@
                        hw-caps-ll-interface;
                        hw-caps-temp-alert;
                };
+
+               wdt2: wdt@4ae14000 {
+                       compatible = "ti,omap5-wdt", "ti,omap4-wdt";
+                       reg = <0x4ae14000 0x80>;
+                       interrupts = <0 80 0x4>;
+                       ti,hwmods = "wd_timer2";
+               };
        };
 };