diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 51f39fbf686bd4eeefdae8bd0c2f54227d5c0719..73c152d17a91fabd2d6bdd95abdef72805c1e945 100644 (file)
#include <linux/omap-dma.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/asoc-ti-mcbsp.h>
+#include <linux/platform_data/mailbox-omap.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
/* Base offset for all OMAP5 dma requests */
#define OMAP54XX_DMA_REQ_START 1
+/* Backward references (IPs with Bus Master capability) */
+static struct omap_hwmod omap54xx_bb2d_hwmod;
+
/*
* IP blocks
{ .irq = -1 }
};
+static struct omap_hwmod_addr_space omap54xx_bb2d_addrs[] = {
+ {
+ .pa_start = 0x59000000,
+ .pa_end = 0x590007ff,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+/* l3_main_2 -> bb2d */
+static struct omap_hwmod_ocp_if omap54xx_l3_main_2__bb2d = {
+ .master = &omap54xx_l3_main_2_hwmod,
+ .slave = &omap54xx_bb2d_hwmod,
+ .clk = "l3_iclk_div",
+ .addr = omap54xx_bb2d_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod omap54xx_bb2d_hwmod = {
.name = "bb2d",
.class = &omap54xx_bb2d_hwmod_class,
};
/* mailbox */
+static struct omap_mbox_dev_info omap54xx_mbox_info[] = {
+ { .name = "mbox-ipu", .tx_id = 0, .rx_id = 1 },
+ { .name = "mbox-dsp", .tx_id = 3, .rx_id = 2 },
+};
+
+static struct omap_mbox_pdata omap54xx_mbox_attrs = {
+ .intr_type = MBOX_INTR_CFG_TYPE2,
+ .info_cnt = ARRAY_SIZE(omap54xx_mbox_info),
+ .info = omap54xx_mbox_info,
+};
+
static struct omap_hwmod_irq_info omap54xx_mailbox_irqs[] = {
{ .irq = 26 + OMAP54XX_IRQ_GIC_START },
{ .irq = -1 }
.context_offs = OMAP54XX_RM_L4CFG_MAILBOX_CONTEXT_OFFSET,
},
},
+ .dev_attr = &omap54xx_mbox_attrs,
};
/*
},
};
+static struct resource omap54xx_sata_phy_addrs[] = {
+ {
+ .name = "sata_phy_rx",
+ .start = 0x4A096000,
+ .end = 0x4A096080,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "sata_phy_tx",
+ .start = 0x4A096400,
+ .end = 0x4A096464,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "sata_pll",
+ .start = 0x4A096800,
+ .end = 0x4A096840,
+ .flags = IORESOURCE_MEM,
+ },
+ { }
+};
+
+static struct omap_ocp2scp_dev ocp2scp3_dev_attr[] = {
+ {
+ .drv_name = "omap-sata",
+ .res = omap54xx_sata_phy_addrs,
+ },
+ { }
+};
+
+/* ocp2scp3 */
+static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
+static struct omap_hwmod_addr_space omap54xx_ocp2scp3_addrs[] = {
+ {
+ .name = "ocp2scp3",
+ .pa_start = 0x4a090000,
+ .pa_end = 0x4a09001f,
+ .flags = ADDR_TYPE_RT
+ },
+ { }
+};
+
+/* l4_cfg -> ocp2scp3 */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
+ .master = &omap54xx_l4_cfg_hwmod,
+ .slave = &omap54xx_ocp2scp3_hwmod,
+ .clk = "l4_root_clk_div",
+ .addr = omap54xx_ocp2scp3_addrs,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
+ .name = "ocp2scp3",
+ .class = &omap54xx_ocp2scp_hwmod_class,
+ .clkdm_name = "l3init_clkdm",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+ .context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
+ },
+ },
+ .dev_attr = ocp2scp3_dev_attr,
+};
+
/*
* 'sata' class
* sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
/* usb_host_hs */
static struct omap_hwmod_irq_info omap54xx_usb_host_hs_irqs[] = {
- { .name = "ohci", .irq = 76 + OMAP54XX_IRQ_GIC_START },
- { .name = "ehci", .irq = 77 + OMAP54XX_IRQ_GIC_START },
+ { .name = "ohci-irq", .irq = 76 + OMAP54XX_IRQ_GIC_START },
+ { .name = "ehci-irq", .irq = 77 + OMAP54XX_IRQ_GIC_START },
{ .irq = -1 }
};
};
static struct omap_hwmod_addr_space omap54xx_aess_addrs[] = {
- {
- .name = "dmem",
- .pa_start = 0x40180000,
- .pa_end = 0x4018ffff,
- },
- {
- .name = "cmem",
- .pa_start = 0x401a0000,
- .pa_end = 0x401a1fff,
- },
- {
- .name = "smem",
- .pa_start = 0x401c0000,
- .pa_end = 0x401c5fff,
- },
- {
- .name = "pmem",
- .pa_start = 0x401e0000,
- .pa_end = 0x401e1fff,
- },
{
.name = "aess",
.pa_start = 0x401f1000,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_aess_dma_addrs[] = {
- {
- .name = "dmem_dma",
- .pa_start = 0x49080000,
- .pa_end = 0x4908ffff,
- },
- {
- .name = "cmem_dma",
- .pa_start = 0x490a0000,
- .pa_end = 0x490a1fff,
- },
- {
- .name = "smem_dma",
- .pa_start = 0x490c0000,
- .pa_end = 0x490c5fff,
- },
- {
- .name = "pmem_dma",
- .pa_start = 0x490e0000,
- .pa_end = 0x490e1fff,
- },
- {
- .name = "aess_dma",
- .pa_start = 0x490f1000,
- .pa_end = 0x490f13ff,
- },
- { }
-};
-
-/* l4_abe -> aess (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__aess_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_aess_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_aess_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
-/* l3_main_2 -> bb2d */
-static struct omap_hwmod_ocp_if omap54xx_l3_main_2__bb2d = {
- .master = &omap54xx_l3_main_2_hwmod,
- .slave = &omap54xx_bb2d_hwmod,
- .clk = "l3_iclk_div",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
static struct omap_hwmod_addr_space omap54xx_c2c_addrs[] = {
{
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_dmic_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x4902e000,
- .pa_end = 0x4902e07f,
- },
- { }
-};
-
-/* l4_abe -> dmic (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__dmic_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_dmic_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_dmic_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
/* l4_cfg -> dsp */
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__dsp = {
.master = &omap54xx_l4_cfg_hwmod,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_mcasp_dma_addrs[] = {
- {
- .name = "cfg_dma",
- .pa_start = 0x49028000,
- .pa_end = 0x490283ff,
- },
- {
- .name = "dat_dma",
- .pa_start = 0x4902a000,
- .pa_end = 0x4902a3ff,
- },
- { }
-};
-
-/* l4_abe -> mcasp (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcasp_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_mcasp_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_mcasp_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_mcbsp1_addrs[] = {
{
.name = "mpu",
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_mcbsp1_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49022000,
- .pa_end = 0x490220ff,
- },
- { }
-};
-
-/* l4_abe -> mcbsp1 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcbsp1_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_mcbsp1_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_mcbsp1_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_mcbsp2_addrs[] = {
{
.name = "mpu",
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_mcbsp2_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49024000,
- .pa_end = 0x490240ff,
- },
- { }
-};
-
-/* l4_abe -> mcbsp2 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcbsp2_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_mcbsp2_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_mcbsp2_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_mcbsp3_addrs[] = {
{
.name = "mpu",
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_mcbsp3_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49026000,
- .pa_end = 0x490260ff,
- },
- { }
-};
-
-/* l4_abe -> mcbsp3 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcbsp3_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_mcbsp3_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_mcbsp3_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_mcpdm_addrs[] = {
{
.name = "mpu",
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_mcpdm_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49032000,
- .pa_end = 0x4903207f,
- },
- { }
-};
-
-/* l4_abe -> mcpdm (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__mcpdm_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_mcpdm_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_mcpdm_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_mcspi1_addrs[] = {
{
.pa_start = 0x48098000,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_slimbus1_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x4902c000,
- .pa_end = 0x4902c3ff,
- },
- { }
-};
-
-/* l4_abe -> slimbus1 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__slimbus1_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_slimbus1_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_slimbus1_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_smartreflex_core_addrs[] = {
{
.pa_start = 0x4a0dd000,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_timer5_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49038000,
- .pa_end = 0x4903807f,
- },
- { }
-};
-
-/* l4_abe -> timer5 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__timer5_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_timer5_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_timer5_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_timer6_addrs[] = {
{
.name = "mpu",
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_timer6_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x4903a000,
- .pa_end = 0x4903a07f,
- },
- { }
-};
-
-/* l4_abe -> timer6 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__timer6_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_timer6_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_timer6_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_timer7_addrs[] = {
{
.name = "mpu",
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_timer7_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x4903c000,
- .pa_end = 0x4903c07f,
- },
- { }
-};
-
-/* l4_abe -> timer7 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__timer7_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_timer7_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_timer7_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_timer8_addrs[] = {
{
.name = "mpu",
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_timer8_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x4903e000,
- .pa_end = 0x4903e07f,
- },
- { }
-};
-
-/* l4_abe -> timer8 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__timer8_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_timer8_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_timer8_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap54xx_timer9_addrs[] = {
{
.pa_start = 0x4803e000,
{
.name = "tll",
.pa_start = 0x4a062000,
- .pa_end = 0x4a0627ff,
+ .pa_end = 0x4a062fff,
.flags = ADDR_TYPE_RT
},
- {
- .name = "ulpi",
- .pa_start = 0x4a062800,
- .pa_end = 0x4a062bff,
- },
{ }
};
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap54xx_wd_timer3_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49030000,
- .pa_end = 0x4903007f,
- },
- { }
-};
-
-/* l4_abe -> wd_timer3 (dma) */
-static struct omap_hwmod_ocp_if omap54xx_l4_abe__wd_timer3_dma = {
- .master = &omap54xx_l4_abe_hwmod,
- .slave = &omap54xx_wd_timer3_hwmod,
- .clk = "abe_iclk",
- .addr = omap54xx_wd_timer3_dma_addrs,
- .user = OCP_USER_SDMA,
-};
-
static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
&omap54xx_l3_main_1__dmm,
&omap54xx_dmm__emif_ocp_fw,
&omap54xx_l3_main_3__ocp_wp_noc,
&omap54xx_l4_cfg__ocp_wp_noc,
&omap54xx_l4_abe__aess,
- &omap54xx_l4_abe__aess_dma,
&omap54xx_l3_main_2__bb2d,
&omap54xx_l3_main_2__c2c,
&omap54xx_l4_wkup__counter_32k,
&omap54xx_l4_wkup__ctrl_module_wkup,
&omap54xx_l4_cfg__dma_system,
&omap54xx_l4_abe__dmic,
- &omap54xx_l4_abe__dmic_dma,
&omap54xx_l4_cfg__dsp,
&omap54xx_l3_main_2__dss,
&omap54xx_l3_main_2__dss_dispc,
&omap54xx_l4_wkup__kbd,
&omap54xx_l4_cfg__mailbox,
&omap54xx_l4_abe__mcasp,
- &omap54xx_l4_abe__mcasp_dma,
&omap54xx_l4_abe__mcbsp1,
- &omap54xx_l4_abe__mcbsp1_dma,
&omap54xx_l4_abe__mcbsp2,
- &omap54xx_l4_abe__mcbsp2_dma,
&omap54xx_l4_abe__mcbsp3,
- &omap54xx_l4_abe__mcbsp3_dma,
&omap54xx_l4_abe__mcpdm,
- &omap54xx_l4_abe__mcpdm_dma,
&omap54xx_l4_per__mcspi1,
&omap54xx_l4_per__mcspi2,
&omap54xx_l4_per__mcspi3,
&omap54xx_l4_cfg__mpu,
&omap54xx_l3_main_2__ocmc_ram,
&omap54xx_l4_cfg__ocp2scp1,
+ &omap54xx_l4_cfg__ocp2scp3,
&omap54xx_l4_cfg__sata,
&omap54xx_l4_wkup__scrm,
&omap54xx_l4_abe__slimbus1,
- &omap54xx_l4_abe__slimbus1_dma,
&omap54xx_l4_cfg__smartreflex_core,
&omap54xx_l4_cfg__smartreflex_mm,
&omap54xx_l4_cfg__smartreflex_mpu,
&omap54xx_l4_per__timer3,
&omap54xx_l4_per__timer4,
&omap54xx_l4_abe__timer5,
- &omap54xx_l4_abe__timer5_dma,
&omap54xx_l4_abe__timer6,
- &omap54xx_l4_abe__timer6_dma,
&omap54xx_l4_abe__timer7,
- &omap54xx_l4_abe__timer7_dma,
&omap54xx_l4_abe__timer8,
- &omap54xx_l4_abe__timer8_dma,
&omap54xx_l4_per__timer9,
&omap54xx_l4_per__timer10,
&omap54xx_l4_per__timer11,
&omap54xx_l4_cfg__usb_tll_hs,
&omap54xx_l4_wkup__wd_timer2,
&omap54xx_l4_abe__wd_timer3,
- &omap54xx_l4_abe__wd_timer3_dma,
NULL,
};