arm: dra7: hwmod: remove opt clks enable flag from hwmod

[android-sdk/kernel-video.git] / arch / arm / mach-omap2 / omap_hwmod_7xx_data.c

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index aa2bf0ac8eef1cc8236473906a08715904909b1f..77803511fbc7141444d2fdcc46dadcb498e10f1f 100644 (file)
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -879,7 +879,6 @@ static struct omap_hwmod dra7xx_dss_hwmod = {
        .name           = "dss_core",
        .class          = &dra7xx_dss_hwmod_class,
        .clkdm_name     = "dss_clkdm",
-       .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
        .sdma_reqs      = dra7xx_dss_sdma_reqs,
        .main_clk       = "dss_dss_clk",
        .prcm = {
@@ -1312,8 +1311,7 @@ static struct omap_hwmod_class_sysconfig dra7xx_gpmc_sysc = {
        .syss_offs      = 0x0014,
        .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
                           SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
-       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
-                          SIDLE_SMART_WKUP),
+       .idlemodes      = SIDLE_FORCE | SIDLE_NO | SIDLE_SMART,
        .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -1328,8 +1326,6 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
        .name           = "gpmc",
        .class          = &dra7xx_gpmc_hwmod_class,
        .clkdm_name     = "l3main1_clkdm",
-       .flags          = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
-                          HWMOD_SWSUP_SIDLE),
        .main_clk       = "l3_iclk_div",
        .prcm = {
                .omap4 = {
@@ -1940,6 +1936,22 @@ static struct omap_hwmod dra7xx_mcasp7_hwmod = {
                .omap4 = {
                        .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP7_CLKCTRL_OFFSET,
                        .context_offs = DRA7XX_RM_L4PER2_MCASP7_CONTEXT_OFFSET,
+                       .modulemode = MODULEMODE_SWCTRL,
+               },
+       },
+};
+
+/* mcasp8 */
+static struct omap_hwmod dra7xx_mcasp8_hwmod = {
+       .name           = "mcasp8",
+       .class          = &dra7xx_mcasp_hwmod_class,
+       .clkdm_name     = "l4per2_clkdm",
+       .main_clk       = "mcasp8_ahclkx_mux",
+       .flags          = HWMOD_SWSUP_SIDLE_ACT,
+       .prcm = {
+               .omap4 = {
+                       .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP8_CLKCTRL_OFFSET,
+                       .context_offs = DRA7XX_RM_L4PER2_MCASP8_CONTEXT_OFFSET,
                        .modulemode   = MODULEMODE_SWCTRL,
                },
        },
@@ -3677,6 +3689,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp7 = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per2 -> mcasp8 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp8 = {
+       .master         = &dra7xx_l4_per2_hwmod,
+       .slave          = &dra7xx_mcasp8_hwmod,
+       .clk            = "l3_iclk_div",
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_addr_space dra7xx_elm_addrs[] = {
        {
                .pa_start       = 0x48078000,
@@ -4684,6 +4704,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
        &dra7xx_l4_per2__mcasp3,
        &dra7xx_l4_per2__mcasp6,
        &dra7xx_l4_per2__mcasp7,
+       &dra7xx_l4_per2__mcasp8,
        &dra7xx_l4_per1__elm,
        &dra7xx_l4_wkup__gpio1,
        &dra7xx_l4_per1__gpio2,