author | Praneeth Bajjuri <praneeth@ti.com> | |
Fri, 18 Mar 2016 22:45:56 +0000 (17:45 -0500) | ||
committer | Praneeth Bajjuri <praneeth@ti.com> | |
Fri, 18 Mar 2016 22:45:56 +0000 (17:45 -0500) | ||
commit | 1159c452bac00d64b711ed7384d6e5ee9d20d38c | |
tree | ab603933985ba293e2b714ec1de56cd597e2a48b | tree | snapshot (tar.xz tar.gz zip) |
parent | 967b38f390945064adacc396e0c7eb82666fff62 | commit | diff |
parent | 7a9ce2cdb5492362670cd58b30ae40ee2db14279 | commit | diff |
Merge branch 'p-ti-linux-3.14.y-common' into p-ti-linux-3.14.y-android
* p-ti-linux-3.14.y-common:
pm: dra7: Restrict vip/vpe power domain state to INA
pm: dra7: Update power domain states as per new spec
ARM: OMAP: DRA7: powerdomain data: Remove CSWR with the exception of MPU
ARM: OMAP: DRA7: powerdomain data: Fix "ON" state for memories
ARM: OMAP: DRA7: powerdomain data: Remove wrong OSWR capability
ARM: dts: dra7-evm: mmc: fix typos in register names and values
Change-Id: I3a327104320949e44fd891d790f145e3d27ff0b1
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* p-ti-linux-3.14.y-common:
pm: dra7: Restrict vip/vpe power domain state to INA
pm: dra7: Update power domain states as per new spec
ARM: OMAP: DRA7: powerdomain data: Remove CSWR with the exception of MPU
ARM: OMAP: DRA7: powerdomain data: Fix "ON" state for memories
ARM: OMAP: DRA7: powerdomain data: Remove wrong OSWR capability
ARM: dts: dra7-evm: mmc: fix typos in register names and values
Change-Id: I3a327104320949e44fd891d790f145e3d27ff0b1
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
arch/arm/boot/dts/dra7-evm.dts | diff1 | | diff2 | | blob | history |