| author | Archit Taneja <archit@ti.com> | |
| Wed, 5 Jun 2013 05:46:53 +0000 (11:16 +0530) | ||
| committer | Archit Taneja <archit@ti.com> | |
| Wed, 5 Jun 2013 07:14:31 +0000 (12:44 +0530) | ||
| commit | 7250753a7153133a0c3750f4a6f0670000bf4d8c | |
| tree | ffac9103bac25e82e5ac9745ac379097e28c5e80 | tree | snapshot (tar.xz tar.gz zip) |
| parent | e51ff8ae127ff81eb1285908aa382a4d9daa1d23 | commit | diff |
omapdss: DSS DPLLs: Ignore PLL_PWR_STATUS on DRA7
There is a Vayu bug(VAYU-BUG02893) which prevents the correct update of
PLL_PWR_STATUS when the power state of DPLL_VIDEO1/2 is changed. Currently, the
driver reports the error but still proceeds ahead. Modify the code such that we
don't read the buggy field at all and adds a small delay for the power state to
change.
Signed-off-by: Archit Taneja <archit@ti.com>
There is a Vayu bug(VAYU-BUG02893) which prevents the correct update of
PLL_PWR_STATUS when the power state of DPLL_VIDEO1/2 is changed. Currently, the
driver reports the error but still proceeds ahead. Modify the code such that we
don't read the buggy field at all and adds a small delay for the power state to
change.
Signed-off-by: Archit Taneja <archit@ti.com>
| drivers/video/omap2/dss/dss_dpll.c | diff | blob | history |