| author | Vignesh R <vigneshr@ti.com> | |
| Thu, 26 Feb 2015 08:40:40 +0000 (14:10 +0530) | ||
| committer | Lokesh Vutla <lokeshvutla@ti.com> | |
| Thu, 26 Feb 2015 08:55:00 +0000 (14:25 +0530) | ||
| commit | 9135fa4dcea3e0e96e2cd73f43cb64b2b3acf427 | |
| tree | b6c3381b9908c3460d3c256fae2faa0aa95603d1 | tree | snapshot (tar.xz tar.gz zip) |
| parent | 0cd6f5d5f050b23a638baab4722670d89d5a26c9 | commit | diff |
ARM: OMAP: DRA7xx: Add clocks for PWMSS
PWMSS does not seem to support smart idle mode when clockdomain
"l4per2_clkdm" is in HW_AUTO. Hence, configuring l4per2_clkdm to
SW_WKUP.
EHRPWM has a TBCLK which is enabled by writing into CTRL_CORE_IO_2. This
clock is derived from the same clock that drives PWMSS. Hence adding
ehrpwmx_tbclk nodes.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
PWMSS does not seem to support smart idle mode when clockdomain
"l4per2_clkdm" is in HW_AUTO. Hence, configuring l4per2_clkdm to
SW_WKUP.
EHRPWM has a TBCLK which is enabled by writing into CTRL_CORE_IO_2. This
clock is derived from the same clock that drives PWMSS. Hence adding
ehrpwmx_tbclk nodes.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| arch/arm/boot/dts/dra7xx-clocks.dtsi | diff | blob | history | |
| arch/arm/mach-omap2/clockdomains7xx_data.c | diff | blob | history | |
| drivers/clk/ti/clk-7xx.c | diff | blob | history |