| author | Suman Anna <s-anna@ti.com> | |
| Fri, 15 May 2015 16:00:35 +0000 (11:00 -0500) | ||
| committer | Suman Anna <s-anna@ti.com> | |
| Sun, 17 May 2015 17:52:50 +0000 (12:52 -0500) | ||
| commit | eae39f854e3c2da52ffe881c434af4847c8dd2b7 | |
| tree | f3a6cd43c9a1a8cd008dcaf4a540394d414c8c77 | tree | snapshot (tar.xz tar.gz zip) |
| parent | f6ada8999b01e61b4bbc8791b3ce503aeeb67f87 | commit | diff |
ARM: OMAP2+: Add iommu pdata-quirks for DRA7 DSP EDMA MMUs
The DSP processor subsystems in DRA7xx have two MMUs, one for the
processor port and another for an EDMA port. Both these MMUs share
a common reset line, and the reset management is done through the
pdata quirks for the MMU associated with the processor port, so the
DSP EDMA MMUs didn't need any pdata ops. The OMAP IOMMU driver now
requires the device_enable/idle platform data ops on all the IOMMU
devices to be able to enable/disable the clocks and maintain the
reference count and the omap_hwmod state machine. So, add the iommu
pdata quirks for the DSP EDMA MMUs.
Signed-off-by: Suman Anna <s-anna@ti.com>
The DSP processor subsystems in DRA7xx have two MMUs, one for the
processor port and another for an EDMA port. Both these MMUs share
a common reset line, and the reset management is done through the
pdata quirks for the MMU associated with the processor port, so the
DSP EDMA MMUs didn't need any pdata ops. The OMAP IOMMU driver now
requires the device_enable/idle platform data ops on all the IOMMU
devices to be able to enable/disable the clocks and maintain the
reference count and the omap_hwmod state machine. So, add the iommu
pdata quirks for the DSP EDMA MMUs.
Signed-off-by: Suman Anna <s-anna@ti.com>
| arch/arm/mach-omap2/pdata-quirks.c | diff | blob | history |