Merge remote-tracking branch 'origin/omaplfb' into p-ti-android-3.8.y-video
authorPraneeth Bajjuri <praneeth@ti.com>
Fri, 26 Jul 2013 01:52:18 +0000 (20:52 -0500)
committerPraneeth Bajjuri <praneeth@ti.com>
Fri, 26 Jul 2013 01:54:21 +0000 (20:54 -0500)
This contains GC320 series

* origin/omaplfb:
  ARM: OMAP5/DRA7: hwmod: add ADDR_TYPE_RT to bb2d address flags
  gc320: gcx: [WA] Allocate MMU page tables as non cached
  gc320: Added  missing programming of MTLB base second time
  gc320: Increase VRAM buffers to 4
  gc320: adding gcxxx support in Makefiles
  gc320: Adapt GC320 driver for K3.8
  devices: Initialize GC320 as part of devices init
  platform_data: Added platform data for GC320
  gc320: OMAP4: Adding cache-2dmanager

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
1  2 
arch/arm/mach-omap2/omap_hwmod_7xx_data.c

index e8d09dfbaf6ca88b268ebba23f4a54139b34ae4c,29d7ee61f3caa33e6ea0251f7f5ce8b0bbe40daf..1976fc952c506c39cb29902792f8d55002a7b5ce
@@@ -1039,47 -1039,6 +1039,47 @@@ static struct omap_hwmod dra7xx_gpmc_hw
        },
  };
  
 +/*
 + * 'gpu' class
 + * 2d/3d graphics accelerator
 + */
 +
 +static struct omap_hwmod_class_sysconfig dra7xx_gpu_sysc = {
 +      .rev_offs       = 0x0000,
 +      .sysc_offs      = 0x0010,
 +      .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
 +      .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
 +                         SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
 +                         MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
 +      .sysc_fields    = &omap_hwmod_sysc_type2,
 +};
 +
 +static struct omap_hwmod_class dra7xx_gpu_hwmod_class = {
 +      .name   = "gpu",
 +      .sysc   = &dra7xx_gpu_sysc,
 +};
 +
 +/* gpu */
 +static struct omap_hwmod_irq_info dra7xx_gpu_irqs[] = {
 +      { .irq = 21 + DRA7XX_IRQ_GIC_START },
 +      { .irq = -1 }
 +};
 +
 +static struct omap_hwmod dra7xx_gpu_hwmod = {
 +      .name           = "gpu",
 +      .class          = &dra7xx_gpu_hwmod_class,
 +      .clkdm_name     = "gpu_clkdm",
 +      .mpu_irqs       = dra7xx_gpu_irqs,
 +      .main_clk       = "gpu_core_gclk_mux",
 +      .prcm = {
 +              .omap4 = {
 +                      .clkctrl_offs = DRA7XX_CM_GPU_GPU_CLKCTRL_OFFSET,
 +                      .context_offs = DRA7XX_RM_GPU_GPU_CONTEXT_OFFSET,
 +                      .modulemode   = MODULEMODE_SWCTRL,
 +              },
 +      },
 +};
 +
  /*
   * 'hdq1w' class
   *
@@@ -3801,6 -3760,7 +3801,7 @@@ static struct omap_hwmod_addr_space dra
        {
                .pa_start       = 0x59000000,
                .pa_end         = 0x590007ff,
+               .flags      = ADDR_TYPE_RT
        },
        { }
  };
@@@ -4206,45 -4166,6 +4207,45 @@@ static struct omap_hwmod_ocp_if dra7xx_
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
  };
  
 +static struct omap_hwmod_addr_space dra7xx_gpu_addrs[] = {
 +      {
 +              .name           = "klio",
 +              .pa_start       = 0x56000000,
 +              .pa_end         = 0x56001fff,
 +      },
 +      {
 +              .name           = "hydra2",
 +              .pa_start       = 0x56004000,
 +              .pa_end         = 0x56004fff,
 +      },
 +      {
 +              .name           = "klio_0",
 +              .pa_start       = 0x56008000,
 +              .pa_end         = 0x56009fff,
 +      },
 +      {
 +              .name           = "klio_1",
 +              .pa_start       = 0x5600c000,
 +              .pa_end         = 0x5600dfff,
 +      },
 +      {
 +              .name           = "klio_hl",
 +              .pa_start       = 0x5600fe00,
 +              .pa_end         = 0x5600ffff,
 +              .flags          = ADDR_TYPE_RT
 +      },
 +      { }
 +};
 +
 +/* l3_main_1 -> gpu */
 +static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpu = {
 +      .master         = &dra7xx_l3_main_1_hwmod,
 +      .slave          = &dra7xx_gpu_hwmod,
 +      .clk            = "gpu_l3_iclk",
 +      .addr           = dra7xx_gpu_addrs,
 +      .user           = OCP_USER_MPU | OCP_USER_SDMA,
 +};
 +
  static struct omap_hwmod_addr_space dra7xx_hdq1w_addrs[] = {
        {
                .pa_start       = 0x480b2000,
@@@ -6202,7 -6123,6 +6203,7 @@@ static struct omap_hwmod_ocp_if *dra7xx
        &dra7xx_l4_per1__gpio7,
        &dra7xx_l4_per1__gpio8,
        &dra7xx_l3_main_1__gpmc,
 +      &dra7xx_l3_main_1__gpu,
        &dra7xx_l4_per1__hdq1w,
        &dra7xx_l4_per1__i2c1,
        &dra7xx_l4_per1__i2c2,