Merge remote-tracking branch 'origin/omaplfb' into p-ti-android-3.8.y-video
authorPraneeth Bajjuri <praneeth@ti.com>
Fri, 26 Jul 2013 01:52:18 +0000 (20:52 -0500)
committerPraneeth Bajjuri <praneeth@ti.com>
Fri, 26 Jul 2013 01:54:21 +0000 (20:54 -0500)
This contains GC320 series

* origin/omaplfb:
  ARM: OMAP5/DRA7: hwmod: add ADDR_TYPE_RT to bb2d address flags
  gc320: gcx: [WA] Allocate MMU page tables as non cached
  gc320: Added  missing programming of MTLB base second time
  gc320: Increase VRAM buffers to 4
  gc320: adding gcxxx support in Makefiles
  gc320: Adapt GC320 driver for K3.8
  devices: Initialize GC320 as part of devices init
  platform_data: Added platform data for GC320
  gc320: OMAP4: Adding cache-2dmanager

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
31 files changed:
Documentation/devicetree/bindings/usb/dwc3.txt
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/dra7-evm.dts
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/omap5-sevm.dts [deleted file]
arch/arm/boot/dts/omap5.dtsi
arch/arm/configs/android_dra7_defconfig
arch/arm/configs/android_omap5_defconfig
arch/arm/configs/omap2plus_defconfig
arch/arm/mach-omap2/cclock7xx_data.c
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
drivers/base/power/opp.c
drivers/clk/omap/clk.c
drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h
drivers/usb/dwc3/gadget.c
drivers/usb/phy/Makefile
drivers/usb/phy/of.c [new file with mode: 0644]
drivers/usb/phy/omap-usb3.c
drivers/usb/usb-common.c
drivers/video/omap2/dss/Kconfig [changed mode: 0644->0755]
drivers/video/omap2/dss/dss.c [changed mode: 0644->0755]
drivers/video/omap2/dss/dss.h [changed mode: 0644->0755]
drivers/video/omap2/dss/hdmi.c [changed mode: 0644->0755]
drivers/video/omap2/dss/hdmi_panel.c [changed mode: 0644->0755]
drivers/video/omap2/dss/ti_hdmi.h [changed mode: 0644->0755]
include/linux/omapfb.h [changed mode: 0644->0755]
include/linux/usb/of.h [new file with mode: 0644]
include/linux/usb/otg.h
include/linux/usb/phy.h
include/video/omapdss.h

index 7a95c651ceb3b20f82bd0940aed222cc1e3be5c6..2fd123e383bcedc4186db7837e33e71a221669a1 100644 (file)
@@ -10,7 +10,16 @@ Required properties:
 
 Optional properties:
  - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
-
+ - dr_mode: tells Dual-Role USB controllers that we want to work on a
+                       particular mode. Valid arguments are "host",
+                       "peripheral" and "otg". In case this attribute isn't
+                       passed via DT, USB DRD controllers should default to
+                       OTG.
+- maximum-speed: tells USB controllers we want to work up to a certain
+                       speed. Valid arguments are "superspeed", "highspeed",
+                       "fullspeed" and "lowspeed". In case this isn't passed
+                       via DT, USB controllers should default to their maximum
+                       HW capability.
 This is usually a subnode to DWC3 glue to which it is connected.
 
 dwc3@4a030000 {
index 101fed319815346ee54a96bae8f30fd0131a9ffa..a5c6e2af6ad85870281dc1ce282fd4a628cb42cc 100644 (file)
@@ -112,7 +112,6 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
        omap4-var-som.dtb \
        omap4-sdp.dtb \
        omap5-uevm.dtb \
-       omap5-sevm.dtb \
        am335x-evm.dtb \
        am335x-evmsk.dtb \
        am335x-bone.dtb \
index 435024659b366fadce9d1ffde56b3a5a5a76b44b..e6ab292d9c78373a02bc6da289a74fcd5a927ef9 100755 (executable)
                /*15 MB*/
                ti,omap_ion_heap_nonsecure_tiler_size = <0xF00000>;
        };
+
+       ocp {
+               gpu: gpu@0x56000000 {
+               gpu-supply = <&avs_gpu>;
+               };
+       };
 };
 
 &dra7_pmx_core {
index 659b3b766312822feae18f3c702418a4b5172151..def635612de097260532a7c02522c558205d1333 100644 (file)
                        compatible = "arm,cortex-a15";
                        operating-points = <
                                /* kHz    uV */
-                               /* The OPP_HIGH Only for DVFS enabled Samples Hence commenting*/
+                               /* The OPP_HIGH Only for DVFS enabled Samples */
                                1000000 1090000
-                               /*      1176000 1210000         */
+                               1176000 1210000
                                >;
-                               clocks = <&dpll_mpu>;
+                               clocks = <&dpll_mpu_ck>;
                                clock-names = "cpu";
                        timer {
                                compatible = "arm,armv7-timer";
                        pinctrl-single,function-mask = <0x3fffffff>;
                };
 
-               dpll_mpu: dpll_mpu {
+               dpll_mpu_ck: dpll_mpu_ck {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap-clock";
+               };
+
+               dpll_gpu_m2_ck: dpll_gpu_m2_ck {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap-clock";
+               };
+
+               dpll_core_h14x2_ck: dpll_core_h14x2_ck {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap-clock";
+               };
+
+               dpll_per_h14x2_ck: dpll_per_h14x2_ck {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap-clock";
+               };
+
+               gpu_core_gclk_mux: gpu_core_gclk_mux {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap-clock";
+               };
+
+               gpu_hyd_gclk_mux: gpu_hyd_gclk_mux {
                        #clock-cells = <0>;
                        compatible = "ti,omap-clock";
                };
                        ti,hwmods = "dmm";
                };
 
+               gpu: gpu@0x56000000 {
+                       compatible = "ti,omap4-gpu";
+                       reg = <0x56000000 0xffff>;
+                       interrupts = <0 21 0x4>;
+                       ti,hwmods = "gpu";
+                       operating-points = <
+                               /* kHz    uV */
+                               425600  1090000
+                               500000  1210000
+                               532000  1280000
+                               >;
+                       clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>,
+                                       <&dpll_gpu_m2_ck>, <&gpu_core_gclk_mux>,
+                                       <&gpu_hyd_gclk_mux>;
+                       clock-names = "core", "per", "gpu", "gpu_core", "gpu_hyd";
+               };
+
                bandgap {
                        reg = <0x4a0021e0 0xc
                                0x4a00232c 0xc
diff --git a/arch/arm/boot/dts/omap5-sevm.dts b/arch/arm/boot/dts/omap5-sevm.dts
deleted file mode 100644 (file)
index 9d9bbb6..0000000
+++ /dev/null
@@ -1,522 +0,0 @@
-/*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-
-/include/ "omap5.dtsi"
-/include/ "samsung_k3pe0e000b.dtsi"
-
-/ {
-       model = "TI OMAP5 sEVM board";
-       compatible = "ti,omap5-sevm", "ti,omap5";
-
-       cpus {
-               cpu@0 {
-                       cpu0-supply = <&smps123_reg>;
-               };
-       };
-
-       memory {
-               device_type = "memory";
-               reg = <0x80000000 0x7F000000>; /* 2032 MB */
-       };
-
-       vmmcsd_fixed: fixedregulator-mmcsd {
-               compatible = "regulator-fixed";
-               regulator-name = "vmmcsd_fixed";
-               regulator-min-microvolt = <3000000>;
-               regulator-max-microvolt = <3000000>;
-       };
-
-       /* HS USB Port 2 RESET */
-       hsusb2_reset: hsusb2_reset_reg {
-               compatible = "regulator-fixed";
-               regulator-name = "hsusb2_reset";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&gpio6 13 0>;   /* gpio6_173 HUB_NRESET */
-               startup-delay-us = <70000>;
-               enable-active-high;
-       };
-
-       /* HS USB Host PHY on PORT 2 */
-       hsusb2_phy: hsusb2_phy {
-               compatible = "usb-nop-xceiv";
-               reset-supply = <&hsusb2_reset>;
-       };
-
-       /* HS USB Port 3 RESET */
-       hsusb3_reset: hsusb3_reset_reg {
-               compatible = "regulator-fixed";
-               regulator-name = "hsusb3_reset";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&gpio6 12 0>;   /* gpio6_172 ETH_NRESET */
-               startup-delay-us = <70000>;
-               enable-active-high;
-       };
-
-       /* HS USB Host PHY on PORT 3 */
-       hsusb3_phy: hsusb3_phy {
-               compatible = "usb-nop-xceiv";
-               reset-supply = <&hsusb3_reset>;
-       };
-
-       sound {
-               compatible = "ti,abe-twl6040";
-               ti,model = "OMAP5-sEVM";
-
-               ti,jack-detection = <1>;
-               ti,mclk-freq = <19200000>;
-
-               ti,mcpdm = <&mcpdm>;
-               ti,dmic = <&dmic>;
-               ti,mcasp = <&mcasp>;
-               ti,mcbsp1 = <&mcbsp1>;
-               ti,mcbsp2 = <&mcbsp2>;
-               ti,aess = <&aess>;
-
-               ti,twl6040 = <&twl6040>;
-
-               /* Audio routing */
-               ti,audio-routing =
-                       "Headset Stereophone", "HSOL",
-                       "Headset Stereophone", "HSOR",
-                       "Earphone Spk", "EP",
-                       "Ext Spk", "HFL",
-                       "Ext Spk", "HFR",
-                       "Line Out", "AUXL",
-                       "Line Out", "AUXR",
-                       "HSMIC", "Headset Mic",
-                       "Headset Mic", "Headset Mic Bias",
-                       "MAINMIC", "Main Handset Mic",
-                       "Main Handset Mic", "Main Mic Bias",
-                       "SUBMIC", "Sub Handset Mic",
-                       "Sub Handset Mic", "Main Mic Bias",
-                       "AFML", "Line In",
-                       "AFMR", "Line In",
-                       "DMic", "Digital Mic",
-                       "Digital Mic", "Digital Mic1 Bias",
-                       "Headset Playback", "PDM_DL1",
-                       "Handsfree Playback", "PDM_DL2",
-                       "PDM_UL1", "Capture",
-                       "40122000.mcbsp Playback", "BT_VX_DL",
-                       "BT_VX_UL", "40122000.mcbsp Capture",
-                       "40124000.mcbsp Playback", "MM_EXT_DL",
-                       "MM_EXT_UL", "40124000.mcbsp Capture",
-                       "DMIC0", "omap-dmic-abe.0 Capture",
-                       "omap-dmic-abe.0 Capture", "Digital Mic1 Bias",
-                       "Digital Mic1 Bias", "Digital Mic 0",
-                       "DMIC1", "omap-dmic-abe.1 Capture",
-                       "omap-dmic-abe.1 Capture", "Digital Mic1 Bias",
-                       "Digital Mic1 Bias", "Digital Mic 1",
-                       "DMIC2", "omap-dmic-abe.2 Capture",
-                       "omap-dmic-abe.2 Capture", "Digital Mic1 Bias",
-                       "Digital Mic1 Bias", "Digital Mic 2";
-       };
-
-       sound_hdmi {
-               compatible = "ti,omap-hdmi-tpd12s015-audio";
-               ti,model = "OMAP5HDMI";
-
-               ti,hdmi_audio = <&hdmi>;
-               ti,level_shifter = <&tpd12s015>;
-       };
-
-};
-
-&omap5_pmx_core {
-       pinctrl-names = "default";
-       pinctrl-0 = <
-                       &twl6040_pins
-                       &mcpdm_pins
-                       &dmic_pins
-                       &mcbsp1_pins
-                       &mcbsp2_pins
-                       &usbhost_pins
-                       &lg4591_pins
-                       &dss_hdmi_pins
-                       &tpd12s015_pins
-                       &tca6424a_pins
-       >;
-
-       mmc1_pins: pinmux_mmc1_pins {
-               pinctrl-single,pins = <
-                       0x1a2 0x118     /* sdcard_clk.sdcard_clk INPUT PULLUP | MODE0 */
-                       0x1a4 0x118     /* sdcard_cmd.sdcard_cmd INPUT PULLUP | MODE0 */
-                       0x1a6 0x118     /* sdcard_data2.sdcard_data2 INPUT PULLUP | MODE0 */
-                       0x1a8 0x118     /* sdcard_data3.sdcard_data3 INPUT PULLUP | MODE0 */
-                       0x1aa 0x118     /* sdcard_data0.sdcard_data0 INPUT PULLUP | MODE0 */
-                       0x1ac 0x118     /* sdcard_data1.sdcard_data1 INPUT PULLUP | MODE0 */
-               >;
-       };
-
-       mmc2_pins: pinmux_mmc2_pins {
-               pinctrl-single,pins = <
-                       0x0 0x118       /* emmc_clk.emmc_clk INPUT PULLUP | MODE0 */
-                       0x2 0x118       /* emmc_cmd.emmc_cmd INPUT PULLUP | MODE0 */
-                       0x4 0x118       /* emmc_data0.emmc_data0 INPUT PULLUP | MODE0 */
-                       0x6 0x118       /* emmc_data1.emmc_data1 INPUT PULLUP | MODE0 */
-                       0x8 0x118       /* emmc_data2.emmc_data2 INPUT PULLUP | MODE0 */
-                       0xa 0x118       /* emmc_data3.emmc_data3 INPUT PULLUP | MODE0 */
-                       0xc 0x118       /* emmc_data4.emmc_data4 INPUT PULLUP | MODE0 */
-                       0xe 0x118       /* emmc_data5.emmc_data5 INPUT PULLUP | MODE0 */
-                       0x10 0x118      /* emmc_data6.emmc_data6 INPUT PULLUP | MODE0 */
-                       0x12 0x118      /* emmc_data7.emmc_data7 INPUT PULLUP | MODE0 */
-               >;
-       };
-
-       twl6040_pins: pinmux_twl6040_pins {
-               pinctrl-single,pins = <
-                       0x18a 0x6       /* perslimbus2_clock.gpio5_145 OUTPUT | MODE6 */
-               >;
-       };
-
-       mcpdm_pins: pinmux_mcpdm_pins {
-               pinctrl-single,pins = <
-                       0x142 0x108     /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
-                       0x15c 0x108     /* abemcpdm_ul_data.abemcpdm_ul_data INPUT PULLDOWN | MODE0 */
-                       0x15e 0x108     /* abemcpdm_dl_data.abemcpdm_dl_data INPUT PULLDOWN | MODE0 */
-                       0x160 0x118     /* abemcpdm_frame.abemcpdm_frame INPUT PULLUP | MODE0 */
-                       0x162 0x108     /* abemcpdm_lb_clk.abemcpdm_lb_clk INPUT PULLDOWN | MODE0 */
-               >;
-       };
-
-       dmic_pins: pinmux_dmic_pins {
-               pinctrl-single,pins = <
-                       0x144 0x100     /* abedmic_din1.abedmic_din1 INPUT | MODE0 */
-                       0x146 0x100     /* abedmic_din2.abedmic_din2 INPUT | MODE0 */
-                       0x148 0x100     /* abedmic_din3.abedmic_din3 INPUT | MODE0 */
-                       0x14a 0         /* abedmic_clk1.abedmic_clk1 OUTPUT | MODE0 */
-               >;
-       };
-
-       mcbsp1_pins: pinmux_mcbsp1_pins {
-               pinctrl-single,pins = <
-                       0x14c 0x101     /* abedmic_clk2.abemcbsp1_fsx INPUT | MODE1 */
-                       0x14e 0x9       /* abedmic_clk3.abemcbsp1_dx OUTPUT PULLDOWN | MODE1 */
-                       0x150 0x101     /* abeslimbus1_clock.abemcbsp1_clkx INPUT | MODE0 */
-                       0x152 0x109     /* abeslimbus1_data.abemcbsp1_dr INPUT PULLDOWN | MODE1 */
-               >;
-       };
-
-       mcbsp2_pins: pinmux_mcbsp2_pins {
-               pinctrl-single,pins = <
-                       0x154 0x108     /* abemcbsp2_dr.abemcbsp2_dr INPUT PULLDOWN | MODE0 */
-                       0x156 0x8       /* abemcbsp2_dx.abemcbsp2_dx OUTPUT PULLDOWN | MODE0 */
-                       0x158 0x100     /* abemcbsp2_fsx.abemcbsp2_fsx INPUT | MODE0 */
-                       0x15a 0x100     /* abemcbsp2_clkx.abemcbsp2_clkx INPUT | MODE0 */
-               >;
-       };
-
-       usbhost_pins: pinmux_usbhost_pins {
-               pinctrl-single,pins = <
-                       0x84 0x100      /* usbb2_hsic_strobe INPUT | MODE 0 */
-                       0x86 0x100      /* usbb2_hsic_data INPUT | MODE 0 */
-
-                       0x19e 0x100     /* usbb3_hsic_strobe INPUT | MODE 0 */
-                       0x1a0 0x100     /* usbb3_hsic_data INPUT | MODE 0 */
-
-                       0xD4 0x6        /* gpio6_173 OUTPUT | MODE 6 HUB_NRESET */
-                       0xD6 0x6        /* gpio6_172 OUTPUT | MODE 6 ETH_NRESET */
-               >;
-       };
-
-        i2c1_pins: pinmux_i2c1_pins {
-                pinctrl-single,pins = <
-                        0x1b2 0x118        /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */
-                        0x1b4 0x118        /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */
-                >;
-        };
-
-       i2c2_pins: pinmux_i2c2_pins {
-               pinctrl-single,pins = <
-                       0x178 0x100        /* i2c2_scl INPUTENABLE | MODE0 */
-                       0x17a 0x100        /* i2c2_sda INPUTENABLE | MODE0 */
-               >;
-       };
-
-       i2c3_pins: pinmux_i2c3_pins {
-               pinctrl-single,pins = <
-                       0x13a 0x100        /* i2c3_scl INPUTENABLE | MODE0 */
-                       0x13c 0x100     /* i2c3_sda INPUTENABLE | MODE0 */
-               >;
-       };
-
-       i2c4_pins: pinmux_i2c4_pins {
-               pinctrl-single,pins = <
-                       0xb8 0x100        /* i2c4_scl INPUTENABLE | MODE0 */
-                       0xba 0x100     /* i2c4_sda INPUTENABLE | MODE0 */
-               >;
-       };
-
-       i2c5_pins: pinmux_i2c5_pins {
-               pinctrl-single,pins = <
-                       0x184 0x100        /* i2c5_scl INPUTENABLE | MODE0 */
-                       0x186 0x100     /* i2c5_sda INPUTENABLE | MODE0 */
-               >;
-       };
-
-       mcspi2_pins: pinmux_mcspi2_pins {
-               pinctrl-single,pins = <
-                       0xbc 0x100      /*  MCSPI2_CLK INPUTENABLE | MODE0 */
-                       0xbe 0x100      /*  MCSPI2_SIMO INPUTENABLE | MODE0 */
-                       0xc0 0x118      /*  MCSPI2_SOMI PULLUP | INPUTENABLE | MODE0*/
-                       0xc2 0x0        /*  MCSPI2_CS MODE0*/
-               >;
-       };
-
-       mcspi3_pins: pinmux_mcspi3_pins {
-               pinctrl-single,pins = <
-                       0x78 0x101      /*  MCSPI2_SOMI INPUTENABLE | MODE1 */
-                       0x7a 0x101      /*  MCSPI2_CS INPUTENABLE | MODE1 */
-                       0x7c 0x101      /*  MCSPI2_SIMO INPUTENABLE | MODE1 */
-                       0x7e 0x101      /*  MCSPI2_CLK INPUTENABLE | MODE1 */
-               >;
-       };
-
-       mcspi4_pins: pinmux_mcspi4_pins {
-               pinctrl-single,pins = <
-                       0x164 0x101     /*  MCSPI2_CLK INPUTENABLE | MODE1 */
-                       0x168 0x101     /*  MCSPI2_SIMO INPUTENABLE | MODE1 */
-                       0x16a 0x101     /*  MCSPI2_SOMI INPUTENABLE | MODE1 */
-                       0x16c 0x101     /*  MCSPI2_CS INPUTENABLE | MODE1 */
-               >;
-       };
-
-       lg4591_pins: pinmux_lg4591_pins {
-               pinctrl-single,pins = <
-                       0xf2 0x8        /* perslimbus2_clock.gpio6_183 OUTPUT PULLDOWN | MODE0 */
-               >;
-       };
-
-       dss_hdmi_pins: pinmux_dss_hdmi_pins {
-               pinctrl-single,pins = <
-                       0x0fc 0x118     /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
-                       0x100 0x118     /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
-                       0x102 0x118     /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
-               >;
-       };
-
-       tpd12s015_pins: pinmux_tpd12s015_pins {
-               pinctrl-single,pins = <
-                       0x0fe 0x116     /* hdmi_hpd.gpio7_193 INPUT PULLDOWN | MODE6 */
-               >;
-       };
-
-       tca6424a_pins: pinmux_tca6424a_pins {
-               pinctrl-single,pins = <
-                       0x186 0x100     /* i2c5_scl.i2c5_scl INPUT | MODE0 */
-                       0x188 0x100     /* i2c5_sda.i2c5_sda INPUT | MODE0 */
-               >;
-       };
-
-};
-
-&mmc1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&mmc1_pins>;
-       vmmc-supply = <&vmmcsd_fixed>;
-       vmmc-aux-supply = <&ldo9_reg>;
-       bus-width = <4>;
-       cd-gpios = <&gpio3 3 0>; /* gpio 67 */
-};
-
-&mmc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&mmc2_pins>;
-       vmmc-supply = <&vmmcsd_fixed>;
-       vmmc-aux-supply = <&ldo9_reg>;
-       bus-width = <8>;
-       ti,non-removable;
-};
-
-&mmc3 {
-       bus-width = <4>;
-       ti,non-removable;
-       status = "disabled";
-};
-
-&mmc4 {
-       status = "disabled";
-};
-
-&mmc5 {
-       status = "disabled";
-};
-
-&i2c1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c1_pins>;
-
-       clock-frequency = <400000>;
-};
-
-&i2c2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c2_pins>;
-
-       clock-frequency = <400000>;
-
-       /* Pressure Sensor */
-       bmp085@77 {
-               compatible = "bosch,bmp085";
-               reg = <0x77>;
-       };
-};
-
-&i2c3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c3_pins>;
-
-       clock-frequency = <400000>;
-};
-
-&i2c4 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c4_pins>;
-
-       clock-frequency = <400000>;
-
-       /* Temperature Sensor */
-       tmp102@48{
-               compatible = "ti,tmp102";
-               reg = <0x48>;
-       };
-};
-
-&i2c5 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c5_pins>;
-       clock-frequency = <400000>;
-
-       tca6424a: tca6424a@22 {
-               compatible = "ti,tca6424a";
-               reg = <0x22>;
-               gpio-controller;
-               #gpio-cells = <2>;
-       };
-};
-
-&keypad {
-       keypad,num-rows = <8>;
-       keypad,num-columns = <8>;
-       linux,keymap = <0x02020073      /* VOLUP */
-                       0x02030072      /* VOLDOWM */
-                       0x020400e7      /* SEND */
-                       0x02050066      /* HOME */
-                       0x0206006b      /* END */
-                       0x020700d9>;    /* SEARCH */
-       linux,input-no-autorepeat;
-};
-
-&mcbsp3 {
-       status = "disabled";
-};
-
-&emif1 {
-       cs1-used;
-       device-handle = <&samsung_K3PE0E000B>;
-};
-
-&emif2 {
-       cs1-used;
-       device-handle = <&samsung_K3PE0E000B>;
-};
-
-&usbhshost {
-       port2-mode = "ehci-hsic";
-       port3-mode = "ehci-hsic";
-};
-
-&usbhsehci {
-       phys = <0 &hsusb2_phy &hsusb3_phy>;
-};
-
-&i2c1 {
-       clock-frequency = <400000>;
-
-       palmas: palmas@48 {
-               reg = <0x48>;
-               /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
-               interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
-               interrupt-parent = <&gic>;
-       };
-
-       twl6040: twl@4b {
-               compatible = "ti,twl6040";
-
-               interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */
-               interrupt-parent = <&gic>;
-               ti,audpwron-gpio = <&gpio5 17 0>;  /* gpio line 145 */
-
-               vio-supply = <&smps7_reg>;
-               v2v1-supply = <&smps9_reg>;
-               enable-active-high;
-       };
-};
-
-/include/ "palmas.dtsi"
-
-&mcspi1 {
-
-};
-
-&mcspi2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&mcspi2_pins>;
-};
-
-&mcspi3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&mcspi3_pins>;
-};
-
-&mcspi4 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&mcspi4_pins>;
-};
-
-/include/ "twl6040.dtsi"
-
-&dsi1 {
-       lcd {
-               compatible = "ti,lg4591";
-
-               lanes = <
-                       0       /* clk + */
-                       1       /* clk - */
-                       2       /* data1 + */
-                       3       /* data1 - */
-                       4       /* data2 + */
-                       5       /* data2 - */
-                       6       /* data3 + */
-                       7       /* data3 - */
-                       8       /* data4 + */
-                       9       /* data4 - */
-               >;
-
-               vdds_foo-supply = <&ldo2_reg>;
-
-               gpios = <&gpio6 23 0>;  /* 183, reset */
-       };
-};
-
-&hdmi {
-       tpd12s015: tpd12s015 {
-               compatible = "ti,tpd12s015";
-
-               gpios = <&tca6424a 0 0>,        /* TCA6424A P01, CT_CP_HDP */
-                       <&tca6424a 1 0>,        /* TCA6424A P00, LS_OE*/
-                       <&gpio7 1 0>;           /* 193, HPD */
-
-               hdmi-monitor {
-                       compatible = "ti,hdmi_panel";
-               };
-
-       };
-};
index 3f1846ae98a6827208e9bf7b60db6f0dff05187f..2d91a16310aa0ea516a23154b46989ec0ce4f0dd 100644 (file)
@@ -43,7 +43,7 @@
                                1000000 1060000
                                1500000 1250000
                        >;
-                       clocks = <&dpll_mpu>;
+                       clocks = <&dpll_mpu_ck>;
                        clock-names = "cpu";
                        clock-latency = <300000>; /* From omap-cpufreq driver */
                };
                        ti,hwmods = "counter_32k";
                };
 
-               dpll_mpu: dpll_mpu {
+               dpll_mpu_ck: dpll_mpu_ck {
                        #clock-cells = <0>;
                        compatible = "ti,omap-clock";
                };
                                compatible = "ti,omap-usb2";
                                reg = <0x4a084000 0x7c>;
                                ctrl-module = <&omap_control_usb>;
+                               wkupclk =  "usb_phy_cm_clk32k";
+                               optclk = "usb_otg_ss_refclk960m";
+
                        };
 
                        usb3_phy: usb3phy@4a084400 {
                                      <0x4a084c00 0x40>;
                                reg-names = "phy_rx", "phy_tx", "pll_ctrl";
                                ctrl-module = <&omap_control_usb>;
+                               wkupclk =  "usb_phy_cm_clk32k";
+                               optclk = "usb_otg_ss_refclk960m";
                        };
                };
 
index f4330a11090ec805a4ddcbff0d8dec0837cc9787..3a80c3257c3426c06cccda6e64957723b317e29f 100644 (file)
@@ -31,9 +31,10 @@ CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_ERRATA_411920=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
+CONFIG_PREEMPT=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO0,115200 init=/init androidboot.console=ttyO0 vmalloc=496M omapfb.fb_opt=-1,-1,-1,1,1280,720"
+CONFIG_CMDLINE="root=/dev/mmcblk0p2 rw rootwait console=ttyO0,115200 androidboot.console=ttyO0 vmalloc=496M init=/init omapfb.fb_opt=-1,-1,-1,1,1280,720 cma=64M no_console_suspend"
 CONFIG_CMDLINE_FORCE=y
 CONFIG_KEXEC=y
 CONFIG_CPU_FREQ=y
@@ -238,7 +239,8 @@ CONFIG_USB_DEBUG=y
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_SUSPEND=y
 CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_DWC3=m
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_DEBUG=y
 CONFIG_USB_DWC3_VERBOSE=y
 CONFIG_USB_MUSB_HDRC=m
@@ -260,13 +262,13 @@ CONFIG_USB_G_MULTI=m
 CONFIG_USB_G_MULTI_CDC=y
 CONFIG_USB_ETH=m
 CONFIG_USB_ETH_EEM=y
-CONFIG_OMAP_USB2=m
-CONFIG_OMAP_USB3=m
+CONFIG_OMAP_USB2=y
+CONFIG_OMAP_USB3=y
 CONFIG_OMAP_CONTROL_USB=y
 CONFIG_TWL4030_USB=m
 CONFIG_TWL6030_USB=m
 CONFIG_NOP_USB_XCEIV=y
-CONFIG_PALMAS_USB=m
+CONFIG_PALMAS_USB=y
 CONFIG_MMC=y
 CONFIG_MMC_UNSAFE_RESUME=y
 CONFIG_SDIO_UART=y
@@ -282,6 +284,8 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=y
 CONFIG_LEDS_TRIGGER_CPU=y
 CONFIG_LEDS_TRIGGER_GPIO=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_SWITCH=y
+CONFIG_SWITCH_GPIO=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PALMAS=y
 CONFIG_RTC_DRV_TWL92330=y
@@ -316,6 +320,7 @@ CONFIG_EXT3_FS=y
 CONFIG_EXT4_FS=y
 CONFIG_QUOTA=y
 CONFIG_QFMT_V2=y
+CONFIG_FUSE_FS=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
index 1b85230ffc7ac3b5e1cc724b36ffedd19a6687e3..66522af5ff72126768cd7d9c94694d672d1de0e5 100644 (file)
@@ -22,6 +22,7 @@ CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_ARCH_OMAP=y
+CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_OMAP_RESET_CLOCKS=y
 CONFIG_OMAP_MUX_DEBUG=y
 CONFIG_SOC_OMAP5=y
@@ -30,9 +31,10 @@ CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_ERRATA_411920=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
+CONFIG_PREEMPT=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200 init=/init androidboot.console=ttyO2"
+CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200 init=/init androidboot.console=ttyO2 vmalloc=496M omapfb.fb_opt=-1,-1,-1,1,1280,720"
 CONFIG_CMDLINE_FORCE=y
 CONFIG_KEXEC=y
 CONFIG_CPU_FREQ=y
@@ -187,17 +189,19 @@ CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=m
 CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
 CONFIG_USB_GSPCA=m
-CONFIG_DRM=y
-CONFIG_DRM_OMAP=y
 CONFIG_DRM_OMAP_NUM_CRTCS=3
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_MODE_HELPERS=y
 CONFIG_FB_TILEBLITTING=y
+CONFIG_DSSCOMP=y
+CONFIG_DSSCOMP_DEBUG_LOG=y
 CONFIG_OMAP2_DSS=y
 CONFIG_OMAP2_DSS_DRA7XX_DPI=y
 CONFIG_OMAP2_DSS_RFBI=y
 CONFIG_OMAP2_DSS_SDI=y
 CONFIG_OMAP2_DSS_DSI=y
+CONFIG_FB_OMAP2=y
+CONFIG_OMAPLFB=y
 CONFIG_PANEL_GENERIC_DPI=y
 CONFIG_PANEL_TFP410=y
 CONFIG_PANEL_LGPHILIPS_LB035Q02=y
@@ -214,8 +218,6 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_LCD_PLATFORM=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
@@ -281,6 +283,8 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=y
 CONFIG_LEDS_TRIGGER_CPU=y
 CONFIG_LEDS_TRIGGER_GPIO=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_SWITCH=y
+CONFIG_SWITCH_GPIO=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PALMAS=y
 CONFIG_RTC_DRV_TWL92330=y
@@ -290,6 +294,11 @@ CONFIG_DMADEVICES=y
 CONFIG_TI_EDMA=y
 CONFIG_DMA_OMAP=y
 CONFIG_STAGING=y
+CONFIG_FB=y
+CONFIG_DRM=y
+CONFIG_DRM_OMAP=y
+CONFIG_DRM_OMAP_DISPLAY=n
+CONFIG_DRM_OMAP_DMM_TILER=y
 CONFIG_ANDROID=y
 CONFIG_ANDROID_BINDER_IPC=y
 CONFIG_ASHMEM=y
@@ -310,6 +319,7 @@ CONFIG_EXT3_FS=y
 CONFIG_EXT4_FS=y
 CONFIG_QUOTA=y
 CONFIG_QFMT_V2=y
+CONFIG_FUSE_FS=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
@@ -342,5 +352,8 @@ CONFIG_CRC_T10DIF=y
 CONFIG_CRC_ITU_T=y
 CONFIG_CRC7=y
 CONFIG_LIBCRC32C=y
+CONFIG_ION=y
+CONFIG_ION_OMAP=y
+CONFIG_CMA=y
 CONFIG_TI_DAVINCI_MDIO=y
 CONFIG_TI_DAVINCI_CPDMA=y
index ffa9c311d093c8cdcda666f6600b111231c3fdb5..e3514f7e7c0fc12bd941f7cd90e239015ed32855 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_ERRATA_411920=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
+CONFIG_PREEMPT=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200"
index 87f9d563caf9535319c4209079178af47ccc0103..e77d58771c7c45a15f104887ba6df2358fabfe15 100644 (file)
@@ -1259,6 +1259,20 @@ static struct clk_hw_omap l3_iclk_div_hw = {
 DEFINE_STRUCT_CLK(l3_iclk_div, mpu_dpll_hs_clk_div_parents,
                  apll_pcie_clkvcoldo_ops);
 
+static const char *gpu_l3_iclk_parents[] = {
+       "l3_iclk_div",
+};
+
+static struct clk gpu_l3_iclk;
+
+static struct clk_hw_omap gpu_l3_iclk_hw = {
+       .hw = {
+               .clk = &gpu_l3_iclk,
+       },
+};
+
+DEFINE_STRUCT_CLK(gpu_l3_iclk, gpu_l3_iclk_parents, apll_pcie_clkvcoldo_ops);
+
 static const struct clk_div_table l3init_60m_fclk_rates[] = {
        { .div = 1, .val = 0 },
        { .div = 8, .val = 1 },
@@ -1950,6 +1964,7 @@ static struct omap_clk dra7xx_clks[] = {
        CLK(NULL,       "hdmi_div_clk",                 &hdmi_div_clk,  CK_7XX),
        CLK(NULL,       "hdmi_dpll_clk_mux",            &hdmi_dpll_clk_mux,     CK_7XX),
        CLK(NULL,       "l3_iclk_div",                  &l3_iclk_div,   CK_7XX),
+       CLK(NULL,       "gpu_l3_iclk",                  &gpu_l3_iclk,   CK_7XX),
        CLK(NULL,       "l3init_60m_fclk",              &l3init_60m_fclk,       CK_7XX),
        CLK(NULL,       "l4_root_clk_div",              &l4_root_clk_div,       CK_7XX),
        CLK(NULL,       "mlb_clk",                      &mlb_clk,       CK_7XX),
index 29d7ee61f3caa33e6ea0251f7f5ce8b0bbe40daf..1976fc952c506c39cb29902792f8d55002a7b5ce 100644 (file)
@@ -1039,6 +1039,47 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = {
        },
 };
 
+/*
+ * 'gpu' class
+ * 2d/3d graphics accelerator
+ */
+
+static struct omap_hwmod_class_sysconfig dra7xx_gpu_sysc = {
+       .rev_offs       = 0x0000,
+       .sysc_offs      = 0x0010,
+       .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
+       .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+                          SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+                          MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+       .sysc_fields    = &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class dra7xx_gpu_hwmod_class = {
+       .name   = "gpu",
+       .sysc   = &dra7xx_gpu_sysc,
+};
+
+/* gpu */
+static struct omap_hwmod_irq_info dra7xx_gpu_irqs[] = {
+       { .irq = 21 + DRA7XX_IRQ_GIC_START },
+       { .irq = -1 }
+};
+
+static struct omap_hwmod dra7xx_gpu_hwmod = {
+       .name           = "gpu",
+       .class          = &dra7xx_gpu_hwmod_class,
+       .clkdm_name     = "gpu_clkdm",
+       .mpu_irqs       = dra7xx_gpu_irqs,
+       .main_clk       = "gpu_core_gclk_mux",
+       .prcm = {
+               .omap4 = {
+                       .clkctrl_offs = DRA7XX_CM_GPU_GPU_CLKCTRL_OFFSET,
+                       .context_offs = DRA7XX_RM_GPU_GPU_CONTEXT_OFFSET,
+                       .modulemode   = MODULEMODE_SWCTRL,
+               },
+       },
+};
+
 /*
  * 'hdq1w' class
  *
@@ -4166,6 +4207,45 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpmc = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+static struct omap_hwmod_addr_space dra7xx_gpu_addrs[] = {
+       {
+               .name           = "klio",
+               .pa_start       = 0x56000000,
+               .pa_end         = 0x56001fff,
+       },
+       {
+               .name           = "hydra2",
+               .pa_start       = 0x56004000,
+               .pa_end         = 0x56004fff,
+       },
+       {
+               .name           = "klio_0",
+               .pa_start       = 0x56008000,
+               .pa_end         = 0x56009fff,
+       },
+       {
+               .name           = "klio_1",
+               .pa_start       = 0x5600c000,
+               .pa_end         = 0x5600dfff,
+       },
+       {
+               .name           = "klio_hl",
+               .pa_start       = 0x5600fe00,
+               .pa_end         = 0x5600ffff,
+               .flags          = ADDR_TYPE_RT
+       },
+       { }
+};
+
+/* l3_main_1 -> gpu */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpu = {
+       .master         = &dra7xx_l3_main_1_hwmod,
+       .slave          = &dra7xx_gpu_hwmod,
+       .clk            = "gpu_l3_iclk",
+       .addr           = dra7xx_gpu_addrs,
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_addr_space dra7xx_hdq1w_addrs[] = {
        {
                .pa_start       = 0x480b2000,
@@ -6123,6 +6203,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
        &dra7xx_l4_per1__gpio7,
        &dra7xx_l4_per1__gpio8,
        &dra7xx_l3_main_1__gpmc,
+       &dra7xx_l3_main_1__gpu,
        &dra7xx_l4_per1__hdq1w,
        &dra7xx_l4_per1__i2c1,
        &dra7xx_l4_per1__i2c2,
index 50b2831e027d633d2b9d045c919a0dd70e76f64d..32ee0fc7ea54587241f7f3ac22ffc679e0b371de 100644 (file)
@@ -162,7 +162,7 @@ unsigned long opp_get_voltage(struct opp *opp)
 
        return v;
 }
-EXPORT_SYMBOL(opp_get_voltage);
+EXPORT_SYMBOL_GPL(opp_get_voltage);
 
 /**
  * opp_get_freq() - Gets the frequency corresponding to an available opp
@@ -192,7 +192,7 @@ unsigned long opp_get_freq(struct opp *opp)
 
        return f;
 }
-EXPORT_SYMBOL(opp_get_freq);
+EXPORT_SYMBOL_GPL(opp_get_freq);
 
 /**
  * opp_get_opp_count() - Get number of opps available in the opp list
@@ -225,7 +225,7 @@ int opp_get_opp_count(struct device *dev)
 
        return count;
 }
-EXPORT_SYMBOL(opp_get_opp_count);
+EXPORT_SYMBOL_GPL(opp_get_opp_count);
 
 /**
  * opp_find_freq_exact() - search for an exact frequency
@@ -276,7 +276,7 @@ struct opp *opp_find_freq_exact(struct device *dev, unsigned long freq,
 
        return opp;
 }
-EXPORT_SYMBOL(opp_find_freq_exact);
+EXPORT_SYMBOL_GPL(opp_find_freq_exact);
 
 /**
  * opp_find_freq_ceil() - Search for an rounded ceil freq
@@ -323,7 +323,7 @@ struct opp *opp_find_freq_ceil(struct device *dev, unsigned long *freq)
 
        return opp;
 }
-EXPORT_SYMBOL(opp_find_freq_ceil);
+EXPORT_SYMBOL_GPL(opp_find_freq_ceil);
 
 /**
  * opp_find_freq_floor() - Search for a rounded floor freq
@@ -374,7 +374,7 @@ struct opp *opp_find_freq_floor(struct device *dev, unsigned long *freq)
 
        return opp;
 }
-EXPORT_SYMBOL(opp_find_freq_floor);
+EXPORT_SYMBOL_GPL(opp_find_freq_floor);
 
 /**
  * opp_add()  - Add an OPP table from a table definitions
@@ -568,7 +568,7 @@ int opp_enable(struct device *dev, unsigned long freq)
 {
        return opp_set_availability(dev, freq, true);
 }
-EXPORT_SYMBOL(opp_enable);
+EXPORT_SYMBOL_GPL(opp_enable);
 
 /**
  * opp_disable() - Disable a specific OPP
@@ -590,7 +590,7 @@ int opp_disable(struct device *dev, unsigned long freq)
 {
        return opp_set_availability(dev, freq, false);
 }
-EXPORT_SYMBOL(opp_disable);
+EXPORT_SYMBOL_GPL(opp_disable);
 
 #ifdef CONFIG_CPU_FREQ
 /**
@@ -661,6 +661,7 @@ int opp_init_cpufreq_table(struct device *dev,
 
        return 0;
 }
+EXPORT_SYMBOL_GPL(opp_init_cpufreq_table);
 
 /**
  * opp_free_cpufreq_table() - free the cpufreq table
@@ -678,6 +679,7 @@ void opp_free_cpufreq_table(struct device *dev,
        kfree(*table);
        *table = NULL;
 }
+EXPORT_SYMBOL_GPL(opp_free_cpufreq_table);
 #endif         /* CONFIG_CPU_FREQ */
 
 /**
@@ -738,4 +740,5 @@ int of_init_opp_table(struct device *dev)
 
        return 0;
 }
+EXPORT_SYMBOL_GPL(of_init_opp_table);
 #endif
index 5a3c6d9b5a99a26a3076a6c33c35ce13b3817bc9..fdeeeb3b23f7fbf23a1c1895adf6727222c82c61 100644 (file)
@@ -34,8 +34,7 @@ static const struct of_device_id omap_clk_of_match[] = {
  * @data:      unused
  *
  * REVISIT: We assume the following:
- * 1. omap clock names end with _ck
- * 2. omap clock names are under 32 characters in length
+ * 1. omap clock names are under 32 characters in length
  */
 static struct clk *omap_clk_src_get(struct of_phandle_args *clkspec, void *data)
 {
@@ -43,7 +42,7 @@ static struct clk *omap_clk_src_get(struct of_phandle_args *clkspec, void *data)
        char clk_name[32];
        struct device_node *np = clkspec->np;
 
-       snprintf(clk_name, 32, "%s_ck", np->name);
+       snprintf(clk_name, 32, "%s", np->name);
        clk = clk_get(NULL, clk_name);
        if (IS_ERR(clk))
                pr_err("%s: could not get clock %s(%ld)\n", __func__,
index 74392c177313a7178841e8e17caf3ab666be33d2..cb05cbefe1044b47e9868e95ac9831c917197260 100644 (file)
@@ -53,6 +53,7 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
+#include <linux/usb/of.h>
 
 #include "core.h"
 #include "gadget.h"
 
 #include "debug.h"
 
-static char *maximum_speed = "super";
-module_param(maximum_speed, charp, 0);
-MODULE_PARM_DESC(maximum_speed, "Maximum supported speed.");
-
 /* -------------------------------------------------------------------------- */
 
 void dwc3_set_mode(struct dwc3 *dwc, u32 mode)
@@ -372,6 +369,7 @@ static int dwc3_probe(struct platform_device *pdev)
        void                    *mem;
 
        u8                      mode;
+       u8                      dt_mode;
 
        mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
        if (!mem) {
@@ -421,21 +419,50 @@ static int dwc3_probe(struct platform_device *pdev)
        }
 
        if (node) {
-               dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0);
-               dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1);
+               dwc->maximum_speed = of_usb_get_maximum_speed(node);
+               switch (dwc->maximum_speed) {
+               case USB_SPEED_SUPER:
+               case USB_SPEED_UNKNOWN:
+                       dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0);
+                       dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1);
+                       break;
+               case USB_SPEED_HIGH:
+               case USB_SPEED_FULL:
+               case USB_SPEED_LOW:
+                       dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0);
+                       break;
+               }
        } else {
-               dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
-               dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
+               dwc->maximum_speed = USB_SPEED_UNKNOWN;
+               switch (dwc->maximum_speed) {
+               case USB_SPEED_SUPER:
+               case USB_SPEED_UNKNOWN:
+                       dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
+                       dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
+                       break;
+               case USB_SPEED_HIGH:
+               case USB_SPEED_FULL:
+               case USB_SPEED_LOW:
+                       dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
+                       break;
+               }
        }
 
+       /* default to superspeed if no maximum_speed passed */
+       if (dwc->maximum_speed == USB_SPEED_UNKNOWN)
+               dwc->maximum_speed = USB_SPEED_SUPER;
+
        if (IS_ERR_OR_NULL(dwc->usb2_phy)) {
                dev_err(dev, "no usb2 phy configured\n");
                return -EPROBE_DEFER;
        }
 
-       if (IS_ERR_OR_NULL(dwc->usb3_phy)) {
-               dev_err(dev, "no usb3 phy configured\n");
-               return -EPROBE_DEFER;
+       if (dwc->maximum_speed == USB_SPEED_SUPER) {
+               if (IS_ERR(dwc->usb3_phy)) {
+                       ret = PTR_ERR(dwc->usb2_phy);
+                       dev_err(dev, "no usb3 phy configured\n");
+                       return -EPROBE_DEFER;
+               }
        }
 
        usb_phy_set_suspend(dwc->usb2_phy, 0);
@@ -448,17 +475,6 @@ static int dwc3_probe(struct platform_device *pdev)
        dwc->regs_size  = resource_size(res);
        dwc->dev        = dev;
 
-       if (!strncmp("super", maximum_speed, 5))
-               dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
-       else if (!strncmp("high", maximum_speed, 4))
-               dwc->maximum_speed = DWC3_DCFG_HIGHSPEED;
-       else if (!strncmp("full", maximum_speed, 4))
-               dwc->maximum_speed = DWC3_DCFG_FULLSPEED1;
-       else if (!strncmp("low", maximum_speed, 3))
-               dwc->maximum_speed = DWC3_DCFG_LOWSPEED;
-       else
-               dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
-
        dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
 
        pm_runtime_enable(dev);
@@ -480,15 +496,30 @@ static int dwc3_probe(struct platform_device *pdev)
                goto err0;
        }
 
-       if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
-               mode = DWC3_MODE_HOST;
-       else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
-               mode = DWC3_MODE_DEVICE;
-       else
-               mode = DWC3_MODE_DRD;
+       mode = USB_DR_MODE_UNKNOWN;
+       if (node)
+               dt_mode = of_usb_get_dr_mode(node);
+
+       if (IS_ENABLED(CONFIG_USB_DWC3_HOST)) {
+               mode = USB_DR_MODE_HOST;
+               if (node && (mode != dt_mode))
+                       dev_warn(dev, "dr_mode set to host,check value in DT\n");
+       }
+       else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET)) {
+               mode = USB_DR_MODE_PERIPHERAL;
+               if (node && (mode != dt_mode))
+                       dev_warn(dev, "dr_mode set to periph,check value in DT\n");
+       }
+       else if (node)
+               mode = dt_mode;
+
+       if (mode == USB_DR_MODE_UNKNOWN) {
+               mode = USB_DR_MODE_OTG;
+               dev_warn(dev, "dwc3 mode set to otg default\n");
+       }
 
        switch (mode) {
-       case DWC3_MODE_DEVICE:
+       case USB_DR_MODE_PERIPHERAL:
                dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
                ret = dwc3_gadget_init(dwc);
                if (ret) {
@@ -496,7 +527,7 @@ static int dwc3_probe(struct platform_device *pdev)
                        goto err1;
                }
                break;
-       case DWC3_MODE_HOST:
+       case USB_DR_MODE_HOST:
                dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
                ret = dwc3_host_init(dwc);
                if (ret) {
@@ -504,7 +535,7 @@ static int dwc3_probe(struct platform_device *pdev)
                        goto err1;
                }
                break;
-       case DWC3_MODE_DRD:
+       case USB_DR_MODE_OTG:
                dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
                ret = dwc3_host_init(dwc);
                if (ret) {
@@ -536,13 +567,13 @@ static int dwc3_probe(struct platform_device *pdev)
 
 err2:
        switch (mode) {
-       case DWC3_MODE_DEVICE:
+       case USB_DR_MODE_PERIPHERAL:
                dwc3_gadget_exit(dwc);
                break;
-       case DWC3_MODE_HOST:
+       case USB_DR_MODE_HOST:
                dwc3_host_exit(dwc);
                break;
-       case DWC3_MODE_DRD:
+       case USB_DR_MODE_OTG:
                dwc3_host_exit(dwc);
                dwc3_gadget_exit(dwc);
                break;
@@ -573,13 +604,13 @@ static int dwc3_remove(struct platform_device *pdev)
        dwc3_debugfs_exit(dwc);
 
        switch (dwc->mode) {
-       case DWC3_MODE_DEVICE:
+       case USB_DR_MODE_PERIPHERAL:
                dwc3_gadget_exit(dwc);
                break;
-       case DWC3_MODE_HOST:
+       case USB_DR_MODE_HOST:
                dwc3_host_exit(dwc);
                break;
-       case DWC3_MODE_DRD:
+       case USB_DR_MODE_OTG:
                dwc3_host_exit(dwc);
                dwc3_gadget_exit(dwc);
                break;
index c56d404d651e41fc817de47c12dc1ec2b451a6b4..425466663fca67a3896a5748d6c7bcddb1117277 100644 (file)
@@ -562,11 +562,6 @@ struct dwc3_hwparams {
 /* HWPARAMS0 */
 #define DWC3_MODE(n)           ((n) & 0x7)
 
-#define DWC3_MODE_DEVICE       0
-#define DWC3_MODE_HOST         1
-#define DWC3_MODE_DRD          2
-#define DWC3_MODE_HUB          3
-
 #define DWC3_MDWIDTH(n)                (((n) & 0xff00) >> 8)
 
 /* HWPARAMS1 */
@@ -618,7 +613,7 @@ struct dwc3_scratchpad_array {
  * @irq: IRQ number
  * @num_event_buffers: calculated number of event buffers
  * @u1u2: only used on revisions <1.83a for workaround
- * @maximum_speed: maximum speed requested (mainly for testing purposes)
+ * @maximum_speed: maximum speed requested
  * @revision: revision register contents
  * @mode: mode of operation
  * @usb2_phy: pointer to USB2 PHY
@@ -674,7 +669,7 @@ struct dwc3 {
 
        u32                     num_event_buffers;
        u32                     u1u2;
-       u32                     maximum_speed;
+       enum usb_device_speed   maximum_speed;
        u32                     revision;
        u32                     mode;
 
index 6990601f2906deb1285228bb91293805d27966b2..0ee9a04a51796add4a82145df53539bd9ba748a9 100644 (file)
@@ -1497,10 +1497,25 @@ static int dwc3_gadget_start(struct usb_gadget *g,
         * STAR#9000525659: Clock Domain Crossing on DCTL in
         * USB 2.0 Mode
         */
-       if (dwc->revision < DWC3_REVISION_220A)
+       if (dwc->revision < DWC3_REVISION_220A) {
                reg |= DWC3_DCFG_SUPERSPEED;
-       else
-               reg |= dwc->maximum_speed;
+       } else {
+               switch (dwc->maximum_speed) {
+               case USB_SPEED_LOW:
+                       reg |= DWC3_DSTS_LOWSPEED;
+                       break;
+               case USB_SPEED_FULL:
+                       reg |= DWC3_DSTS_FULLSPEED1;
+                       break;
+               case USB_SPEED_HIGH:
+                       reg |= DWC3_DSTS_HIGHSPEED;
+                       break;
+               case USB_SPEED_SUPER:   /* FALLTHROUGH */
+               case USB_SPEED_UNKNOWN: /* FALTHROUGH */
+               default:
+                       reg |= DWC3_DSTS_SUPERSPEED;
+               }
+       }
        dwc3_writel(dwc->regs, DWC3_DCFG, reg);
 
        dwc->start_config_issued = false;
index 6a072986b9bd935d1e05627e2fa4504815cc26a5..0d6c6c7ba68c377177e5dddabbff56623b114302 100644 (file)
@@ -11,3 +11,5 @@ obj-$(CONFIG_USB_ISP1301)             += isp1301.o
 obj-$(CONFIG_MV_U3D_PHY)               += mv_u3d_phy.o
 obj-$(CONFIG_USB_EHCI_TEGRA)   += tegra_usb_phy.o
 obj-$(CONFIG_USB_RCAR_PHY)             += rcar-phy.o
+obj-$(CONFIG_OF)                       += of.o
+
diff --git a/drivers/usb/phy/of.c b/drivers/usb/phy/of.c
new file mode 100644 (file)
index 0000000..7ea0154
--- /dev/null
@@ -0,0 +1,47 @@
+/*
+ * USB of helper code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/usb/of.h>
+#include <linux/usb/otg.h>
+
+static const char *const usbphy_modes[] = {
+       [USBPHY_INTERFACE_MODE_UNKNOWN] = "",
+       [USBPHY_INTERFACE_MODE_UTMI]    = "utmi",
+       [USBPHY_INTERFACE_MODE_UTMIW]   = "utmi_wide",
+       [USBPHY_INTERFACE_MODE_ULPI]    = "ulpi",
+       [USBPHY_INTERFACE_MODE_SERIAL]  = "serial",
+       [USBPHY_INTERFACE_MODE_HSIC]    = "hsic",
+};
+
+/**
+ * of_usb_get_phy_mode - Get phy mode for given device_node
+ * @np:        Pointer to the given device_node
+ *
+ * The function gets phy interface string from property 'phy_type',
+ * and returns the correspondig enum usb_phy_interface
+ */
+enum usb_phy_interface of_usb_get_phy_mode(struct device_node *np)
+{
+       const char *phy_type;
+       int err, i;
+
+       err = of_property_read_string(np, "phy_type", &phy_type);
+       if (err < 0)
+               return USBPHY_INTERFACE_MODE_UNKNOWN;
+
+       for (i = 0; i < ARRAY_SIZE(usbphy_modes); i++)
+               if (!strcmp(phy_type, usbphy_modes[i]))
+                       return i;
+
+       return USBPHY_INTERFACE_MODE_UNKNOWN;
+}
+EXPORT_SYMBOL_GPL(of_usb_get_phy_mode);
index fadc0c2b65bb7baf6b633c97cb187a16c4bd9d93..695c7c696466362e97bec78cc13f6df6f8a129c8 100644 (file)
@@ -27,7 +27,7 @@
 #include <linux/delay.h>
 #include <linux/usb/omap_control_usb.h>
 
-#define        NUM_SYS_CLKS            5
+#define        NUM_SYS_CLKS            6
 #define        PLL_STATUS              0x00000004
 #define        PLL_GO                  0x00000008
 #define        PLL_CONFIGURATION1      0x0000000C
@@ -62,6 +62,7 @@ enum sys_clk_rate {
        CLK_RATE_12MHZ,
        CLK_RATE_16MHZ,
        CLK_RATE_19MHZ,
+       CLK_RATE_20MHZ,
        CLK_RATE_26MHZ,
        CLK_RATE_38MHZ
 };
@@ -70,6 +71,7 @@ static struct usb_dpll_params omap_usb3_dpll_params[NUM_SYS_CLKS] = {
        {1250, 5, 4, 20, 0},            /* 12 MHz */
        {3125, 20, 4, 20, 0},           /* 16.8 MHz */
        {1172, 8, 4, 20, 65537},        /* 19.2 MHz */
+       {1000, 7, 4, 10, 0},            /* 20 MHz */
        {1250, 12, 4, 20, 0},           /* 26 MHz */
        {3125, 47, 4, 20, 92843},       /* 38.4 MHz */
 };
@@ -122,6 +124,8 @@ static inline enum sys_clk_rate __get_sys_clk_index(unsigned long rate)
                return CLK_RATE_16MHZ;
        case 19200000:
                return CLK_RATE_19MHZ;
+       case 20000000:
+               return CLK_RATE_20MHZ;
        case 26000000:
                return CLK_RATE_26MHZ;
        case 38400000:
index d29503e954abf829c71e69f08ec995da39291481..aa5fa26e1ec1725007e3e085e260c80f8fba18db 100644 (file)
@@ -13,7 +13,9 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/of.h>
 #include <linux/usb/ch9.h>
+#include <linux/usb/of.h>
 
 const char *usb_speed_string(enum usb_device_speed speed)
 {
@@ -32,4 +34,73 @@ const char *usb_speed_string(enum usb_device_speed speed)
 }
 EXPORT_SYMBOL_GPL(usb_speed_string);
 
+#ifdef CONFIG_OF
+static const char *const usb_dr_modes[] = {
+       [USB_DR_MODE_UNKNOWN]           = "",
+       [USB_DR_MODE_HOST]              = "host",
+       [USB_DR_MODE_PERIPHERAL]        = "peripheral",
+       [USB_DR_MODE_OTG]               = "otg",
+};
+
+/**
+ * of_usb_get_dr_mode - Get dual role mode for given device_node
+ * @np:        Pointer to the given device_node
+ *
+ * The function gets phy interface string from property 'dr_mode',
+ * and returns the correspondig enum usb_dr_mode
+ */
+enum usb_dr_mode of_usb_get_dr_mode(struct device_node *np)
+{
+       const char *dr_mode;
+       int err, i;
+
+       err = of_property_read_string(np, "dr_mode", &dr_mode);
+       if (err < 0)
+               return USB_DR_MODE_UNKNOWN;
+
+       for (i = 0; i < ARRAY_SIZE(usb_dr_modes); i++)
+               if (!strcmp(dr_mode, usb_dr_modes[i]))
+                       return i;
+
+       return USB_DR_MODE_UNKNOWN;
+}
+EXPORT_SYMBOL_GPL(of_usb_get_dr_mode);
+
+static const char *const usb_maximum_speed[] = {
+       [USB_SPEED_UNKNOWN]     = "",
+       [USB_SPEED_LOW]         = "lowspeed",
+       [USB_SPEED_FULL]        = "fullspeed",
+       [USB_SPEED_HIGH]        = "highspeed",
+       [USB_SPEED_WIRELESS]    = "wireless",
+       [USB_SPEED_SUPER]       = "superspeed",
+};
+
+/**
+ * of_usb_get_maximum_speed - Get maximum requested speed for a given USB
+ * controller.
+ * @np: Pointer to the given device_node
+ *
+ * The function gets the maximum speed string from property "maximum-speed",
+ * and returns the corresponding enum usb_device_speed.
+ */
+enum usb_device_speed of_usb_get_maximum_speed(struct device_node *np)
+{
+       const char *maximum_speed;
+       int err;
+       int i;
+
+       err = of_property_read_string(np, "maximum-speed", &maximum_speed);
+       if (err < 0)
+               return USB_SPEED_UNKNOWN;
+
+       for (i = 0; i < ARRAY_SIZE(usb_maximum_speed); i++)
+               if (strcmp(maximum_speed, usb_maximum_speed[i]) == 0)
+                       return i;
+
+       return USB_SPEED_UNKNOWN;
+}
+EXPORT_SYMBOL_GPL(of_usb_get_maximum_speed);
+
+#endif
+
 MODULE_LICENSE("GPL");
old mode 100644 (file)
new mode 100755 (executable)
index ef906e8..8ec5b57
@@ -65,6 +65,10 @@ config OMAP2_DSS_VENC
 
 config OMAP4_DSS_HDMI
        bool "OMAP4 HDMI support"
+       depends on ARCH_OMAP4 || ANDROID_SWITCH
+       select FB
+       select FB_MODE_HELPERS
+       select FB_OMAP2
         default y
        select I2C_ALGOBIT
        help
@@ -87,6 +91,9 @@ config OMAP5_DSS_HDMI
        select GPIO_PCA953X
        select MFD_PALMAS
        select REGULATOR_PALMAS
+       select FB
+       select FB_MODE_HELPERS
+       select FB_OMAP2
        help
            HDMI Interface.This add the High Deinition Multimedia Interface.
            See http://wwww.hdmi.org/ for HDMI specification.
@@ -139,4 +146,10 @@ config OMAP2_DSS_SLEEP_AFTER_VENC_RESET
          This option enables the sleep, and is enabled by default. You can
          disable the sleep if it doesn't cause problems on your platform.
 
+config USE_FB_MODE_DB
+       bool "Enable FB mode db support"
+       default y
+       help
+         Enable FB mode support.
+
 endif
old mode 100644 (file)
new mode 100755 (executable)
index f4e6f43..1eb6490
@@ -322,7 +322,7 @@ static void dss_dump_regs(struct seq_file *s)
 #undef DUMPREG
 }
 
-static void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src)
+void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src)
 {
        struct platform_device *dsidev;
        int b;
old mode 100644 (file)
new mode 100755 (executable)
index c5f1f19..20ae960
@@ -283,6 +283,7 @@ void dss_sdi_init(int datapairs);
 int dss_sdi_enable(void);
 void dss_sdi_disable(void);
 
+void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src);
 void dss_select_dsi_clk_source(int dsi_module,
                enum omap_dss_clk_source clk_src);
 void dss_select_lcd_clk_source(enum omap_channel channel,
@@ -500,6 +501,12 @@ int omapdss_hdmi_display_3d_enable(struct omap_dss_device *dssdev,
                                        struct s3d_disp_info *info, int code);
 void sel_i2c(void);
 void sel_hdmi(void);
+int omapdss_hdmi_display_set_mode(struct omap_dss_device *dssdev,
+                                       struct fb_videomode *mode);
+u8 *hdmi_read_valid_edid(void);
+void omapdss_hdmi_clear_edid(void);
+ssize_t omapdss_get_edid(char *buf);
+void hdmi_get_monspecs(struct omap_dss_device *dssdev);
 int hdmi_panel_init(void);
 void hdmi_panel_exit(void);
 #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO) || \
old mode 100644 (file)
new mode 100755 (executable)
index 133da16..475240e
@@ -37,6 +37,8 @@
 #include <linux/slab.h>
 #include <linux/of_gpio.h>
 #include <linux/of_i2c.h>
+#include <linux/fb.h>
+#include <linux/omapfb.h>
 #include <video/omapdss.h>
 #include <linux/i2c.h>
 #include <linux/i2c-algo-bit.h>
 #include "dss_features.h"
 
 /* HDMI EDID Length move this */
-#define HDMI_EDID_MAX_LENGTH                   256
+#define HDMI_EDID_MAX_LENGTH                   512
 #define EDID_TIMING_DESCRIPTOR_SIZE            0x12
 #define EDID_DESCRIPTOR_BLOCK0_ADDRESS         0x36
 #define EDID_DESCRIPTOR_BLOCK1_ADDRESS         0x80
+#define EDID_HDMI_VENDOR_SPECIFIC_DATA_BLOCK   128
 #define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR     4
 #define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR     4
 
@@ -60,6 +63,14 @@ static struct {
        defined(CONFIG_OMAP5_DSS_HDMI_AUDIO)
        struct platform_device *audio_pdev;
 #endif
+       int code;
+       int mode;
+       u8 edid[HDMI_EDID_MAX_LENGTH];
+       bool edid_set;
+       bool custom_set;
+       bool can_do_hdmi;
+       bool force_timings;
+       int source_physical_address;
 
        struct hdmi_ip_data ip_data;
        int hdmi_irq;
@@ -89,6 +100,8 @@ static struct {
        struct omap_dss_output output;
 } hdmi;
 
+static const u8 edid_header[8] = {0x0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0};
+
 /*
  * Logic for the below structure :
  * user enters the CEA or VESA timings by specifying the HDMI/DVI code.
@@ -380,6 +393,125 @@ static void hdmi_set_ls_state(enum level_shifter_state state)
        sel_hdmi();
 }
 
+static int relaxed_fb_mode_is_equal(const struct fb_videomode *mode1,
+                                       const struct fb_videomode *mode2)
+{
+       u32 ratio1 = mode1->flag & (FB_FLAG_RATIO_4_3 | FB_FLAG_RATIO_16_9);
+       u32 ratio2 = mode2->flag & (FB_FLAG_RATIO_4_3 | FB_FLAG_RATIO_16_9);
+       return (mode1->xres         == mode2->xres &&
+               mode1->yres         == mode2->yres &&
+               mode1->pixclock     <= mode2->pixclock * 201 / 200 &&
+               mode1->pixclock     >= mode2->pixclock * 200 / 201 &&
+               mode1->hsync_len + mode1->left_margin + mode1->right_margin ==
+               mode2->hsync_len + mode2->left_margin + mode2->right_margin &&
+               mode1->vsync_len + mode1->upper_margin + mode1->lower_margin ==
+               mode2->vsync_len + mode2->upper_margin + mode2->lower_margin &&
+               (!ratio1 || !ratio2 || ratio1 == ratio2) &&
+               (mode1->vmode & FB_VMODE_INTERLACED) ==
+               (mode2->vmode & FB_VMODE_INTERLACED));
+
+}
+
+static int hdmi_set_timings(struct fb_videomode *vm, bool check_only)
+{
+       int i = 0;
+       int r = 0;
+       DSSDBG("hdmi_set_timings\n");
+
+       if (!vm->xres || !vm->yres || !vm->pixclock)
+               goto fail;
+
+       for (i = 0; i < CEA_MODEDB_SIZE; i++) {
+               if (relaxed_fb_mode_is_equal(cea_modes + i, vm)) {
+                       *vm = cea_modes[i];
+                       if (check_only)
+                               return 1;
+                       hdmi.ip_data.cfg.cm.code = i;
+                       hdmi.ip_data.cfg.cm.mode = HDMI_HDMI;
+                       hdmi.ip_data.cfg.timingsfb =
+                       cea_modes[hdmi.ip_data.cfg.cm.code];
+                       goto done;
+               }
+       }
+       for (i = 0; i < VESA_MODEDB_SIZE; i++) {
+               if (relaxed_fb_mode_is_equal(vesa_modes + i, vm)) {
+                       *vm = vesa_modes[i];
+                       if (check_only)
+                               return 1;
+                       hdmi.ip_data.cfg.cm.code = i;
+                       hdmi.ip_data.cfg.cm.mode = HDMI_DVI;
+                       hdmi.ip_data.cfg.timingsfb =
+                       vesa_modes[hdmi.ip_data.cfg.cm.code];
+                       goto done;
+               }
+       }
+fail:
+       if (check_only)
+               return 0;
+       hdmi.ip_data.cfg.cm.code = 1;
+       hdmi.ip_data.cfg.cm.mode = HDMI_HDMI;
+       hdmi.ip_data.cfg.timingsfb = cea_modes[hdmi.ip_data.cfg.cm.code];
+       i = -1;
+done:
+       DSSDBG("%s-%d\n", hdmi.ip_data.cfg.cm.mode ? "CEA" : "VESA",
+               hdmi.ip_data.cfg.cm.code);
+
+       /* convert fb timing to dss timings to be in sync. */
+       omapfb_fb2dss_timings(&hdmi.ip_data.cfg.timingsfb,&hdmi.ip_data.cfg.timings);
+
+       r = i >= 0 ? 1 : 0;
+       return r;
+
+}
+
+void hdmi_get_monspecs(struct omap_dss_device *dssdev)
+{
+       int i, j;
+       char *edid = (char *)hdmi.edid;
+       struct fb_monspecs *specs = &dssdev->panel.monspecs;
+       u32 fclk = dispc_fclk_rate() / 1000;
+       u32 max_pclk = dssdev->clocks.hdmi.max_pixclk_khz;
+
+       if (max_pclk && max_pclk < fclk)
+               fclk = max_pclk;
+
+       memset(specs, 0x0, sizeof(*specs));
+       if (!hdmi.edid_set)
+               return;
+       fb_edid_to_monspecs(edid, specs);
+       if (specs->modedb == NULL)
+               return;
+
+       for (i = 1; i <= edid[0x7e] && i * 128 < HDMI_EDID_MAX_LENGTH; i++) {
+               if (edid[i * 128] == 0x2)
+                       fb_edid_add_monspecs(edid + i * 128, specs);
+       }
+       if (hdmi.force_timings) {
+               for (i = 0; i < specs->modedb_len; i++) {
+                       specs->modedb[i++] = hdmi.ip_data.cfg.timingsfb;
+                       break;
+               }
+               specs->modedb_len = i;
+               hdmi.force_timings = false;
+               return;
+       }
+
+       hdmi.can_do_hdmi = specs->misc & FB_MISC_HDMI;
+
+       /* filter out resolutions we don't support */
+       for (i = j = 0; i < specs->modedb_len; i++) {
+               if (!hdmi_set_timings(&specs->modedb[i], true))
+                       continue;
+               if (fclk < PICOS2KHZ(specs->modedb[i].pixclock))
+                       continue;
+               if (specs->modedb[i].flag & FB_FLAG_PIXEL_REPEAT)
+                       continue;
+               specs->modedb[j++] = specs->modedb[i];
+       }
+       specs->modedb_len = j;
+
+}
+
 static int hdmi_runtime_get(void)
 {
        int r;
@@ -540,6 +672,45 @@ end:       return cm;
 
 }
 
+u8 *hdmi_read_valid_edid(void)
+{
+       int ret, i;
+
+       if (hdmi.edid_set)
+               return hdmi.edid;
+
+       memset(hdmi.edid, 0, HDMI_EDID_MAX_LENGTH);
+
+       hdmi_runtime_get();
+
+       ret = hdmi.ip_data.ops->read_edid(&hdmi.ip_data, hdmi.edid,
+                                                 HDMI_EDID_MAX_LENGTH);
+
+       hdmi_runtime_put();
+
+       for (i = 0; i < HDMI_EDID_MAX_LENGTH; i += 16)
+               DSSDBG("edid[%03x] = %02x %02x %02x %02x %02x %02x %02x %02x "\
+                       "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
+                       hdmi.edid[i], hdmi.edid[i + 1], hdmi.edid[i + 2],
+                       hdmi.edid[i + 3], hdmi.edid[i + 4], hdmi.edid[i + 5],
+                       hdmi.edid[i + 6], hdmi.edid[i + 7], hdmi.edid[i + 8],
+                       hdmi.edid[i + 9], hdmi.edid[i + 10], hdmi.edid[i + 11],
+                       hdmi.edid[i + 12], hdmi.edid[i + 13], hdmi.edid[i + 14],
+                       hdmi.edid[i + 15]);
+
+       if (ret) {
+               DSSWARN("failed to read E-EDID\n");
+               return NULL;
+       }
+       if (memcmp(hdmi.edid, edid_header, sizeof(edid_header))) {
+               DSSWARN("failed to read E-EDID: wrong header\n");
+               return NULL;
+       }
+       hdmi.edid_set = true;
+
+       return hdmi.edid;
+}
+
 unsigned long hdmi_get_pixel_clock(void)
 {
        /* HDMI Pixel Clock in Mhz */
@@ -708,7 +879,28 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
        p = &hdmi.ip_data.cfg.timings;
 
        DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
+#ifdef CONFIG_USE_FB_MODE_DB
+       if (!hdmi.custom_set) {
+               struct fb_videomode fb_mode = vesa_modes[4];
+               if ((hdmi.ip_data.cfg.cm.code != 4) &&
+                       (hdmi.ip_data.cfg.cm.mode != HDMI_DVI)) {
+                       if (hdmi.ip_data.cfg.cm.mode == HDMI_DVI)
+                               fb_mode = vesa_modes[hdmi.ip_data.cfg.cm.code];
+                       else
+                               fb_mode = cea_modes[hdmi.ip_data.cfg.cm.code];
+               }
+               if (!hdmi_set_timings(&fb_mode, false)) {
+                       /* Fallback in case we cannot set the timings */
+                       DSSERR("fallback to vesa default code");
+                       fb_mode = vesa_modes[4];
+                       hdmi_set_timings(&fb_mode, false);
+               }
+       }
 
+       /* Update the panel timing in dssdev */
+       omapfb_fb2dss_timings(&hdmi.ip_data.cfg.timingsfb,
+                                       &dssdev->panel.timings);
+#endif
        switch (hdmi.ip_data.cfg.deep_color) {
        case HDMI_DEEP_COLOR_30BIT:
                phy = (p->pixel_clock * 125) / 100 ;
@@ -753,8 +945,21 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
                goto err_phy_enable;
        }
 
+       hdmi.ip_data.cfg.cm.mode = hdmi.can_do_hdmi ? hdmi.mode : HDMI_DVI;
+
        hdmi.ip_data.ops->video_configure(&hdmi.ip_data);
 
+       /* Make selection of HDMI in DSS */
+       dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
+
+       /* Select the dispc clock source as PRCM clock, to ensure that it is not
+        * DSI PLL source as the clock selected by DSI PLL might not be
+        * sufficient for the resolution selected / that can be changed
+        * dynamically by user. This can be moved to single location , say
+        * Boardfile.
+        */
+       dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
+
        /* bypass TV gamma table */
        dispc_enable_gamma_table(0);
 
@@ -856,6 +1061,18 @@ int omapdss_hdmi_get_range(void)
 int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
                                        struct omap_video_timings *timings)
 {
+#ifdef CONFIG_USE_FB_MODE_DB
+       struct fb_videomode t;
+       omapfb_dss2fb_timings(timings, &t);
+
+       /* also check interlaced timings */
+       if (!hdmi_set_timings(&t, true)) {
+               t.yres *= 2;
+               t.vmode |= FB_VMODE_INTERLACED;
+       }
+       if (!hdmi_set_timings(&t, true))
+               return -EINVAL;
+#else
        struct hdmi_cm cm;
 
        cm = hdmi_get_code(timings);
@@ -863,10 +1080,27 @@ int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
                return -EINVAL;
        }
 
+#endif
        return 0;
 
 }
 
+int omapdss_hdmi_display_set_mode(struct omap_dss_device *dssdev,
+                                 struct fb_videomode *vm)
+{
+       int r1, r2;
+       /* turn the hdmi off and on to get new timings to use */
+       hdmi.ip_data.set_mode = true;
+       dssdev->driver->disable(dssdev);
+       hdmi.ip_data.set_mode = false;
+       r1 = hdmi_set_timings(vm, false) ? 0 : -EINVAL;
+       hdmi.custom_set = true;
+       hdmi.code = hdmi.ip_data.cfg.cm.code;
+       hdmi.mode = hdmi.ip_data.cfg.cm.mode;
+       r2 = dssdev->driver->enable(dssdev);
+       return r1 ? : r2;
+}
+
 int omapdss_hdmi_display_3d_enable(struct omap_dss_device *dssdev,
                                        struct s3d_disp_info *info, int code)
 {
@@ -964,6 +1198,21 @@ err0:
 void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev,
                struct omap_video_timings *timings)
 {
+#ifdef CONFIG_USE_FB_MODE_DB
+       struct fb_videomode t;
+
+       DSSDBG("x_res= %d y_res = %d\n",
+               dssdev->panel.timings.x_res,
+               dssdev->panel.timings.y_res);
+
+       omapfb_dss2fb_timings(&dssdev->panel.timings, &t);
+       /* also check interlaced timings */
+       if (!hdmi_set_timings(&t, true)) {
+               t.yres *= 2;
+               t.vmode |= FB_VMODE_INTERLACED;
+       }
+       omapdss_hdmi_display_set_mode(dssdev, &t);
+#else
        struct hdmi_cm cm;
        const struct hdmi_config *t;
 
@@ -977,6 +1226,7 @@ void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev,
                hdmi.ip_data.cfg = *t;
 
        mutex_unlock(&hdmi.lock);
+#endif
 }
 
 static void hdmi_dump_regs(struct seq_file *s)
@@ -1011,10 +1261,13 @@ int omapdss_hdmi_read_edid(u8 *buf, int len)
        r = hdmi_runtime_get();
        BUG_ON(r);
 
-
        hdmi_set_ls_state(LS_ENABLED);
 
-       r = hdmi.ip_data.ops->read_edid(&hdmi.ip_data, buf, len);
+       //r = hdmi.ip_data.ops->read_edid(&hdmi.ip_data, buf, len);
+       if(hdmi_read_valid_edid())
+               omapdss_get_edid(buf);
+       else
+               r = -1;
 
        /* restore level shifter state */
        hdmi_set_ls_state(restore_state);
@@ -1022,6 +1275,7 @@ int omapdss_hdmi_read_edid(u8 *buf, int len)
        hdmi_runtime_put();
        mutex_unlock(&hdmi.lock);
 
+
        return r;
 }
 
@@ -1065,6 +1319,12 @@ int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev)
                goto err0;
        }
 
+       /* Update the mode db database */
+       if (hdmi.edid_set) {
+               /* get monspecs from edid */
+               hdmi_get_monspecs(dssdev);
+       }
+
        r = hdmi_power_on_full(dssdev);
        if (r) {
                DSSERR("failed to power on device\n");
@@ -1129,6 +1389,19 @@ void omapdss_hdmi_core_disable(struct omap_dss_device *dssdev)
        mutex_unlock(&hdmi.lock);
 }
 
+void omapdss_hdmi_clear_edid(void)
+{
+       hdmi.edid_set = false;
+       hdmi.custom_set = false;
+}
+
+ssize_t omapdss_get_edid(char *buf)
+{
+       ssize_t size = hdmi.edid_set ? HDMI_EDID_MAX_LENGTH : 0;
+       memcpy(buf, hdmi.edid, size);
+       return size;
+}
+
 static irqreturn_t hdmi_irq_handler(int irq, void *arg)
 {
        int r = 0;
@@ -1826,6 +2099,8 @@ static int __init omapdss_hdmihw_probe(struct platform_device *pdev)
                goto err_panel_init;
        }
 
+        hdmi.edid_set = false;
+
        dss_debugfs_create_file("hdmi", hdmi_dump_regs);
 
        hdmi_init_output(pdev);
old mode 100644 (file)
new mode 100755 (executable)
index 95090f2..fab1d30
@@ -143,11 +143,10 @@ static int hdmi_panel_probe(struct omap_dss_device *dssdev)
        DSSDBG("hdmi_panel_probe x_res= %d y_res = %d\n",
                dssdev->panel.timings.x_res,
                dssdev->panel.timings.y_res);
-
+#ifndef CONFIG_USE_FB_MODE_DB
        omapdss_hdmi_display_set_timing(dssdev, &dssdev->panel.timings);
-
        hdmi.dssdev = dssdev;
-
+#endif
        return 0;
 }
 
@@ -326,9 +325,9 @@ static int hdmi_panel_enable(struct omap_dss_device *dssdev)
                r = -EINVAL;
                goto err;
        }
-
+#ifndef CONFIG_USE_FB_MODE_DB
        omapdss_hdmi_display_set_timing(dssdev, &dssdev->panel.timings);
-
+#endif
        r = omapdss_hdmi_display_enable(dssdev);
        if (r) {
                DSSERR("failed to power on\n");
@@ -412,10 +411,14 @@ static void hdmi_set_timings(struct omap_dss_device *dssdev,
         */
        hdmi_panel_audio_disable(dssdev);
 
-       omapdss_hdmi_display_set_timing(dssdev, timings);
        dssdev->panel.timings = *timings;
-
+#ifndef CONFIG_USE_FB_MODE_DB
+       omapdss_hdmi_display_set_timing(dssdev, timings);
+       mutex_unlock(&hdmi.lock);
+#else
        mutex_unlock(&hdmi.lock);
+       omapdss_hdmi_display_set_timing(dssdev, timings);
+#endif
 }
 
 static int hdmi_check_timings(struct omap_dss_device *dssdev,
@@ -496,6 +499,16 @@ MODULE_DEVICE_TABLE(of, hdmi_panel_of_match);
 #define dss_of_match NULL
 #endif
 
+static int hdmi_get_modedb(struct omap_dss_device *dssdev,
+                          struct fb_videomode *modedb, int modedb_len)
+{
+       struct fb_monspecs *specs = &dssdev->panel.monspecs;
+       if (specs->modedb_len < modedb_len)
+               modedb_len = specs->modedb_len;
+       memcpy(modedb, specs->modedb, sizeof(*modedb) * modedb_len);
+       return modedb_len;
+}
+
 static struct omap_dss_driver hdmi_driver = {
        .probe          = hdmi_panel_probe,
        .remove         = hdmi_panel_remove,
@@ -505,6 +518,8 @@ static struct omap_dss_driver hdmi_driver = {
        .set_timings    = hdmi_set_timings,
        .check_timings  = hdmi_check_timings,
        .read_edid      = hdmi_read_edid,
+       .get_modedb     = hdmi_get_modedb,
+       .set_mode       = omapdss_hdmi_display_set_mode,
        .detect         = hdmi_detect,
        .audio_enable   = hdmi_panel_audio_enable,
        .audio_disable  = hdmi_panel_audio_disable,
old mode 100644 (file)
new mode 100755 (executable)
index 2966a3a..4051e01
@@ -106,6 +106,7 @@ struct hdmi_config {
        struct hdmi_s3d_info s3d_info;
        enum hdmi_deep_color_mode deep_color;
        enum hdmi_range range;
+       struct fb_videomode timingsfb;
 };
 
 /* HDMI PLL structure */
@@ -245,6 +246,7 @@ struct hdmi_ip_data {
        /* ti_hdmi_4xxx_ip private data. These should be in a separate struct */
        int hpd_gpio;
        struct mutex lock;
+       bool set_mode;
 };
 int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data);
 void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data);
old mode 100644 (file)
new mode 100755 (executable)
index 5605c9b..d49cf94
@@ -69,5 +69,9 @@ void __init omapfb_set_lcd_config(const struct omap_lcd_config *config);
 enum omap_color_mode;
 int omapfb_mode_to_dss_mode(struct fb_var_screeninfo *var,
                        enum omap_color_mode *mode);
-
+struct omap_video_timings;
+void omapfb_fb2dss_timings(struct fb_videomode *fb_timings,
+                       struct omap_video_timings *dss_timings);
+void omapfb_dss2fb_timings(struct omap_video_timings *dss_timings,
+                       struct fb_videomode *fb_timings);
 #endif /* __OMAPFB_H */
diff --git a/include/linux/usb/of.h b/include/linux/usb/of.h
new file mode 100644 (file)
index 0000000..3c03b0c
--- /dev/null
@@ -0,0 +1,36 @@
+/*
+ * OF helpers for usb devices.
+ *
+ * This file is released under the GPLv2
+ */
+
+#ifndef __LINUX_USB_OF_H
+#define __LINUX_USB_OF_H
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/phy.h>
+
+#ifdef CONFIG_OF
+enum usb_phy_interface of_usb_get_phy_mode(struct device_node *np);
+enum usb_dr_mode of_usb_get_dr_mode(struct device_node *np);
+enum usb_device_speed of_usb_get_maximum_speed(struct device_node *np);
+#else
+static inline enum usb_phy_interface of_usb_get_phy_mode(struct device_node *np)
+{
+       return USBPHY_INTERFACE_MODE_UNKNOWN;
+}
+
+static inline enum usb_dr_mode of_usb_get_dr_mode(struct device_node *np)
+{
+       return USB_DR_MODE_UNKNOWN;
+}
+
+static inline enum usb_device_speed
+of_usb_get_maximum_speed(struct device_node *np)
+{
+       return USB_SPEED_UNKNOWN;
+}
+#endif
+
+#endif /* __LINUX_USB_OF_H */
index e8a5fe87c6bdeb0700310503defff73ee630864a..4e8bfbb8024c110413bcc988aca6910723105325 100644 (file)
@@ -99,4 +99,11 @@ otg_start_srp(struct usb_otg *otg)
 /* for OTG controller drivers (and maybe other stuff) */
 extern int usb_bus_start_enum(struct usb_bus *bus, unsigned port_num);
 
+enum usb_dr_mode {
+       USB_DR_MODE_UNKNOWN,
+       USB_DR_MODE_HOST,
+       USB_DR_MODE_PERIPHERAL,
+       USB_DR_MODE_OTG,
+};
+
 #endif /* __LINUX_USB_OTG_H */
index 15847cbdb512b804347b3219d60c7b96563fd9bd..f4cb438165356c5dfc84793e80b73035bdb3dc63 100644 (file)
 #include <linux/notifier.h>
 #include <linux/usb.h>
 
+enum usb_phy_interface {
+       USBPHY_INTERFACE_MODE_UNKNOWN,
+       USBPHY_INTERFACE_MODE_UTMI,
+       USBPHY_INTERFACE_MODE_UTMIW,
+       USBPHY_INTERFACE_MODE_ULPI,
+       USBPHY_INTERFACE_MODE_SERIAL,
+       USBPHY_INTERFACE_MODE_HSIC,
+};
+
 enum usb_phy_events {
        USB_EVENT_NONE,         /* no events or cable disconnected */
        USB_EVENT_VBUS,         /* vbus valid event */
@@ -130,7 +139,7 @@ extern void usb_remove_phy(struct usb_phy *);
 /* helpers for direct access thru low-level io interface */
 static inline int usb_phy_io_read(struct usb_phy *x, u32 reg)
 {
-       if (x->io_ops && x->io_ops->read)
+       if (x && x->io_ops && x->io_ops->read)
                return x->io_ops->read(x, reg);
 
        return -EINVAL;
@@ -138,7 +147,7 @@ static inline int usb_phy_io_read(struct usb_phy *x, u32 reg)
 
 static inline int usb_phy_io_write(struct usb_phy *x, u32 val, u32 reg)
 {
-       if (x->io_ops && x->io_ops->write)
+       if (x && x->io_ops && x->io_ops->write)
                return x->io_ops->write(x, val, reg);
 
        return -EINVAL;
@@ -147,7 +156,7 @@ static inline int usb_phy_io_write(struct usb_phy *x, u32 val, u32 reg)
 static inline int
 usb_phy_init(struct usb_phy *x)
 {
-       if (x->init)
+       if (x && x->init)
                return x->init(x);
 
        return 0;
@@ -156,7 +165,7 @@ usb_phy_init(struct usb_phy *x)
 static inline void
 usb_phy_shutdown(struct usb_phy *x)
 {
-       if (x->shutdown)
+       if (x && x->shutdown)
                x->shutdown(x);
 }
 
@@ -228,7 +237,7 @@ usb_phy_set_power(struct usb_phy *x, unsigned mA)
 static inline int
 usb_phy_set_suspend(struct usb_phy *x, int suspend)
 {
-       if (x->set_suspend != NULL)
+       if (x && x->set_suspend != NULL)
                return x->set_suspend(x, suspend);
        else
                return 0;
@@ -237,7 +246,7 @@ usb_phy_set_suspend(struct usb_phy *x, int suspend)
 static inline int
 usb_phy_notify_connect(struct usb_phy *x, enum usb_device_speed speed)
 {
-       if (x->notify_connect)
+       if (x && x->notify_connect)
                return x->notify_connect(x, speed);
        else
                return 0;
@@ -246,7 +255,7 @@ usb_phy_notify_connect(struct usb_phy *x, enum usb_device_speed speed)
 static inline int
 usb_phy_notify_disconnect(struct usb_phy *x, enum usb_device_speed speed)
 {
-       if (x->notify_disconnect)
+       if (x && x->notify_disconnect)
                return x->notify_disconnect(x, speed);
        else
                return 0;
index 3370bbe01aca6d0415e791094b5a3dc9d9db11bd..7a1c46239f3082a3713cf4212339ef643bb85399 100755 (executable)
@@ -789,11 +789,13 @@ struct omap_dss_device {
                        /* regn is one greater than TRM's REGN value */
                        u16 regn;
                        u16 regm2;
+                       u32 max_pixclk_khz;
                } hdmi;
        } clocks;
 
        struct {
                struct omap_video_timings timings;
+               struct fb_monspecs monspecs;
 
                enum omap_dss_dsi_pixel_format dsi_pix_fmt;
                enum omap_dss_dsi_mode dsi_mode;