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raw | patch | inline | side by side (parent: 7bd9e88)
raw | patch | inline | side by side (parent: 7bd9e88)
author | Sundar Raman <a0393242@ti.com> | |
Thu, 18 Jul 2013 22:40:57 +0000 (17:40 -0500) | ||
committer | Sundar Raman <a0393242@ti.com> | |
Thu, 25 Jul 2013 19:38:16 +0000 (14:38 -0500) |
Modified SOC checks and a few other minor changes.
Change-Id: I426c2f017bea0384c7602dd50c0b558329d79b1a
Signed-off-by: Sundar Raman <a0393242@ti.com>
Change-Id: I426c2f017bea0384c7602dd50c0b558329d79b1a
Signed-off-by: Sundar Raman <a0393242@ti.com>
index aa8be6601bab3e8e80d43e6aa1ac22822129ce4a..c9d7e8feb962408aad7de575e117b469832bc94f 100644 (file)
*/
#include "gcbv.h"
*/
#include "gcbv.h"
-#include <plat/cpu.h>
-#include <plat/omap_hwmod.h>
-
/*******************************************************************************
* BLTsville interface exposure.
/*******************************************************************************
* BLTsville interface exposure.
{
bv_init();
{
bv_init();
- /* Assign BV function parameters only if SoC contains a GC core */
- if (cpu_is_omap447x())
+ if (gc_is_hw_present())
gcbv_assign();
gcbv_assign();
+ else
+ GCERR("gcx hardware is not present\n");
return 0;
}
return 0;
}
index 26939ed0e0ddac5d942cb8021bf0f5ce7ee6c56c..2cc723451ab2f24c2402989166ee5eea52fdd679 100644 (file)
#include <linux/uaccess.h>
#include <linux/pm_runtime.h>
#include <linux/delay.h>
#include <linux/uaccess.h>
#include <linux/pm_runtime.h>
#include <linux/delay.h>
-#include <plat/omap_gcx.h>
#include <linux/opp.h>
#include <linux/io.h>
#include <linux/opp.h>
#include <linux/io.h>
-#include <plat/omap_hwmod.h>
-#include <plat/omap-pm.h>
+#include <linux/platform_data/omap_gcx.h>
#include "gcmain.h"
#include "gcmain.h"
+
+
#define GCZONE_NONE 0
#define GCZONE_ALL (~0U)
#define GCZONE_INIT (1 << 0)
#define GCZONE_NONE 0
#define GCZONE_ALL (~0U)
#define GCZONE_INIT (1 << 0)
static void gcpwr_enable_clock(struct gccorecontext *gccorecontext)
{
static void gcpwr_enable_clock(struct gccorecontext *gccorecontext)
{
- bool ctxlost;
+ int ctxlost;
GCENTER(GCZONE_POWER);
ctxlost = gccorecontext->plat->get_context_loss_count(gccorecontext->device);
GCENTER(GCZONE_POWER);
ctxlost = gccorecontext->plat->get_context_loss_count(gccorecontext->device);
+ GCDBG(GCZONE_POWER, "lost count = %d\n", ctxlost);
if (!gccorecontext->clockenabled) {
/* Enable the clock. */
if (!gccorecontext->clockenabled) {
/* Enable the clock. */
if (ctxlost || (gccorecontext->gcpower == GCPWR_UNKNOWN))
gcpwr_reset(gccorecontext);
if (ctxlost || (gccorecontext->gcpower == GCPWR_UNKNOWN))
gcpwr_reset(gccorecontext);
+
GCEXIT(GCZONE_POWER);
}
GCEXIT(GCZONE_POWER);
}
/* Clock disabled. */
gccorecontext->clockenabled = false;
/* Clock disabled. */
gccorecontext->clockenabled = false;
+
+ /* Reset the current pipe. */
+ gccorecontext->gcpipe = GCPWR_UNKNOWN;
}
GCDBG(GCZONE_POWER, "clock %s.\n",
}
GCDBG(GCZONE_POWER, "clock %s.\n",
GCENTERARG(GCZONE_FREQSCALE, "index=%d\n", index);
GCENTERARG(GCZONE_FREQSCALE, "index=%d\n", index);
+ if (gccorecontext->opp_count == 0)
+ goto exit;
+
if ((index < 0) || (index >= gccorecontext->opp_count)) {
GCERR("invalid index %d.\n", index);
goto exit;
if ((index < 0) || (index >= gccorecontext->opp_count)) {
GCERR("invalid index %d.\n", index);
goto exit;
goto exit;
}
goto exit;
}
+
if (gccorecontext->cur_freq == gccorecontext->opp_freqs[index])
goto exit;
if (gccorecontext->cur_freq == gccorecontext->opp_freqs[index])
goto exit;
* Public API.
*/
* Public API.
*/
+bool gc_is_hw_present(void)
+{
+ struct gccorecontext *gccorecontext = &g_context;
+ return gccorecontext->plat->is_hw_present;
+}
+
+
void gc_caps(struct gcicaps *gcicaps)
{
struct gccorecontext *gccorecontext = &g_context;
void gc_caps(struct gcicaps *gcicaps)
{
struct gccorecontext *gccorecontext = &g_context;
static int gc_probe(struct platform_device *pdev)
{
struct gccorecontext *gccorecontext = &g_context;
static int gc_probe(struct platform_device *pdev)
{
struct gccorecontext *gccorecontext = &g_context;
+ int ret;
GCENTER(GCZONE_PROBE);
gccorecontext->bb2ddevice = &pdev->dev;
gccorecontext->plat = (struct omap_gcx_platform_data *)
pdev->dev.platform_data;
GCENTER(GCZONE_PROBE);
gccorecontext->bb2ddevice = &pdev->dev;
gccorecontext->plat = (struct omap_gcx_platform_data *)
pdev->dev.platform_data;
+
+ if (!gccorecontext->plat->is_hw_present) {
+ GCERR("gc_probe failed. gcx hardware is not present\n");
+ return -ENODEV;
+ }
+
gccorecontext->regbase = gccorecontext->plat->regbase;
gccorecontext->irqline = platform_get_irq(pdev, pdev->id);
gccorecontext->device = &pdev->dev;
gccorecontext->regbase = gccorecontext->plat->regbase;
gccorecontext->irqline = platform_get_irq(pdev, pdev->id);
gccorecontext->device = &pdev->dev;
+
pm_runtime_enable(gccorecontext->device);
gccorecontext->plat->get_context_loss_count(gccorecontext->device);
gc_probe_opp(pdev);
pm_runtime_enable(gccorecontext->device);
gccorecontext->plat->get_context_loss_count(gccorecontext->device);
gc_probe_opp(pdev);
- pm_runtime_get_sync(gccorecontext->device);
+ ret = pm_runtime_get_sync(gccorecontext->device);
gccorecontext->gcmodel = gc_read_reg(GC_CHIP_ID_Address);
gccorecontext->gcrevision = gc_read_reg(GC_CHIP_REV_Address);
gccorecontext->gcmodel = gc_read_reg(GC_CHIP_ID_Address);
gccorecontext->gcrevision = gc_read_reg(GC_CHIP_REV_Address);
GCENTER(GCZONE_INIT);
GCENTER(GCZONE_INIT);
- /* check if hardware is available */
- if (!cpu_is_omap447x()) {
- GCDBG(GCZONE_INIT, "gcx hardware is not present\n");
- goto exit;
- }
-
/* Initialize data structutres. */
GCLOCK_INIT(&gccorecontext->powerlock);
GCLOCK_INIT(&gccorecontext->resetlock);
/* Initialize data structutres. */
GCLOCK_INIT(&gccorecontext->powerlock);
GCLOCK_INIT(&gccorecontext->resetlock);
/* Pulse skipping isn't known. */
gccorecontext->pulseskipping = -1;
/* Pulse skipping isn't known. */
gccorecontext->pulseskipping = -1;
- /* Initialize MMU. */
- if (gcmmu_init(gccorecontext) != GCERR_NONE) {
- GCERR("failed to initialize MMU.\n");
- result = -EINVAL;
- goto fail;
- }
-
result = platform_driver_register(&plat_drv);
if (result < 0) {
GCERR("failed to register platform driver.\n");
result = platform_driver_register(&plat_drv);
if (result < 0) {
GCERR("failed to register platform driver.\n");
}
gccorecontext->platdriver = true;
}
gccorecontext->platdriver = true;
+ /* Initialize MMU. */
+ if (gcmmu_init(gccorecontext) != GCERR_NONE) {
+ GCERR("failed to initialize MMU.\n");
+ result = -EINVAL;
+ goto fail;
+ }
+
#if CONFIG_HAS_EARLYSUSPEND
register_early_suspend(&early_suspend_info);
#endif
#if CONFIG_HAS_EARLYSUSPEND
register_early_suspend(&early_suspend_info);
#endif
/* Create debugfs entry. */
gc_debug_init();
/* Create debugfs entry. */
gc_debug_init();
-exit:
GCEXIT(GCZONE_INIT);
return 0;
GCEXIT(GCZONE_INIT);
return 0;
{
GCENTER(GCZONE_INIT);
{
GCENTER(GCZONE_INIT);
- if (cpu_is_omap447x()) {
+ if (gc_is_hw_present()) {
/* Stop command queue thread. */
gcqueue_stop(gccorecontext);
/* Stop command queue thread. */
gcqueue_stop(gccorecontext);
GCDBG_EXIT();
}
GCDBG_EXIT();
}
+
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("www.vivantecorp.com");
MODULE_AUTHOR("www.ti.com");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("www.vivantecorp.com");
MODULE_AUTHOR("www.ti.com");
index 262522c5084073183f8678bf0e6a7eb3a2629a21..267ada8bab8771150cfe9c1955847cf11a9bb167 100644 (file)
static int dev_open(struct inode *inode, struct file *file)
{
static int dev_open(struct inode *inode, struct file *file)
{
- if (cpu_is_omap447x())
+ if (gc_is_hw_present()) {
return 0;
return 0;
- else
- return -1;
+ } else {
+ GCERR("gcx hardware is not present\n");
+ return -ENODEV;
+ }
}
static int dev_release(struct inode *inode, struct file *file)
}
static int dev_release(struct inode *inode, struct file *file)
diff --git a/include/linux/gccore.h b/include/linux/gccore.h
index ce9ed4fb75ee0ef6e7f5caba79930c3187eefa7d..ae64f2f75c6d6218d9244ba786329a16490e32b8 100644 (file)
--- a/include/linux/gccore.h
+++ b/include/linux/gccore.h
#include "sched.h"
#include "gcioctl.h"
#include "sched.h"
#include "gcioctl.h"
+
+/* Hw availability query */
+bool gc_is_hw_present(void);
+
/* Capability query. */
void gc_caps(struct gcicaps *gcicaps);
/* Capability query. */
void gc_caps(struct gcicaps *gcicaps);