| author | Archit Taneja <archit@ti.com> | |
| Thu, 25 Apr 2013 03:30:45 +0000 (09:00 +0530) | ||
| committer | Archit Taneja <archit@ti.com> | |
| Thu, 25 Apr 2013 04:13:26 +0000 (09:43 +0530) |
Conflicts:
arch/arm/boot/dts/omap4-panda.dts
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap5-sevm.dts
arch/arm/boot/dts/omap5-uevm.dts
arch/arm/mach-omap2/omap-mpuss-lowpower.c
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
arch/arm/boot/dts/omap4-panda.dts
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap5-sevm.dts
arch/arm/boot/dts/omap5-uevm.dts
arch/arm/mach-omap2/omap-mpuss-lowpower.c
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
12 files changed:
diff --cc arch/arm/boot/dts/am33xx.dtsi
Simple merge
diff --cc arch/arm/boot/dts/omap4-panda-es.dts
Simple merge
diff --cc arch/arm/boot/dts/omap4-sdp.dts
index b8aa904035b0382ba260312937e51e9cfc199372,76a2ec3dce4566a774d44ca7d844656e5d6d30db..b8b7cfb870f0b8afbe3147af671d428993d53254
spi-max-frequency = <24000000>;
reg = <0>;
interrupt-parent = <&gpio2>;
- interrupts = <2>; /* gpio line 34 */
+ interrupts = <2 8>; /* gpio line 34, low triggered */
vdd-supply = <&vdd_eth>;
+ enable-active-high;
};
};
diff --cc arch/arm/boot/dts/omap4.dtsi
index b69a8f3810c91446d6bb659af72744a91e5a6602,4725ff7cb4bf88c6e27e2f6902eb89ff6b6ca25c..e059628714204e790b33b7d8f02dd2c6bc6ae473
pinctrl-single,function-mask = <0x7fff>;
};
+ sdma: dma-controller@4a056000 {
+ compatible = "ti,omap4430-sdma";
+ reg = <0x4a056000 0x1000>;
+ interrupts = <0 12 0x4>,
+ <0 13 0x4>,
+ <0 14 0x4>,
+ <0 15 0x4>;
+ #dma-cells = <1>;
+ #dma-channels = <32>;
+ #dma-requests = <127>;
+ };
+
+ dss {
+ compatible = "ti,omap4-dss";
+ ti,hwmods = "dss_core";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dispc {
+ compatible = "ti,omap4-dispc";
+ ti,hwmods = "dss_dispc";
+ };
+
+ dpi: dpi {
+ compatible = "ti,omap4-dpi";
+ video-source = <2>;
+ };
+
+ dsi1: dsi@0 {
+ compatible = "ti,omap4-dsi";
+ ti,hwmods = "dss_dsi1";
+ reg = <0>;
+ vdds_dsi-supply = <&vcxio>;
+ video-source = <0>;
+ };
+
+ dsi2: dsi@1 {
+ compatible = "ti,omap4-dsi";
+ ti,hwmods = "dss_dsi2";
+ reg = <1>;
+ vdds_dsi-supply = <&vcxio>;
+ video-source = <2>;
+ };
+
+ hdmi: hdmi {
+ compatible = "ti,omap4-hdmi", "simple-bus";
+ ti,hwmods = "dss_hdmi";
+ vdda_hdmi_dac-supply = <&vdac>;
+ video-source = <1>;
+ };
+ };
+
gpio1: gpio@4a310000 {
compatible = "ti,omap4-gpio";
reg = <0x4a310000 0x200>;
diff --cc arch/arm/boot/dts/omap5-sevm.dts
index c7c7402d73ae9012aef96c04c1770e2a5298c18b,e533c5d690638d226611645aebd59a05b8bc0f21..520f24cee81580ee3763c3c570ed4e6d9f4cea22
>;
};
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins = <
+ 0x1b2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */
+ 0x1b4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */
+ >;
+ };
+
+ i2c2_pins: pinmux_i2c2_pins {
+ pinctrl-single,pins = <
+ 0x178 0x100 /* i2c2_scl INPUTENABLE | MODE0 */
+ 0x17a 0x100 /* i2c2_sda INPUTENABLE | MODE0 */
+ >;
+ };
+
+ i2c3_pins: pinmux_i2c3_pins {
+ pinctrl-single,pins = <
+ 0x13a 0x100 /* i2c3_scl INPUTENABLE | MODE0 */
+ 0x13c 0x100 /* i2c3_sda INPUTENABLE | MODE0 */
+ >;
+ };
+
+ i2c4_pins: pinmux_i2c4_pins {
+ pinctrl-single,pins = <
+ 0xb8 0x100 /* i2c4_scl INPUTENABLE | MODE0 */
+ 0xba 0x100 /* i2c4_sda INPUTENABLE | MODE0 */
+ >;
+ };
+
+ i2c5_pins: pinmux_i2c5_pins {
+ pinctrl-single,pins = <
+ 0x184 0x100 /* i2c5_scl INPUTENABLE | MODE0 */
+ 0x186 0x100 /* i2c5_sda INPUTENABLE | MODE0 */
+ >;
+ };
++
+ lg4591_pins: pinmux_lg4591_pins {
+ pinctrl-single,pins = <
+ 0xf2 0x8 /* perslimbus2_clock.gpio6_183 OUTPUT PULLDOWN | MODE0 */
+ >;
+ };
+
+ dss_hdmi_pins: pinmux_dss_hdmi_pins {
+ pinctrl-single,pins = <
+ 0x0fc 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+ 0x100 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
+ 0x102 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
+ >;
+ };
+
+ tpd12s015_pins: pinmux_tpd12s015_pins {
+ pinctrl-single,pins = <
+ 0x0fe 0x116 /* hdmi_hpd.gpio7_193 INPUT PULLDOWN | MODE6 */
+ >;
+ };
+
+ tca6424a_pins: pinmux_tca6424a_pins {
+ pinctrl-single,pins = <
+ 0x186 0x100 /* i2c5_scl.i2c5_scl INPUT | MODE0 */
+ 0x188 0x100 /* i2c5_sda.i2c5_sda INPUT | MODE0 */
+ >;
+ };
+
};
&mmc1 {
};
&i2c5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5_pins>;
+
+ clock-frequency = <400000>;
++
+ tca6424a: tca6424a@22 {
+ compatible = "ti,tca6424a";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&keypad {
diff --cc arch/arm/boot/dts/omap5-uevm.dts
index 09efdf8db525bedbe555a7b21d37308a0fc5c3a9,73b541246cec5adc428985f3a6db8fdfceb34855..9bc63527fa27a1b315c66010d55db4d865fb2eed
status = "disabled";
};
- &i2c2 {
- clock-frequency = <400000>;
-
- /* Pressure Sensor */
- bmp085@77 {
- compatible = "bosch,bmp085";
- reg = <0x77>;
- };
- };
-
- &i2c4 {
- clock-frequency = <400000>;
-
- /* Temperature Sensor */
- tmp102@48{
- compatible = "ti,tmp102";
- reg = <0x48>;
- };
- };
-
+&i2c5 {
+ tca6424a: tca6424a@22 {
+ compatible = "ti,tca6424a";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
&mcbsp3 {
status = "disabled";
};
diff --cc arch/arm/boot/dts/omap5.dtsi
Simple merge
diff --cc arch/arm/configs/omap2plus_defconfig
index 6ddb47dc7cea57bef7e41153cef725da2f1dff1c,91c62b81e2f51e9d8318e8b6f4e138a082ab021b..470e35fc99163bb41c06e51eaa01e9959da1ad7f
CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y
CONFIG_RTC_CLASS=y
+ CONFIG_RTC_DRV_OMAP=y
CONFIG_RTC_DRV_TWL92330=y
CONFIG_RTC_DRV_TWL4030=y
+CONFIG_RTC_DRV_PALMAS=y
CONFIG_DMADEVICES=y
CONFIG_DMA_OMAP=y
+CONFIG_STAGING=y
+CONFIG_DRM_OMAP=y
+CONFIG_DRM_OMAP_NUM_CRTCS=3
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
diff --cc arch/arm/mach-omap2/Makefile
index 1b4b70d7b2e9beb7526ba95e3542f8f9de79f6ad,bfc50cb8807c281611df27c8e9027869bf786c6e..04c072ef0bef4c319ca127c287500abea53ecc1a
# Common support
obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \
common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
- omap_device.o sram.o
+ omap_device.o sram.o debugss.o
omap-2-3-common = irq.o
-hwmod-common = omap_hwmod.o \
+hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
omap_hwmod_common_data.o
clock-common = clock.o clock_common_data.o \
clkt_dpll.o clkt_clksel.o
Simple merge
diff --cc arch/arm/mach-omap2/omap_hwmod.c
Simple merge
index 3ccdde1bfe8418f37b1e84c934107418f1af12b8,8584201af82649f2adf2e57876ccfb90835b44d6..d36580d2679d1237aea423ebd093a571e8886566
#endif
+/* ocmcram */
+static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
+ .name = "ocmcram",
+};
+
+static struct omap_hwmod am33xx_ocmcram_hwmod = {
+ .name = "ocmcram",
+ .class = &am33xx_ocmcram_hwmod_class,
+ .clkdm_name = "l3_clkdm",
+ .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .main_clk = "l3_gclk",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+ /*
+ * 'debugss' class
+ * debug sub system
+ */
+ static struct omap_hwmod_opt_clk debugss_opt_clks[] = {
+ { .role = "dbg_sysclk", .clk = "dbg_sysclk_ck" },
+ { .role = "dbg_clka", .clk = "dbg_clka_ck" },
+ };
+
+ static struct omap_hwmod_class am33xx_debugss_hwmod_class = {
+ .name = "debugss",
+ };
+
+ static struct omap_hwmod am33xx_debugss_hwmod = {
+ .name = "debugss",
+ .class = &am33xx_debugss_hwmod_class,
+ .clkdm_name = "l3_aon_clkdm",
+ .main_clk = "trace_clk_div_ck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM33XX_CM_WKUP_DEBUGSS_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+ .opt_clks = debugss_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(debugss_opt_clks),
+ };
+
/* 'smartreflex' class */
static struct omap_hwmod_class am33xx_smartreflex_hwmod_class = {
.name = "smartreflex",