Merge branch 'pm-linux-3.8.y' of git://git.ti.com/~kristo/ti-linux-kernel/pm-linux...
authorDan Murphy <dmurphy@ti.com>
Tue, 23 Apr 2013 16:05:46 +0000 (11:05 -0500)
committerDan Murphy <dmurphy@ti.com>
Tue, 23 Apr 2013 16:05:46 +0000 (11:05 -0500)
TI-Feature: power_management
TI-Tree: git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree.git
TI-Branch: pm-linux-3.8.y

* 'pm-linux-3.8.y' of git://git.ti.com/~kristo/ti-linux-kernel/pm-linux-feature-tree: (33 commits)
  staging: ti-soc-thermal: fix device removal
  staging: ti-soc-thermal: update OMAP5 extrapolation rules
  staging: ti-soc-thermal: introduce OMAP4430 extrapolation constants
  staging: ti-soc-thermal: Remove TC1/TC2 TODO (already done)
  staging: ti-soc-thermal: fix min/max TODO (already done)
  staging: ti-soc-thermal: update TODO list
  staging: ti-soc-thermal: Add get_trend support
  staging: ti-soc-thermal:Introduce ti_bandgap_get_trend function for OMAP5
  staging: ti-soc-thermal: Enable HISTORY_BUFFER Feature for OMAP5
  staging: ti-soc-thermal: Introduce HAS_HISTORY_BUFFER feature for bandgap
  staging: ti-soc-thermal: Modify update_interval r/w functions to incorporate the OMAP5 feature of COUNTER_DELAY.
  staging: ti-soc-thermal: Enable COUNTER_DELAY feature for OMAP5
  staging: ti-soc-thermal: Introduce HAS_COUNTER_DELAY feature for bandgap
  staging: ti-soc-thermal: Initialise counter_delay field for OMAP5 sensors
  staging: ti-soc-thermal: Add counter_delay_mask field to temp_sensor_registers struct
  arm: omap2plus_defconfig: enable TI bandgap driver
  staging: ti-soc-thermal: defer probe if cpufreq is not ready
  cpufreq: Add a get_current_driver helper
  arm: add bandgap DT entry for OMAP5
  ARM: OMAP3+: use cpu0-cpufreq driver in device tree supported boot(v4)
  ...

Conflicts:
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/omap5.dtsi
arch/arm/configs/omap2plus_defconfig
arch/arm/mach-omap2/omap-mpuss-lowpower.c
arch/arm/mach-omap2/omap_hwmod_33xx_data.c

Signed-off-by: Dan Murphy <dmurphy@ti.com>
17 files changed:
1  2 
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/omap3-beagle-xm.dts
arch/arm/boot/dts/omap3-beagle.dts
arch/arm/boot/dts/omap3-evm.dts
arch/arm/boot/dts/omap3-overo.dtsi
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap4-sdp.dts
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap5-sevm.dts
arch/arm/boot/dts/omap5-uevm.dts
arch/arm/boot/dts/omap5.dtsi
arch/arm/boot/dts/twl4030.dtsi
arch/arm/configs/omap2plus_defconfig
arch/arm/mach-omap2/board-generic.c
arch/arm/mach-omap2/cclock33xx_data.c
arch/arm/mach-omap2/cclock54xx_data.c
arch/arm/mach-omap2/omap_hwmod_33xx_data.c

index 6dd9674cb1a29563affc246bf9a6dab48dced6df,f70e0846522f98e68c1fe7af524f3e77f948fdd7..970c015acb83a318b0564dd4e1fd6816072e7640
                        reg = <0x48200000 0x1000>;
                };
  
 +              edma: edma@49000000 {
 +                      compatible = "ti,edma3";
 +                      ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
 +                      reg =   <0x49000000 0x10000>,
 +                              <0x44e10f90 0x10>;
 +                      interrupt-parent = <&intc>;
 +                      interrupts = <12 13 14>;
 +                      #dma-cells = <1>;
 +                      dma-channels = <64>;
 +                      ti,edma-regions = <4>;
 +                      ti,edma-slots = <256>;
 +                      ti,edma-queue-tc-map = <0 0
 +                                              1 1
 +                                              2 2>;
 +                      ti,edma-queue-priority-map = <0 0
 +                                                    1 1
 +                                                    2 2>;
 +                      ti,edma-default-queue = <0>;
 +              };
 +
+               dpll_mpu: dpll_mpu {
+                       #clock-cells = <0>;
+                       compatible = "ti,omap-clock";
+               };
                gpio0: gpio@44e07000 {
                        compatible = "ti,omap4-gpio";
                        ti,hwmods = "gpio1";
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index ed7fc47d0d5ede18d81c54122bfb10027e6c025a,5ede6e1296a12f89b06a9b7b16eb321c20d04b6f..f20e10ebfdc03d64e930d16592ec62469088b85e
                        interrupts = <0 80 0x4>;
                        ti,hwmods = "wd_timer2";
                };
 +
 +              dss {
 +                      compatible = "ti,omap4-dss";
 +                      ti,hwmods = "dss_core";
 +                      #address-cells = <1>;
 +                      #size-cells = <0>;
 +
 +                      dispc {
 +                              compatible = "ti,omap4-dispc";
 +                              ti,hwmods = "dss_dispc";
 +                      };
 +
 +                      dpi: dpi {
 +                              compatible = "ti,omap4-dpi";
 +                              video-source = <2>;
 +                      };
 +
 +                      dsi1: dsi@1 {
 +                              compatible = "ti,omap4-dsi";
 +                              ti,hwmods = "dss_dsi1_a";
 +                              reg = <0>;
 +                              vdds_dsi-supply = <&ldo7_reg>;
 +                              video-source = <0>;
 +                      };
 +
 +                      dsi2: dsi@2 {
 +                              compatible = "ti,omap4-dsi";
 +                              ti,hwmods = "dss_dsi1_c";
 +                              reg = <1>;
 +                              vdds_dsi-supply = <&ldo7_reg>;
 +                              video-source = <2>;
 +                      };
 +
 +                      hdmi: hdmi {
 +                              compatible = "ti,omap4-hdmi", "simple-bus";
 +                              ti,hwmods = "dss_hdmi";
 +                              vdda_hdmi_dac-supply = <&ldo7_reg>;
 +                              video-source = <1>;
 +                      };
 +              };
++
+               bandgap {
+                       reg = <0x4a0021e0 0xc
+                               0x4a00232c 0xc
+                               0x4a002380 0x2c
+                               0x4a0023C0 0x3c>;
+                               interrupts = <0 126 4>; /* talert */
+                       compatible = "ti,omap5430-bandgap";
+               };
        };
  };
Simple merge
index 10561f4d6239c47d1d3060592395d3315ba25d7e,e5b58cd8d5c0456471c60d651861e3830b8fb13f..15cd735d9259635b4fbb4e9e4109d0706c0bc324
@@@ -144,9 -138,15 +144,16 @@@ CONFIG_GPIO_TWL4030=
  CONFIG_W1=y
  CONFIG_POWER_SUPPLY=y
  CONFIG_WATCHDOG=y
+ CONFIG_THERMAL=y
+ CONFIG_THERMAL_HWMON=y
+ CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+ CONFIG_THERMAL_GOV_FAIR_SHARE=y
+ CONFIG_THERMAL_GOV_STEP_WISE=y
+ CONFIG_THERMAL_GOV_USER_SPACE=y
+ CONFIG_CPU_THERMAL=y
  CONFIG_OMAP_WATCHDOG=y
  CONFIG_TWL4030_WATCHDOG=y
 +CONFIG_PALMAS_WATCHDOG=y
  CONFIG_MFD_TPS65217=y
  CONFIG_REGULATOR_TWL4030=y
  CONFIG_MFD_PALMAS=y
@@@ -251,11 -220,12 +258,15 @@@ CONFIG_RTC_DRV_TWL92330=
  CONFIG_RTC_DRV_TWL4030=y
  CONFIG_RTC_DRV_PALMAS=y
  CONFIG_DMADEVICES=y
 +CONFIG_TI_EDMA=y
  CONFIG_DMA_OMAP=y
  CONFIG_STAGING=y
 +CONFIG_DRM_OMAP=y
 +CONFIG_DRM_OMAP_NUM_CRTCS=3
+ CONFIG_TI_SOC_THERMAL=y
+ CONFIG_TI_THERMAL=y
+ CONFIG_OMAP4_THERMAL=y
+ CONFIG_OMAP5_THERMAL=y
  CONFIG_EXT2_FS=y
  CONFIG_EXT3_FS=y
  # CONFIG_EXT3_FS_XATTR is not set
Simple merge
Simple merge
Simple merge
index 679f4c1dc9a166e446953c35544349cb2b9db080,e9959ff5c0b7f0c66a803362a517aae1acbeff53..b56b91d0968e2b75b0396f3ea5fb327087708f2d
@@@ -579,6 -572,27 +579,25 @@@ static struct omap_hwmod am33xx_sha0_hw
        },
  };
  
 -#endif
 -
+ /* ocmcram */
+ static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
+       .name = "ocmcram",
+ };
+ static struct omap_hwmod am33xx_ocmcram_hwmod = {
+       .name           = "ocmcram",
+       .class          = &am33xx_ocmcram_hwmod_class,
+       .clkdm_name     = "l3_clkdm",
+       .flags          = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+       .main_clk       = "l3_gclk",
+       .prcm           = {
+               .omap4  = {
+                       .clkctrl_offs   = AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET,
+                       .modulemode     = MODULEMODE_SWCTRL,
+               },
+       },
+ };
  /*
   * 'debugss' class
   * debug sub system