OMAPDSS: Restore dss clock configuration for display skip init case

DSS clock configuration is required for overlay scaling function
to work correctly. Restore this logic and disable only the pm
runtime enable logic which was causing a hang during display
skip init case.

Change-Id: I2665733371eb23f64436a41df090be7d6decaa7e
Signed-off-by: Sundar Raman <sunds@ti.com>

diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 086c42a748914eb3fb5dc9dc625e63a15e677ad5..210a0bc9a38f3310461d279b1a7fa0588c75ca79 100644 (file)
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -995,32 +995,31 @@ static int __init omap_dsshw_probe(struct platform_device *pdev)
                return -ENOMEM;
        }
 
+       r = dss_get_clocks();
+       if (r)
+               return r;
+
+       r = dss_setup_default_clock();
+       if (r)
+               goto err_setup_clocks;
+
 #ifdef CONFIG_DISPLAY_SKIP_INIT
        if (!omapdss_skipinit()) {
 #endif
-               r = dss_get_clocks();
-               if (r)
-                       return r;
-
-               r = dss_setup_default_clock();
-               if (r)
-                       goto err_setup_clocks;
-
                pm_runtime_enable(&pdev->dev);
 
                r = dss_runtime_get();
                if (r)
                        goto err_runtime_get;
-
-               dss.dss_clk_rate = clk_get_rate(dss.dss_clk);
-
-               /* Select DPLL */
-               REG_FLD_MOD(DSS_CONTROL, 0, 0, 0);
-
-               dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
 #ifdef CONFIG_DISPLAY_SKIP_INIT
        }
 #endif
+       dss.dss_clk_rate = clk_get_rate(dss.dss_clk);
+
+       /* Select DPLL */
+       REG_FLD_MOD(DSS_CONTROL, 0, 0, 0);
+
+       dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
 
 #ifdef CONFIG_OMAP2_DSS_VENC
        REG_FLD_MOD(DSS_CONTROL, 1, 4, 4);      /* venc dac demen */