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raw | patch | inline | side by side (parent: de7ab2b)
author | Lajos Molnar <lajos@ti.com> | |
Sat, 9 Jun 2012 10:07:22 +0000 (15:37 +0530) | ||
committer | Praneeth Bajjuri <praneeth@ti.com> | |
Fri, 12 Jul 2013 22:28:58 +0000 (17:28 -0500) |
1. Change hdmi_timings to fb_videomode that contains the same
information (and more) as the private hdmi_timigs
Use fb modedb to get timings and CEA pixel ratio info.
Relaxed mode checking to allow 0.5% tolerance in the
pixel clock - as required by CEA standard.
2. Change mode lifecycle
- on HDMI power ON, first select VGA mode, as this is the universally
supported format
- before disabling HDMI, reset mode so that if starts in VGA again.
However, do not do this in hdmi_power_off, only in disable display,
so we keep the mode on suspend, as there will be no hpd event forcing
an edid read.
3. Added set_mode hook to HDMI which now implements this call.
Change-Id: Iaf0e88527ee5860fc7c8c1ac04dea1fb4bed67ff
Signed-off-by: Lajos Molnar <lajos@ti.com>
Signed-off-by: Varadarajan, Charulatha <charu@ti.com>
Signed-off-by: Muralidhar Dixit <murali.dixit@ti.com>
information (and more) as the private hdmi_timigs
Use fb modedb to get timings and CEA pixel ratio info.
Relaxed mode checking to allow 0.5% tolerance in the
pixel clock - as required by CEA standard.
2. Change mode lifecycle
- on HDMI power ON, first select VGA mode, as this is the universally
supported format
- before disabling HDMI, reset mode so that if starts in VGA again.
However, do not do this in hdmi_power_off, only in disable display,
so we keep the mode on suspend, as there will be no hpd event forcing
an edid read.
3. Added set_mode hook to HDMI which now implements this call.
Change-Id: Iaf0e88527ee5860fc7c8c1ac04dea1fb4bed67ff
Signed-off-by: Lajos Molnar <lajos@ti.com>
Signed-off-by: Varadarajan, Charulatha <charu@ti.com>
Signed-off-by: Muralidhar Dixit <murali.dixit@ti.com>
drivers/video/omap2/omapfb/Kconfig | patch | blob | history | |
drivers/video/omap2/omapfb/omapfb-main.c | patch | blob | history |
index 4cb12ce68855ae998644a8454e8802494173659a..57b722307515d481f82a0b2baa5ef192946a97cb 100644 (file)
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
+ select FB_MODE_HELPERS
help
Frame buffer driver for OMAP2+ based boards.
index dfb6635c1caa8fd672192d4eeaf8b538e2f67b7e..34af88837be34438c2a58271ecd78a5ff65ca0b5 100644 (file)
@@ -1022,6 +1022,41 @@ static int omapfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi)
return r;
}
+void omapfb_fb2dss_timings(struct fb_videomode *fb_timings,
+ struct omap_video_timings *dss_timings)
+{
+ dss_timings->x_res = fb_timings->xres;
+ dss_timings->y_res = fb_timings->yres;
+ if (fb_timings->vmode & FB_VMODE_INTERLACED)
+ dss_timings->y_res /= 2;
+ dss_timings->pixel_clock = fb_timings->pixclock ?
+ PICOS2KHZ(fb_timings->pixclock) : 0;
+ dss_timings->hfp = fb_timings->right_margin;
+ dss_timings->hbp = fb_timings->left_margin;
+ dss_timings->hsw = fb_timings->hsync_len;
+ dss_timings->vfp = fb_timings->lower_margin;
+ dss_timings->vbp = fb_timings->upper_margin;
+ dss_timings->vsw = fb_timings->vsync_len;
+}
+EXPORT_SYMBOL(omapfb_fb2dss_timings);
+
+void omapfb_dss2fb_timings(struct omap_video_timings *dss_timings,
+ struct fb_videomode *fb_timings)
+{
+ memset(fb_timings, 0, sizeof(*fb_timings));
+ fb_timings->xres = dss_timings->x_res;
+ fb_timings->yres = dss_timings->y_res;
+ fb_timings->pixclock = dss_timings->pixel_clock ?
+ KHZ2PICOS(dss_timings->pixel_clock) : 0;
+ fb_timings->right_margin = dss_timings->hfp;
+ fb_timings->left_margin = dss_timings->hbp;
+ fb_timings->hsync_len = dss_timings->hsw;
+ fb_timings->lower_margin = dss_timings->vfp;
+ fb_timings->upper_margin = dss_timings->vbp;
+ fb_timings->vsync_len = dss_timings->vsw;
+}
+EXPORT_SYMBOL(omapfb_dss2fb_timings);
+
/* set the video mode according to info->var */
static int omapfb_set_par(struct fb_info *fbi)
{