ARM: DRA722: Add ID detect for Silicon Rev 2.0

Silicon Rev 2.0 is a minor variant of Rev 1.0. Rev 2.0 is an incremental revision
with various fixes including the following:
    - Reset logic fixes
    - Few asymetric aging logic fixes
    - Ethernet speed fixes
    - EDMA fixes for McASP

Change-Id: Ifb0619dbf55d4108a2cb181c09c3408bfb167d62
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>

diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6e0876915a3fbf832ab6febcf8c04aad10a0d464..3638ffb796b29bae4f63160a66e90b99b20b2626 100644 (file)
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -662,9 +662,9 @@ void __init dra7xxx_check_revision(void)
                case 0:
                        omap_revision = DRA722_REV_ES1_0;
                        break;
+               case 1:
                default:
-                       /* If we have no new revisions */
-                       omap_revision = DRA722_REV_ES1_0;
+                       omap_revision = DRA722_REV_ES2_0;
                        break;
                }
                break;

diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index f4f3825621daa7c02ba1966ef2938af8545c2169..ec468672a2ad896f07e2f7af42af317f244aaa2e 100644 (file)
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -471,6 +471,7 @@ IS_OMAP_TYPE(3430, 0x3430)
 #define DRA752_REV_ES1_1       (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
 #define DRA752_REV_ES2_0       (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
 #define DRA722_REV_ES1_0       (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
+#define DRA722_REV_ES2_0       (DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8))
 
 void omap2xxx_check_revision(void);
 void omap3xxx_check_revision(void);