omapdss: TFCS panel: fix pixel clock polarity

Fixed the pixel clock polarity so that the HSYNC and VSYNC
are driven on rising edge of pixel clock. For this panel
the HSYNC and VSYNC should be drivern on the rising edge
and not on the falling edge of the clock.

Change-Id: Ib01edb3f5a19907ff37d0f55af51447dc2a5c3b3
Signed-off-by: Subramaniam Chanderashekarapuram <subramaniam.ca@ti.com>

diff --git a/drivers/video/omap2/displays/panel-tfcs9700.c b/drivers/video/omap2/displays/panel-tfcs9700.c
index 4f37afacfa69e33792fb54b40d7a130b93279860..3636e1e1d172e051e38ce72aa124e334df87fe9a 100644 (file)
--- a/drivers/video/omap2/displays/panel-tfcs9700.c
+++ b/drivers/video/omap2/displays/panel-tfcs9700.c
@@ -60,7 +60,7 @@ static const struct omap_video_timings tfc_s9700_default_timings = {
        .hsync_level    = OMAPDSS_SIG_ACTIVE_LOW,
        .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
        .de_level       = OMAPDSS_SIG_ACTIVE_HIGH,
-       .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
+       .sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
 };
 
 struct panel_drv_data {