| author | Praneeth Bajjuri <praneeth@ti.com> | |
| Mon, 10 Jun 2013 21:27:12 +0000 (16:27 -0500) | ||
| committer | Praneeth Bajjuri <praneeth@ti.com> | |
| Mon, 10 Jun 2013 21:27:12 +0000 (16:27 -0500) |
* p-ti-linux-3.8.y: (443 commits)
TI-Integration: ARM: OMAP2+: Fix merege by restoring omap_mcasp_init() call
omapdss: TFCS panel: Check for successful TLC driver registration before using it
omapdss: DSS DPLLs: Ignore PLL_PWR_STATUS on DRA7
ARM: DRA7: dts: Add the sdma dt node and corresponding dma request lines for mmc
ARM: dra7: dts: Add a fixed regulator node needed for eMMC
arm/dts: dra7: Add ldo regulator for mmc1
arm/dts: dra7: Add mmc controller nodes and board data
ARM: DRA: hwmod: Correct the dma line names for mmc
arch: arm: configs: Add support for DRA7 evm in omap2plus_defconfig
arm: dts: dra7-evm: Add pinmux configs needed for display
HACK: pinctrl: pinctrl single: Make pinctrl-single init early
OMAPDSS:HDMI: Change PLL calculations
omapdss: hdmi: fix deepcolor mode configuration
ARM: dts: DRA7x: Add DMM bindings
omapdrm: hack: Assign managers/channel to outputs in a more trivial way
gpu: drm: omap: Use bitmaps for placement
drm/omap: Fix and improve crtc and overlay manager correlation
drm/omap: fix modeset_init if a panel doesn't satisfy omapdrm requirements
drm/omap: Take a fb reference in omap_plane_update()
drm/omap: move out of staging
...
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
TI-Integration: ARM: OMAP2+: Fix merege by restoring omap_mcasp_init() call
omapdss: TFCS panel: Check for successful TLC driver registration before using it
omapdss: DSS DPLLs: Ignore PLL_PWR_STATUS on DRA7
ARM: DRA7: dts: Add the sdma dt node and corresponding dma request lines for mmc
ARM: dra7: dts: Add a fixed regulator node needed for eMMC
arm/dts: dra7: Add ldo regulator for mmc1
arm/dts: dra7: Add mmc controller nodes and board data
ARM: DRA: hwmod: Correct the dma line names for mmc
arch: arm: configs: Add support for DRA7 evm in omap2plus_defconfig
arm: dts: dra7-evm: Add pinmux configs needed for display
HACK: pinctrl: pinctrl single: Make pinctrl-single init early
OMAPDSS:HDMI: Change PLL calculations
omapdss: hdmi: fix deepcolor mode configuration
ARM: dts: DRA7x: Add DMM bindings
omapdrm: hack: Assign managers/channel to outputs in a more trivial way
gpu: drm: omap: Use bitmaps for placement
drm/omap: Fix and improve crtc and overlay manager correlation
drm/omap: fix modeset_init if a panel doesn't satisfy omapdrm requirements
drm/omap: Take a fb reference in omap_plane_update()
drm/omap: move out of staging
...
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
504 files changed:
diff --git a/Documentation/devicetree/bindings/arm/omap/dmm.txt b/Documentation/devicetree/bindings/arm/omap/dmm.txt
--- /dev/null
@@ -0,0 +1,17 @@
+OMAP Dynamic Memory Manager (DMM) bindings
+
+Required properties:
+- compatible: Must be "ti,omap4-dmm" for OMAP4 family
+ Must be "ti,omap5-dmm" for OMAP5 family
+- reg: Contains timer register address range (base address and length)
+- interrupts: Contains interrupt information (source, etc) for the DMM IRQ
+- ti,hwmods: Name of the hwmod associated to the counter, which is typically
+ "dmm"
+
+Example:
+
+dmm: dmm@4e000000 {
+ compatible = "ti,omap4-dmm";
+ reg = <0x4e000000 0x800>;
+ ti,hwmods = "dmm";
+};
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt
index d0051a7505873e14d17c5a8718179f19475a78bc..4f87488af6cb7e402126b8a766d482fa38492638 100644 (file)
- OMAP5 EVM : Evaluation Module
compatible = "ti,omap5-evm", "ti,omap5"
+
+- DRA7 EVM: Software Developement Board for DRA7XX
+ compatible = "ti,dra7-evm", "ti,dra7"
diff --git a/Documentation/devicetree/bindings/clock/omap-clock.txt b/Documentation/devicetree/bindings/clock/omap-clock.txt
--- /dev/null
@@ -0,0 +1,40 @@
+Device Tree Clock bindings for Texas Instrument's OMAP compatible platforms
+
+This binding is an initial minimal binding that may be enhanced as part of
+transitioning OMAP clock data out of kernel image.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be "ti,omap-clock"
+- #clock-cells : from common clock binding; shall be set to 0.
+NOTE:
+node name should map to clock database in arch/arm/mach-omap2/cclock<SoC>_data.c
+Since all clocks are described with _ck, the node name is optimized to drop the
+usage of _ck. For example, a clock called dpll1_ck will be defined as dpll1.
+
+Example #1: describing clock node for CPU on OMAP34xx platform:
+Ref: arch/arm/mach-omap2/cclock3xxx_data.c
+describes the CPU clock to be as follows
+ CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX),
+Corresponding binding will be:
+ dpll1: dpll1 {
+ #clock-cells = <0>;
+ compatible = "ti,omap-clock";
+ };
+And it's usage will be:
+ clocks = <&dpll1>;
+
+Example #2: describing clock node for auxilary clock #3 on OMAP443x platform:
+Ref: arch/arm/mach-omap2/cclock44xx_data.c
+describes the auxclk3 clock to be as follows:
+ CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X),
+Corresponding binding will be:
+ auxclk3: auxclk3 {
+ #clock-cells = <0>;
+ compatible = "ti,omap-clock";
+ };
+And it's usage will be:
+ clocks = <&auxclk3>;
diff --git a/Documentation/devicetree/bindings/clock/palmas-clk.txt b/Documentation/devicetree/bindings/clock/palmas-clk.txt
--- /dev/null
@@ -0,0 +1,27 @@
+* palmas and palmas-charger resource clock IP block devicetree bindings
+
+Required properties:
+- compatible : Should be from the list
+ ti,twl6035-clk
+ ti,twl6036-clk
+ ti,twl6037-clk
+ ti,tps65913-clk
+ ti,tps65914-clk
+ ti,tps80036-clk
+and also the generic series names
+ ti,palmas-clk
+
+Optional properties:
+- ti,clk32g-mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - on
+- ti,clkg32kgaudio-mode-sleep - see above
+
+Example:
+
+clk {
+ compatible = "ti,twl6035-clk", "ti,palmas-clk";
+ ti,clk32kg-mode-sleep = <0>;
+ ti,clk32kgaudio-mode-sleep = <0>;
+ #clock-cells = <1>;
+ clock-frequency = <32000000>;
+ clock-names = "clk32kg", "clk32kgaudio";
+};
diff --git a/Documentation/devicetree/bindings/gpio/gpio-palmas.txt b/Documentation/devicetree/bindings/gpio/gpio-palmas.txt
--- /dev/null
@@ -0,0 +1,35 @@
+* palmas and palmas charger GPIO IP block devicetree bindings
+
+Required properties:
+- compatible : Should be from the list
+ ti,twl6035-gpio
+ ti,twl6036-gpio
+ ti,twl6037-gpio
+ ti,tps65913-gpio
+ ti,tps65914-gpio
+ ti,tps80036-gpio
+
+and also the generic series names
+
+ ti,palmas-gpio
+
+- gpio-controller: mark the device as a GPIO controller
+- gpio-cells = <1>: GPIO lines are provided.
+- interrupt-controller : palmas has its own internal IRQs
+- #interrupt-cells : should be set to 2 for IRQ number and flags
+ The first cell is the IRQ number.
+ The second cell is the flags, encoded as the trigger masks from
+ Documentation/devicetree/bindings/interrupts.txt
+- interrupt-parent : The parent interrupt controller.
+
+Example:
+
+gpio {
+ compatible = "ti,twl6035-gpio", "ti,palmas-gpio";
+
+ gpio-controller;
+ #gpio-cells = <1>;
+ interrupt-parent = <&palmas>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+};
diff --git a/Documentation/devicetree/bindings/input/palmas-pwrbutton.txt b/Documentation/devicetree/bindings/input/palmas-pwrbutton.txt
--- /dev/null
@@ -0,0 +1,26 @@
+* palmas and palmas-charger Button IP block devicetree bindings
+
+Required properties:
+- compatible : Should be from the list
+ ti,twl6035-pwrbutton
+ ti,twl6036-pwrbutton
+ ti,twl6037-pwrbutton
+ ti,tps65913-pwrbutton
+ ti,tps65914-pwrbutton
+ ti,tps80036-pwrbutton
+and also the generic series names
+ ti,palmas-pwrbutton
+
+- interrupts: the interrupt outputs of the controller.
+- interrupt-names : Should be the name of irq resource. Each interrupt
+ binds its interrupt-name.
+- interrupt-parent : The parent interrupt controller.
+
+Example:
+
+pwrbutton {
+ compatible = "ti,twl6035-pwrbutton", "ti,palmas-pwrbutton";
+ interrupt-parent = <&palmas>;
+ interrupts = <1 0>;
+ interrupt-names = "pwron-irq";
+};
diff --git a/Documentation/devicetree/bindings/leds/leds-palmas.txt b/Documentation/devicetree/bindings/leds/leds-palmas.txt
--- /dev/null
@@ -0,0 +1,36 @@
+* palmas and palmas-charger LED IP block devicetree bindings
+
+Required properties:
+- compatible : Should be from the list
+ ti,twl6035-leds
+ ti,twl6036-leds
+ ti,twl6037-leds
+ ti,tps65913-leds
+ ti,tps65914-leds
+ ti,tps80036-leds
+and also the generic series names
+ ti,palmas-leds
+
+Optional properties:
+-ti,led1-current - sink current setting 0 - 0mA, 1 - 25mA, 2 - 5mA,
+ 3 - 0mA, 4 - 5mA, 5 - 5mA, 6 - 10.0mA, 7 - 0mA
+-ti,led2-current - see above
+-ti,led3-current - see above
+-ti,led4-current - see above
+-ti,chrg-led-mode - only valid for charger - mode for charging led operation
+ 0 - Charging indicator
+ 1 - controlled as a general purpose LED
+-ti,chrg-led-vbat-low - only valid for charger - blinking of low battery led
+ 0 - blinking is enabled,
+ 1 - blinking is disabled
+
+Example:
+leds {
+ compatible = "ti,twl6035-leds", "ti,palmas-leds";
+ ti,led1-current = <0>;
+ ti,led2-current = <0>;
+ ti,led3-current = <0>;
+ ti,led4-current = <0>;
+ ti,chrg-led-mode = <0>;
+ ti,chrg-led-vbat-low = <0>;
+};
diff --git a/Documentation/devicetree/bindings/mfd/palmas.txt b/Documentation/devicetree/bindings/mfd/palmas.txt
index 94a0c12789461f399244d206f130adf2081b564a..3defba700eed5a3414689396325ca73049bd007f 100644 (file)
-Texas Instruments Palmas family
-
-The Palmas familly are Integrated Power Management Chips.
-These chips are connected to an i2c bus.
+* palmas and palmas-charger device tree bindings
+The TI palmas family current members :-
+twl6035 (palmas)
+twl6036 (palmas-charger)
+twl6037 (palmas)
+tps65913 (palmas)
+tps65914 (palmas)
+tps80036 (palmas-charger)
Required properties:
-- compatible : Must be "ti,palmas";
- For Integrated power-management in the palmas series, twl6035, twl6037,
- tps65913
-- interrupts : This i2c device has an IRQ line connected to the main SoC
-- interrupt-controller : Since the palmas support several interrupts internally,
- it is considered as an interrupt controller cascaded to the SoC one.
-- #interrupt-cells = <1>;
+- compatible : Should be from the list
+ ti,twl6035
+ ti,twl6036
+ ti,twl6037
+ ti,tps65913
+ ti,tps65914
+ ti,tps80036
+ ti,tps659038
+and also the generic series names
+ ti,palmas
+ ti,palmas-charger
+- interrupt-controller : palmas has its own internal IRQs
+- #interrupt-cells : should be set to 2 for IRQ number and flags
+ The first cell is the IRQ number.
+ The second cell is the flags, encoded as the trigger masks from
+ Documentation/devicetree/bindings/interrupts.txt
- interrupt-parent : The parent interrupt controller.
-Optional node:
-- Child nodes contain in the palmas. The palmas family is made of several
- variants that support a different number of features.
- The child nodes will thus depend of the capability of the variant.
-- mux_pad1 if a value is given it will be used for the pad1 mux
-- mux_pad2 if a value us given it will be used for the pad2 mux
-- power_ctrl if a value is given it will be written to the POWER_CTRL register
+Optional properties:
+ ti,mux_padX : set the pad register X (1-2) to the correct muxing for the
+ hardware, if not set will use muxing in OTP.
Example:
-/*
- * Integrated Power Management Chip Palmas
- */
-palmas@48 {
- compatible = "ti,palmas";
- reg = <0x48>;
- interrupts = <39>; /* IRQ_SYS_1N cascaded to gic */
- interrupt-controller;
- #interrupt-cells = <1>;
- interrupt-parent = <&gic>;
- #address-cells = <1>;
- #size-cells = <0>;
- ti,mux_pad1 = <0x00>;
- ti,mux_pad2 = <0x00>;
- ti,power_ctrl = <0x03>;
+palmas {
+ compatible = "ti,twl6035", "ti,palmas";
+ reg = <0x48>
+ interrupt-parent = <&intc>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ ti,mux-pad1 = <0>;
+ ti,mux-pad2 = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmic {
+ compatible = "ti,twl6035-pmic", "ti,palmas-pmic";
+ ....
+ }
+
+ gpio {
+ compatible = "ti,twl6035-gpio", "ti,palmas-gpio";
+ ....
+ };
+
+ wdt {
+ compatible = "ti,twl6035-wdt", "ti,palmas-wdt";
+ ....
+ };
+
+ rtc {
+ compatible = "ti,twl6035-rtc", "ti,palmas-rtc";
+ ....
+ };
- palmas_pmic {
- compatible = "ti,palmas_pmic";
- regulators {
- smps12_reg: smps12 {
- regulator-min-microvolt = < 600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-boot-on;
- ti,warm_sleep = <0>;
- ti,roof_floor = <0>;
- ti,mode_sleep = <0>;
- ti,warm_reset = <0>;
- ti,tstep = <0>;
- ti,vsel = <0>;
- };
- };
- ti,ldo6_vibrator = <0>;
+ pwrbutton {
+ compatible = "ti,twl6035-pwrbutton", "ti,palmas-pwrbutton";
+ ....
};
- palmas_rtc {
- compatible = "ti,palmas_rtc";
- interrupts = <8 9>;
- reg = <0>;
- };
-};
+ leds {
+ compatible = "ti,twl6035-leds", "ti-palmas-leds";
+ }
+
+ clk {
+ compatible = "ti,twl6035-clk", "ti,palmas-clk";
+ ....
+ };
+}
diff --git a/Documentation/devicetree/bindings/regulator/palmas-pmic.txt b/Documentation/devicetree/bindings/regulator/palmas-pmic.txt
--- /dev/null
@@ -0,0 +1,169 @@
+* palmas and palmas-charger regulator IP block devicetree bindings
+
+Required properties:
+- compatible : Should be from the list
+ ti,twl6035-pmic
+ ti,twl6036-pmic
+ ti,twl6037-pmic
+ ti,tps65913-pmic
+ ti,tps65914-pmic
+ ti,tps80036-pmic
+ ti,tps659038-pmic
+and also the generic series names
+ ti,palmas-pmic
+
+Optional properties:
+- ti,ldo6-vibrator : ldo6 is in vibrator mode
+
+Optional nodes:
+- regulators : should contain the constrains and init information for the
+ regulators. It should contain a subnode per regulator from the
+ list.
+ For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP,
+ smps45, smps457, smps7 depending on varient, smps6, smps[8-10],
+ ldo[1-9], ldoln, ldousb
+ For ti,palmas-charger-pmic - smps12, smps123, smps3 depending on OTP,
+ smps[6-9], boost, ldo[1-14], ldoln, ldousb
+
+ optional chip specific regulator fields :-
+ ti,warm-reset - maintain voltage during warm reset
+ ti,roof-floor - control voltage selection by pin
+ ti,sleep-mode - mode to adopt in pmic sleep 0 - off, 1 - auto,
+ 2 - eco, 3 - forced pwm
+ ti,tstep - slope control 0 - Jump, 1 10mV/us, 2 5mV/us, 3 2.5mV/us
+ ti,smps-range - OTP has the wrong range set for the hardware so override
+ 0 - low range, 1 - high range
+
+Example:
+
+pmic@0 {
+ compatible = "ti,twl6035-pmic", "ti,palmas-pmic";
+ interrupt-parent = <&palmas>;
+ interrupts = <14 0>;
+ interrupt-name = "short-irq";
+
+ ti,ldo6_vibrator;
+
+ regulators {
+ smps12_reg : smps12 {
+ regulator-name = "smps12";
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,warm-reset;
+ ti,roof-floor;
+ ti,mode-sleep = <0>;
+ ti,tstep = <0>;
+ ti,smps-range = <1>;
+ };
+
+ smps3_reg: smps3 {
+ regulator-name = "smps3";
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1310000>;
+ };
+
+ smps45_reg: smps45 {
+ regulator-name = "smps45";
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1310000>;
+ };
+
+ smps6_reg: smps6 {
+ regulator-name = "smps6";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ smps7_reg: smps7 {
+ regulator-name = "smps7";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ smps8_reg: smps8 {
+ regulator-name = "smps8";
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1310000>;
+ };
+
+ smps9_reg: smps9 {
+ regulator-name = "smps9";
+ regulator-min-microvolt = <2100000>;
+ regulator-max-microvolt = <2100000>;
+ };
+
+ smps10_reg: smps10 {
+ regulator-name = "smps10";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ ldo1_reg: ldo1 {
+ regulator-name = "ldo1";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo2_reg: ldo2 {
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ };
+
+ ldo3_reg: ldo3 {
+ regulator-name = "ldo3";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo4_reg: ldo4 {
+ regulator-name = "ldo4";
+ regulator-min-microvolt = <2200000>;
+ regulator-max-microvolt = <2200000>;
+ };
+
+ ldo5_reg: ldo5 {
+ regulator-name = "ldo5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo6_reg: ldo6 {
+ regulator-name = "ldo6";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ };
+
+ ldo7_reg: ldo7 {
+ regulator-name = "ldo7";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ };
+
+ ldo8_reg: ldo8 {
+ regulator-name = "ldo8";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ };
+
+ ldo9_reg: ldo9 {
+ regulator-name = "ldo9";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldoln_reg: ldoln {
+ regulator-name = "ldoln";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldousb_reg: ldousb {
+ regulator-name = "ldousb";
+ regulator-min-microvolt = <3250000>;
+ regulator-max-microvolt = <3250000>;
+ };
+ };
+};
diff --git a/Documentation/devicetree/bindings/regulator/ti-avs-class0.txt b/Documentation/devicetree/bindings/regulator/ti-avs-class0.txt
--- /dev/null
@@ -0,0 +1,66 @@
+Texas Instrument SmartReflex AVS Class 0 Regulator
+
+Required properties:
+- compatible: "ti,avsclass0"
+- reg: Should contain Efuse registers location and length
+- avs-supply: The supply for AVS block
+- efuse-settings: An array of 2-tuples items, and each item consists
+ of Voltage index and efuse offset(from reg) like: <voltage offset>
+ voltage: Voltage index in microvolts (also called nominal voltage)
+ offset: ofset in bytes from base provided in reg
+ NOTE: min_uV, max_uV are pickedup from this list
+
+Optional properties:
+- voltage-tolerance: Specify the voltage tolerance in percentage
+- ti,avsclass0-microvolt-values: Boolean property indicating that the efuse
+ values are in microvolts
+
+Example #1: single rails:
+soc.dtsi:
+avs_mpu: regulator-avs@0x40200000 {
+ compatible = "ti,avsclass0";
+ reg = <0x40200000 0x20>;
+ efuse-settings = <975000 0
+ 1075000 4
+ 1200000 8>;
+};
+
+avs_core: regulator-avs@0x40300000 {
+ compatible = "ti,avsclass0";
+ reg = <0x40300000 0x20>;
+ efuse-settings = <975000 0
+ 1050000 4>;
+};
+
+board.dtsi:
+&avs_mpu {
+ avs-supply = <&vcc>;
+};
+&avs_core {
+ avs-supply = <&smps2>;
+};
+
+Example #2: Ganged (combined) rails:
+soc.dtsi:
+avs_mpu: regulator-avs@0x40200000 {
+ compatible = "ti,avsclass0";
+ reg = <0x40200000 0x20>;
+ efuse-settings = <975000 0
+ 1075000 4
+ 1200000 8>;
+};
+
+avs_core: regulator-avs@0x40300000 {
+ compatible = "ti,avsclass0";
+ reg = <0x40300000 0x20>;
+ efuse-settings = <975000 0
+ 1050000 4>;
+};
+
+board.dtsi:
+&avs_mpu {
+ avs-supply = <&smps3>;
+};
+&avs_core {
+ avs-supply = <&smps3>;
+};
diff --git a/Documentation/devicetree/bindings/rtc/palmas-rtc.txt b/Documentation/devicetree/bindings/rtc/palmas-rtc.txt
--- /dev/null
@@ -0,0 +1,21 @@
+* palmas and palmas-charger RTC IP block devicetree bindings
+
+Required properties:
+- compatible : Should be from the list
+ ti,twl6035-rtc
+ ti,twl6036-rtc
+ ti,twl6037-rtc
+ ti,tps65913-rtc
+ ti,tps65914-rtc
+ ti,tps80036-rtc
+and also the generic series names
+ ti,palmas-rtc
+
+Examples:
+
+rtc {
+ compatible = "ti,twl6035-rtc", "ti,palmas-rtc";
+ interrupt-parent = <&palmas>;
+ interrupts = <8 0 9 0>;
+ interrupt-name = "alarm-irq", "timer-irq";
+};
diff --git a/Documentation/devicetree/bindings/watchdog/palmas-wdt.txt b/Documentation/devicetree/bindings/watchdog/palmas-wdt.txt
--- /dev/null
@@ -0,0 +1,21 @@
+* palmas and palmas-charger Watchdog IP block devicetree bindings
+
+Required properties:
+- compatible : Should be from the list
+ ti,twl6035-wdt
+ ti,twl6036-wdt
+ ti,twl6037-wdt
+ ti,tps65913-wdt
+ ti,tps65914-wdt
+ ti,tps80036-wdt
+and also the generic series names
+ ti,palmas-wdt
+
+Examples:
+
+wdt {
+ compatible = "ti,twl6035-wdt", "ti,palmas-wdt";
+ interrupt-parent = <&palmas>;
+ interrupts = <10 0>;
+ interrupt-name = "watchdog-irq";
+};
diff --git a/Makefile b/Makefile
index 7684f9518e04a14956f9975a725a49d25f340594..183eff3e92d3c226481af48f42e1bf217f81ef27 100644 (file)
--- a/Makefile
+++ b/Makefile
VERSION = 3
PATCHLEVEL = 8
-SUBLEVEL = 8
+SUBLEVEL = 13
EXTRAVERSION =
NAME = Displaced Humerus Anterior
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e1dcf5424406581b93343deebd3c3f7bba38e424..1def7c896b50902dc72b60cd61706fef9416bad1 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
to deadlock. This workaround puts DSB before executing ISB if
an abort may occur on cache maintenance.
+config ARM_ERRATA_798181
+ bool "ARM errata: TLBI/DSB failure on Cortex-A15"
+ depends on CPU_V7 && SMP
+ help
+ On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
+ adequately shooting down all use of the old entries. This
+ option enables the Linux kernel workaround for this erratum
+ which sends an IPI to the CPUs that are running the same ASID
+ as the one being invalidated.
+
endmenu
source "arch/arm/common/Kconfig"
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
default 355 if ARCH_U8500
default 264 if MACH_H4700
- default 512 if SOC_OMAP5
+ default 512 if SOC_OMAP5 || SOC_DRA7XX
default 288 if ARCH_VT8500
default 0
help
index 5cad8a6dadb021fd2aef0a4ef1a77c40173041e7..dfe56872a7a997e88fff99bab5ce42de077e3614 100644 (file)
endif
ccflags-y := -fpic -fno-builtin -I$(obj)
-asflags-y := -Wa,-march=all -DZIMAGE
+asflags-y := -DZIMAGE
# Supply kernel BSS size to the decompressor via a linker symbol.
KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
index 4324416e26d5aa56664676c69f52209e15e3b567..0ccfd668bd8fd2cde51ad96dc79116e27837142a 100644 (file)
* to cover all 32bit address and cacheable and bufferable.
*/
__armv4_mpu_cache_on:
+ .arch armv4
mov r0, #0x3f @ 4G, the whole
mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
mcr p15, 0, r0, c6, c7, 1
@ Enable unaligned access on v6, to allow better code generation
@ for the decompressor C code:
__armv6_mmu_cache_on:
+ .arch armv6
mrc p15, 0, r0, c1, c0, 0 @ read SCTLR
bic r0, r0, #2 @ A (no unaligned access fault)
orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
__arm926ejs_mmu_cache_on:
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
+ .arch armv5
mov r0, #4 @ put dcache in WT mode
mcr p15, 7, r0, c15, c0, 0
#endif
__armv4_mmu_cache_on:
+ .arch armv4
mov r12, lr
#ifdef CONFIG_MMU
mov r6, #CB_BITS | 0x12 @ U
mov pc, r12
__armv7_mmu_cache_on:
+ .arch armv7-a
mov r12, lr
#ifdef CONFIG_MMU
mrc p15, 0, r11, c0, c1, 4 @ read ID_MMFR0
mov r3, #16
b call_cache_fn
+ .arch armv4
__armv4_mpu_cache_flush:
mov r2, #1
mov r3, #0
mov pc, lr
__armv6_mmu_cache_flush:
+ .arch armv6
mov r1, #0
mcr p15, 0, r1, c7, c14, 0 @ clean+invalidate D
mcr p15, 0, r1, c7, c5, 0 @ invalidate I+BTB
mcr p15, 0, r1, c7, c10, 4 @ drain WB
mov pc, lr
+ .arch armv7-a
__armv7_mmu_cache_flush:
mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1
tst r10, #0xf << 16 @ hierarchical cache (ARMv7)
mcr p15, 0, r10, c7, c5, 4 @ ISB
mov pc, lr
+ .arch armv5
__armv5tej_mmu_cache_flush:
1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache
bne 1b
mcr p15, 0, r0, c7, c10, 4 @ drain WB
mov pc, lr
+ .arch armv4
__armv4_mmu_cache_flush:
mov r2, #64*1024 @ default: 32K dcache size (*2)
mov r11, #32 @ default: 32 byte line size
mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3
mov pc, lr
+ .arch armv4
+
/*
* Various debugging routines for printing hex characters and
* memory, which again must be relocatable.
index 55ce4dff88b46bc91e15713807585724458aeaed..101fed319815346ee54a96bae8f30fd0131a9ffa 100644 (file)
omap5-sevm.dtb \
am335x-evm.dtb \
am335x-evmsk.dtb \
- am335x-bone.dtb
+ am335x-bone.dtb \
+ am335x-boneblack.dtb \
+ dra7-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
index ecac1e7b0b4913959d05858ccba4a49aba9e0734..725aa632b5bc9f3bea8d058500616e803d92339f 100644 (file)
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
- pinctrl-0 = <>;
+ pinctrl-0 = <&clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */
>;
};
+
+ clkout2_pin: pinumx_clkout2_pin {
+ pinctrl-single,pins = <
+ 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
+ >;
+ };
};
ocp {
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
--- /dev/null
@@ -0,0 +1,179 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+/include/ "am33xx.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-boneblack", "ti,am335x-bone", "ti,am33xx";
+
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&dcdc2_reg>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256 MB */
+ };
+
+ am33xx_pinmux: pinmux@44e10800 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&clkout2_pin>;
+
+ userled_pins: pinmux_userled_pins {
+ pinctrl-single,pins = <
+ 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
+ 0x58 0x17 /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */
+ 0x5c 0x7 /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */
+ 0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
+ >;
+ };
+ i2c0_pins: pinmux_i2c0_pins {
+ pinctrl-single,pins = <
+ 0x188 0x70 /* i2c0_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */
+ 0x18c 0x70 /* i2c0_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE0 */
+ >;
+ };
+
+ uart0_pins: pinmux_uart0_pins {
+ pinctrl-single,pins = <
+ 0x170 0x30 /* uart0_rxd.uart0_rxd PULLUP |INPUTENABLE | MODE0 */
+ 0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */
+ >;
+ };
+
+ clkout2_pin: pinumx_clkout2_pin {
+ pinctrl-single,pins = <
+ 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
+ >;
+ };
+ };
+
+ ocp: ocp {
+ uart0: serial@44e09000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
+ };
+
+ i2c0: i2c@44e0b000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps: tps@24 {
+ reg = <0x24>;
+ };
+
+ eeprom: eeprom@50 {
+ compatible = "at,24c256";
+ reg = <0x50>;
+ };
+ };
+
+ rtc@44e3e000 {
+ ti,system-power-controller;
+ };
+ };
+
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&userled_pins>;
+
+ compatible = "gpio-leds";
+
+ led0 {
+ label = "beaglebone:green:heartbeat";
+ gpios = <&gpio1 21 0>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led1 {
+ label = "beaglebone:green:mmc0";
+ gpios = <&gpio1 22 0>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led2 {
+ label = "beaglebone:green:usr2";
+ gpios = <&gpio1 23 0>;
+ default-state = "off";
+ };
+
+ led3 {
+ label = "beaglebone:green:usr3";
+ gpios = <&gpio1 24 0>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+ };
+};
+
+/include/ "tps65217.dtsi"
+
+&tps {
+ ti,pmic-shutdown-controller;
+
+ regulators {
+ dcdc1_reg: regulator@0 {
+ regulator-always-on;
+ };
+
+ dcdc2_reg: regulator@1 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1325000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ dcdc3_reg: regulator@2 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: regulator@3 {
+ regulator-always-on;
+ };
+
+ ldo2_reg: regulator@4 {
+ regulator-always-on;
+ };
+
+ ldo3_reg: regulator@5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ ldo4_reg: regulator@6 {
+ regulator-always-on;
+ };
+ };
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <1>;
+};
index ae4189be800568bd509d564dee82b1f34bbc7a28..b0ca6277212dfa228b5848f7f3b253878dfb588b 100644 (file)
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
- pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>;
+ pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
matrix_keypad_s0: matrix_keypad_s0 {
pinctrl-single,pins = <
0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */
>;
};
+
+ clkout2_pin: pinumx_clkout2_pin {
+ pinctrl-single,pins = <
+ 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
+ >;
+ };
};
ocp {
&aes {
status = "okay";
};
+
+&tscadc {
+ tsc {
+ ti,wires = <4>;
+ ti,x-plate-resistance = <200>;
+ ti,steps-to-configure = <5>;
+ ti,wire-config = <0x00 0x11 0x22 0x33>;
+ };
+
+ adc {
+ ti,adc-channels = <4>;
+ };
+};
index b7c9e68c112d462b46a76a4485ac012b922b75e3..caa7f9a75efa9e68358eeac9c68d00b203d17ae8 100644 (file)
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
- pinctrl-0 = <&gpio_keys_s0>;
+ pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x174 0x00 /* uart0_txd.uart0_txd PULLDOWN | MODE0 */
>;
};
+
+ clkout2_pin: pinumx_clkout2_pin {
+ pinctrl-single,pins = <
+ 0x1b4 0x03 /* xdma_event_intr1.clkout2 OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
+ >;
+ };
};
ocp {
index 6dd9674cb1a29563affc246bf9a6dab48dced6df..8b6ae5765591af656d17f3719e23a1e16796124f 100644 (file)
275000 1125000
>;
voltage-tolerance = <2>; /* 2 percentage */
+ clocks = <&dpll_mpu>;
+ clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
};
};
ti,edma-default-queue = <0>;
};
+ dpll_mpu: dpll_mpu {
+ #clock-cells = <0>;
+ compatible = "ti,omap-clock";
+ };
+
gpio0: gpio@44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
&edma 5>;
dma-names = "tx", "rx";
};
+
+ tscadc: tscadc@44e0d000 {
+ compatible = "ti,ti-tscadc";
+ reg = <0x44e0d000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <16>;
+ ti,hwmods = "adc_tsc";
+ status = "disabled";
+ };
};
};
index 474f760ecadfcb2aa5a4927f1bcab14a7dfe8fa8..e9b5bdae4908bba91e92cb807d99ae8e7da3c877 100644 (file)
*/
/dts-v1/;
-/include/ "omap3.dtsi"
+/include/ "omap34xx.dtsi"
/ {
model = "TI AM3517 EVM (AM3517/05)";
index 5eb26d7d9b4e652b955723e99179c51a05566d66..556868388a23a0cc76531dd4202a19b2ed3ff137 100644 (file)
*/
/dts-v1/;
-/include/ "omap3.dtsi"
+/include/ "omap34xx.dtsi"
/ {
model = "TeeJet Mt.Ventoux";
index cb7bcc51608d81cd51bba98ec29455973ca9daf0..02b70a404a1fafbd951423a697f28e64cfc6958c 100644 (file)
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <2 6 0x1 0x1 /* PB6 periph A with pullup */
- 2 7 0x1 0x0>; /* PB7 periph A */
+ <1 6 0x1 0x1 /* PB6 periph A with pullup */
+ 1 7 0x1 0x0>; /* PB7 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <2 10 0x1 0x1 /* PB10 periph A with pullup */
- 2 11 0x1 0x0>; /* PB11 periph A */
+ <1 10 0x1 0x1 /* PB10 periph A with pullup */
+ 1 11 0x1 0x0>; /* PB11 periph A */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
- <3 8 0x2 0x0>; /* PB8 periph B */
+ <2 8 0x2 0x0>; /* PC8 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <3 10 0x2 0x0>; /* PB10 periph B */
+ <2 10 0x2 0x0>; /* PC10 periph B */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <2 12 0x1 0x1 /* PB12 periph A with pullup */
- 2 13 0x1 0x0>; /* PB13 periph A */
+ <1 12 0x1 0x1 /* PB12 periph A with pullup */
+ 1 13 0x1 0x0>; /* PB13 periph A */
};
};
index fbe7a7089c2adbc82da7d3ef995b6506c1089d1d..28467fd6bf9689901d6d41e59369bb5278079630 100644 (file)
/ {
model = "Atmel AT91SAM9G15 SoC";
- compatible = "atmel, at91sam9g15, atmel,at91sam9x5";
+ compatible = "atmel,at91sam9g15", "atmel,at91sam9x5";
ahb {
apb {
index 86dd3f6d938ff272334102894fd4e2d9e17c4457..5427b2dba87e34150e1fb2f4dd0e60652fcf5d2d 100644 (file)
/include/ "at91sam9x5ek.dtsi"
/ {
- model = "Atmel AT91SAM9G25-EK";
+ model = "Atmel AT91SAM9G15-EK";
compatible = "atmel,at91sam9g15ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
};
index 05a718fb83c49b4cfa1fcb35be13b4e9ff2d2ec6..5fd32df03f25d9551494fd40b5793882b6a966c3 100644 (file)
/ {
model = "Atmel AT91SAM9G25 SoC";
- compatible = "atmel, at91sam9g25, atmel,at91sam9x5";
+ compatible = "atmel,at91sam9g25", "atmel,at91sam9x5";
ahb {
apb {
index f9d14a722794eb0f927ecb03eeac0d790f0efff7..d6fa8af50724ab6bb37b96426950bf7aa86fccca 100644 (file)
/ {
model = "Atmel AT91SAM9G35 SoC";
- compatible = "atmel, at91sam9g35, atmel,at91sam9x5";
+ compatible = "atmel,at91sam9g35", "atmel,at91sam9x5";
ahb {
apb {
index 54eb33ba6d22ba6e308d756518e8481056a19890..9ac2bc2b4f07cd36eca29c2172607d4e84c631bb 100644 (file)
/ {
model = "Atmel AT91SAM9X25 SoC";
- compatible = "atmel, at91sam9x25, atmel,at91sam9x5";
+ compatible = "atmel,at91sam9x25", "atmel,at91sam9x5";
ahb {
apb {
index fb102d6126ce696234133a2869c7f84a5db888ee..ba67d83d17ac5d3821f5018773a54a0342f98081 100644 (file)
/ {
model = "Atmel AT91SAM9X35 SoC";
- compatible = "atmel, at91sam9x35, atmel,at91sam9x5";
+ compatible = "atmel,at91sam9x35", "atmel,at91sam9x5";
ahb {
apb {
index 8a7cf1d9cf5db6f71ee002725151a6d968da40fa..ccab2568b0d7921ecb972db631b20d8f785d9299 100644 (file)
compatible = "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
chosen {
- bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
+ bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
};
ahb {
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
--- /dev/null
@@ -0,0 +1,197 @@
+/*
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+/include/ "dra7.dtsi"
+
+/ {
+ model = "TI DRA7";
+ compatible = "ti,dra7-evm", "ti,dra7";
+
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&avs_mpu>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>; /* 512 MB */
+ };
+
+ vmmc2_fixed: fixedregulator-mmc2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmc2_fixed";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+};
+
+&dra7_pmx_core {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &vout1_pins
+ >;
+
+ i2c2_pins: pinmux_i2c2_pins {
+ pinctrl-single,pins = <
+ 0x408 0x60000 /* i2c2_sda INPUT | MODE0 */
+ 0x40C 0x60000 /* i2c2_scl INPUT | MODE0 */
+ >;
+ };
+
+ vout1_pins: pinmux_vout1_pins {
+ pinctrl-single,pins = <
+ 0x1C8 0x0 /* vout1_clk OUTPUT | MODE0 */
+ 0x1CC 0x0 /* vout1_de OUTPUT | MODE0 */
+ 0x1D0 0x0 /* vout1_fld OUTPUT | MODE0 */
+ 0x1D4 0x0 /* vout1_hsync OUTPUT | MODE0 */
+ 0x1D8 0x0 /* vout1_vsync OUTPUT | MODE0 */
+ 0x1DC 0x0 /* vout1_d0 OUTPUT | MODE0 */
+ 0x1E0 0x0 /* vout1_d1 OUTPUT | MODE0 */
+ 0x1E4 0x0 /* vout1_d2 OUTPUT | MODE0 */
+ 0x1E8 0x0 /* vout1_d3 OUTPUT | MODE0 */
+ 0x1EC 0x0 /* vout1_d4 OUTPUT | MODE0 */
+ 0x1F0 0x0 /* vout1_d5 OUTPUT | MODE0 */
+ 0x1F4 0x0 /* vout1_d6 OUTPUT | MODE0 */
+ 0x1F8 0x0 /* vout1_d7 OUTPUT | MODE0 */
+ 0x1FC 0x0 /* vout1_d8 OUTPUT | MODE0 */
+ 0x200 0x0 /* vout1_d9 OUTPUT | MODE0 */
+ 0x204 0x0 /* vout1_d10 OUTPUT | MODE0 */
+ 0x208 0x0 /* vout1_d11 OUTPUT | MODE0 */
+ 0x20C 0x0 /* vout1_d12 OUTPUT | MODE0 */
+ 0x210 0x0 /* vout1_d13 OUTPUT | MODE0 */
+ 0x214 0x0 /* vout1_d14 OUTPUT | MODE0 */
+ 0x218 0x0 /* vout1_d15 OUTPUT | MODE0 */
+ 0x21C 0x0 /* vout1_d16 OUTPUT | MODE0 */
+ 0x220 0x0 /* vout1_d17 OUTPUT | MODE0 */
+ 0x224 0x0 /* vout1_d18 OUTPUT | MODE0 */
+ 0x228 0x0 /* vout1_d19 OUTPUT | MODE0 */
+ 0x22C 0x0 /* vout1_d20 OUTPUT | MODE0 */
+ 0x230 0x0 /* vout1_d21 OUTPUT | MODE0 */
+ 0x234 0x0 /* vout1_d22 OUTPUT | MODE0 */
+ 0x238 0x0 /* vout1_d23 OUTPUT | MODE0 */
+ >;
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+
+ tps659038: tps659038@58 {
+ reg = <0x58>;
+ };
+
+ pcf_lcd: pcf8575@20 {
+ compatible = "ti,pcf8575";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ /* TLC chip for LCD panel power and backlight */
+ tlc59108: tlc59108@40 {
+ compatible = "ti,tlc59108";
+ reg = <0x40>;
+ gpios = <&pcf_lcd 15 0>; /* P15, CON_LCD_PWR_DN */
+ };
+};
+
+/include/ "tps659038.dtsi"
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+
+ clock-frequency = <400000>;
+
+ pcf_hdmi: pcf8575@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
+&i2c3 {
+ clock-frequency = <400000>;
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+};
+
+&i2c5 {
+ clock-frequency = <400000>;
+};
+
+&mmc1 {
+ vmmc-supply = <&ldo1_reg>;
+ bus-width = <4>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmc2_fixed>;
+ bus-width = <8>;
+ ti,non-removable;
+};
+
+&mmc3 {
+ bus-width = <8>;
+ ti,non-removable;
+ status = "disabled";
+};
+
+&mmc4 {
+ bus-width = <4>;
+ status = "disabled";
+};
+
+&avs_mpu {
+ avs-supply = <&smps123_reg>;
+};
+
+&avs_core {
+ avs-supply = <&smps7_reg>;
+};
+
+&avs_gpu {
+ avs-supply = <&smps6_reg>;
+};
+
+&avs_dspeve {
+ avs-supply = <&smps45_reg>;
+};
+
+&avs_iva {
+ avs-supply = <&smps8_reg>;
+};
+
+&dpi1 {
+ lcd {
+ compatible = "ti,tfc_s9700";
+ tlc = <&tlc59108>;
+ data-lines = <24>;
+ };
+};
+
+&hdmi {
+ tpd12s015: tpd12s015 {
+ compatible = "ti,tpd12s015";
+
+ gpios = <&pcf_hdmi 4 0>, /* pcf8575@22 P4, CT_CP_HDP */
+ <&pcf_hdmi 5 0>, /* pcf8575@22 P5, LS_OE */
+ <&gpio7 12 0>; /* gpio7_12/sp1_cs2, HPD */
+
+ hdmi_ddc = <&i2c2>;
+
+ hdmi-monitor {
+ compatible = "ti,hdmi_panel";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- /dev/null
@@ -0,0 +1,536 @@
+/*
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ * Based on "omap4.dtsi"
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "ti,dra7xx";
+ interrupt-parent = <&gic>;
+
+ aliases {
+ serial0 = &uart1;
+ serial1 = &uart2;
+ serial2 = &uart3;
+ serial3 = &uart4;
+ serial4 = &uart5;
+ serial5 = &uart6;
+ };
+
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a15";
+ operating-points = <
+ /* kHz uV */
+ /* The OPP_HIGH Only for DVFS enabled Samples Hence commenting*/
+ 1000000 1090000
+ /* 1176000 1210000 */
+ >;
+ clocks = <&dpll_mpu>;
+ clock-names = "cpu";
+ timer {
+ compatible = "arm,armv7-timer";
+ /*
+ * PPI secure/nonsecure IRQ,
+ * active low level-sensitive
+ */
+ interrupts = <1 13 0x308>,
+ <1 14 0x308>;
+ clock-frequency = <6144000>;
+ };
+ };
+ cpu@1 {
+ compatible = "arm,cortex-a15";
+ timer {
+ compatible = "arm,armv7-timer";
+ /*
+ * PPI secure/nonsecure IRQ,
+ * active low level-sensitive
+ */
+ interrupts = <1 13 0x308>,
+ <1 14 0x308>;
+ clock-frequency = <6144000>;
+ };
+ };
+ };
+
+ gic: interrupt-controller@48211000 {
+ compatible = "arm,cortex-a15-gic";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x48211000 0x1000>,
+ <0x48212000 0x1000>;
+ };
+
+ /*
+ * The soc node represents the soc top level view. It is uses for IPs
+ * that are not memory mapped in the MPU view or for the MPU itself.
+ */
+ soc {
+ compatible = "ti,omap-infra";
+ mpu {
+ compatible = "ti,omap5-mpu";
+ ti,hwmods = "mpu";
+ };
+ };
+
+ /*
+ * XXX: Use a flat representation of the SOC interconnect.
+ * The real OMAP interconnect network is quite complex.
+ * Since that will not bring real advantage to represent that in DT for
+ * the moment, just use a fake OCP bus entry to represent the whole bus
+ * hierarchy.
+ */
+ ocp {
+ compatible = "ti,omap4-l3-noc", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ ti,hwmods = "l3_main_1", "l3_main_2";
+
+ counter32k: counter@4ae04000 {
+ compatible = "ti,omap-counter32k";
+ reg = <0x4ae04000 0x40>;
+ ti,hwmods = "counter_32k";
+ };
+
+ dra7_pmx_core: pinmux@4a003400 {
+ compatible = "pinctrl-single";
+ reg = <0x4a003400 0x0464>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x3fffffff>;
+ };
+
+ dpll_mpu: dpll_mpu {
+ #clock-cells = <0>;
+ compatible = "ti,omap-clock";
+ };
+
+ sdma: dma-controller@4a056000 {
+ compatible = "ti,omap4430-sdma";
+ reg = <0x4a056000 0x1000>;
+ interrupts = <0 12 0x4>,
+ <0 13 0x4>,
+ <0 14 0x4>,
+ <0 15 0x4>;
+ #dma-cells = <1>;
+ #dma-channels = <32>;
+ #dma-requests = <127>;
+ };
+
+ gpio1: gpio@4ae10000 {
+ compatible = "ti,omap4-gpio";
+ reg = <0x4ae10000 0x200>;
+ interrupts = <0 29 0x4>;
+ ti,hwmods = "gpio1";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio2: gpio@48055000 {
+ compatible = "ti,omap4-gpio";
+ reg = <0x48055000 0x200>;
+ interrupts = <0 30 0x4>;
+ ti,hwmods = "gpio2";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio3: gpio@48057000 {
+ compatible = "ti,omap4-gpio";
+ reg = <0x48057000 0x200>;
+ interrupts = <0 31 0x4>;
+ ti,hwmods = "gpio3";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio4: gpio@48059000 {
+ compatible = "ti,omap4-gpio";
+ reg = <0x48059000 0x200>;
+ interrupts = <0 32 0x4>;
+ ti,hwmods = "gpio4";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio5: gpio@4805b000 {
+ compatible = "ti,omap4-gpio";
+ reg = <0x4805b000 0x200>;
+ interrupts = <0 33 0x4>;
+ ti,hwmods = "gpio5";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio6: gpio@4805d000 {
+ compatible = "ti,omap4-gpio";
+ reg = <0x4805d000 0x200>;
+ interrupts = <0 34 0x4>;
+ ti,hwmods = "gpio6";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio7: gpio@48051000 {
+ compatible = "ti,omap4-gpio";
+ reg = <0x48051000 0x200>;
+ interrupts = <0 35 0x4>;
+ ti,hwmods = "gpio7";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ gpio8: gpio@48053000 {
+ compatible = "ti,omap4-gpio";
+ reg = <0x48053000 0x200>;
+ interrupts = <0 121 0x4>;
+ ti,hwmods = "gpio8";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ uart1: serial@4806a000 {
+ compatible = "ti,omap4-uart";
+ reg = <0x4806a000 0x100>;
+ interrupts = <0 72 0x4>;
+ ti,hwmods = "uart1";
+ clock-frequency = <48000000>;
+ };
+
+ uart2: serial@4806c000 {
+ compatible = "ti,omap4-uart";
+ reg = <0x4806c000 0x100>;
+ interrupts = <0 73 0x4>;
+ ti,hwmods = "uart2";
+ clock-frequency = <48000000>;
+ };
+
+ uart3: serial@48020000 {
+ compatible = "ti,omap4-uart";
+ reg = <0x48020000 0x100>;
+ interrupts = <0 74 0x4>;
+ ti,hwmods = "uart3";
+ clock-frequency = <48000000>;
+ };
+
+ uart4: serial@4806e000 {
+ compatible = "ti,omap4-uart";
+ reg = <0x4806e000 0x100>;
+ interrupts = <0 70 0x4>;
+ ti,hwmods = "uart4";
+ clock-frequency = <48000000>;
+ };
+
+ uart5: serial@48066000 {
+ compatible = "ti,omap4-uart";
+ reg = <0x48066000 0x100>;
+ interrupts = <0 105 0x4>;
+ ti,hwmods = "uart5";
+ clock-frequency = <48000000>;
+ };
+
+ uart6: serial@48068000 {
+ compatible = "ti,omap4-uart";
+ reg = <0x48068000 0x100>;
+ interrupts = <0 106 0x4>;
+ ti,hwmods = "uart6";
+ clock-frequency = <48000000>;
+ };
+
+ timer1: timer@4ae18000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x4ae18000 0x80>;
+ interrupts = <0 37 0x4>;
+ ti,hwmods = "timer1";
+ ti,timer-alwon;
+ };
+
+ timer2: timer@48032000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48032000 0x80>;
+ interrupts = <0 38 0x4>;
+ ti,hwmods = "timer2";
+ };
+
+ timer3: timer@48034000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48034000 0x80>;
+ interrupts = <0 39 0x4>;
+ ti,hwmods = "timer3";
+ };
+
+ timer4: timer@48036000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48036000 0x80>;
+ interrupts = <0 40 0x4>;
+ ti,hwmods = "timer4";
+ };
+
+ timer5: timer@48820000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48820000 0x80>;
+ interrupts = <0 41 0x4>;
+ ti,hwmods = "timer5";
+ ti,timer-dsp;
+ };
+
+ timer6: timer@48822000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48822000 0x80>;
+ interrupts = <0 42 0x4>;
+ ti,hwmods = "timer6";
+ ti,timer-dsp;
+ ti,timer-pwm;
+ };
+
+ timer7: timer@48824000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48824000 0x80>;
+ interrupts = <0 43 0x4>;
+ ti,hwmods = "timer7";
+ ti,timer-dsp;
+ };
+
+ timer8: timer@48826000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48826000 0x80>;
+ interrupts = <0 44 0x4>;
+ ti,hwmods = "timer8";
+ ti,timer-dsp;
+ ti,timer-pwm;
+ };
+
+ timer9: timer@4803e000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x4803e000 0x80>;
+ interrupts = <0 45 0x4>;
+ ti,hwmods = "timer9";
+ };
+
+ timer10: timer@48086000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48086000 0x80>;
+ interrupts = <0 46 0x4>;
+ ti,hwmods = "timer10";
+ };
+
+ timer11: timer@48088000 {
+ compatible = "ti,omap2-timer";
+ reg = <0x48088000 0x80>;
+ interrupts = <0 47 0x4>;
+ ti,hwmods = "timer11";
+ ti,timer-pwm;
+ };
+
+ wdt2: wdt@4ae14000 {
+ compatible = "ti,omap4-wdt";
+ reg = <0x4ae14000 0x80>;
+ interrupts = <0 80 0x4>;
+ ti,hwmods = "wd_timer2";
+ };
+
+ dmm: dmm@4e000000 {
+ compatible = "ti,omap5-dmm";
+ reg = <0x4e000000 0x800>;
+ interrupts = <0 113 0x4>;
+ ti,hwmods = "dmm";
+ };
+
+ bandgap {
+ reg = <0x4a0021e0 0xc
+ 0x4a00232c 0xc
+ 0x4a002380 0x2c
+ 0x4a0023C0 0x3c
+ 0x4a002564 0x8
+ 0x4a002574 0x50>;
+ compatible = "ti,dra752-bandgap";
+ interrupts = <0 126 4>; /* talert */
+ };
+
+ i2c1: i2c@48070000 {
+ compatible = "ti,omap4-i2c";
+ reg = <0x48070000 0x100>;
+ interrupts = <0 56 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c1";
+ };
+
+ i2c2: i2c@48072000 {
+ compatible = "ti,omap4-i2c";
+ reg = <0x48072000 0x100>;
+ interrupts = <0 57 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c2";
+ };
+
+ i2c3: i2c@48060000 {
+ compatible = "ti,omap4-i2c";
+ reg = <0x48060000 0x100>;
+ interrupts = <0 61 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c3";
+ };
+
+ i2c4: i2c@4807a000 {
+ compatible = "ti,omap4-i2c";
+ reg = <0x4807a000 0x100>;
+ interrupts = <0 62 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c4";
+ };
+
+ i2c5: i2c@4807c000 {
+ compatible = "ti,omap4-i2c";
+ reg = <0x4807c000 0x100>;
+ interrupts = <0 60 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "i2c5";
+ };
+
+ mmc1: mmc@4809c000 {
+ compatible = "ti,omap4-hsmmc";
+ reg = <0x4809c000 0x400>;
+ interrupts = <0 83 0x4>;
+ ti,hwmods = "mmc1";
+ ti,dual-volt;
+ ti,needs-special-reset;
+ dmas = <&sdma 61>, <&sdma 62>;
+ dma-names = "tx", "rx";
+ };
+
+ mmc2: mmc@480b4000 {
+ compatible = "ti,omap4-hsmmc";
+ reg = <0x480b4000 0x400>;
+ interrupts = <0 86 0x4>;
+ ti,hwmods = "mmc2";
+ ti,needs-special-reset;
+ dmas = <&sdma 47>, <&sdma 48>;
+ dma-names = "tx", "rx";
+ };
+
+ mmc3: mmc@480ad000 {
+ compatible = "ti,omap4-hsmmc";
+ reg = <0x480ad000 0x400>;
+ interrupts = <0 94 0x4>;
+ ti,hwmods = "mmc3";
+ ti,needs-special-reset;
+ dmas = <&sdma 77>, <&sdma 78>;
+ dma-names = "tx", "rx";
+ };
+
+ mmc4: mmc@480d1000 {
+ compatible = "ti,omap4-hsmmc";
+ reg = <0x480d1000 0x400>;
+ interrupts = <0 96 0x4>;
+ ti,hwmods = "mmc4";
+ ti,needs-special-reset;
+ dmas = <&sdma 57>, <&sdma 58>;
+ dma-names = "tx", "rx";
+ };
+
+ avs_mpu: regulator-avs@0x4A003B18 {
+ compatible = "ti,avsclass0";
+ reg = <0x4A003B18 0x20>;
+ efuse-settings = <1090000 8
+ 1210000 12
+ 1280000 16>;
+ };
+
+ avs_core: regulator-avs@0x4A0025EC {
+ compatible = "ti,avsclass0";
+ reg = <0x4A0025EC 0x20>;
+ efuse-settings = <1030000 8>;
+ };
+
+ avs_gpu: regulator-avs@0x4A003B00 {
+ compatible = "ti,avsclass0";
+ reg = <0x4A003B00 0x20>;
+ efuse-settings = <1090000 8
+ 1210000 12
+ 1280000 16>;
+ };
+
+ avs_dspeve: regulator-avs@0x4A0025D8 {
+ compatible = "ti,avsclass0";
+ reg = <0x4A0025D8 0x20>;
+ efuse-settings = <1055000 8
+ 1150000 12
+ 1250000 16>;
+ };
+
+ avs_iva: regulator-avs@0x4A0025C4 {
+ compatible = "ti,avsclass0";
+ reg = <0x4A0025C4 0x20>;
+ efuse-settings = <1055000 8
+ 1150000 12
+ 1250000 16>;
+ };
+
+ dss {
+ compatible = "ti,omap4-dss";
+ ti,hwmods = "dss_core";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ vdda_video-supply = <&ldoln_reg>;
+
+ dispc {
+ compatible = "ti,omap4-dispc";
+ ti,hwmods = "dss_dispc";
+ };
+
+ dpi1: dpi@1 {
+ compatible = "ti,dra7xx-dpi";
+ reg = <0>;
+ video-source = <0>;
+ };
+
+ dpi2: dpi@2 {
+ compatible = "ti,dra7xx-dpi";
+ reg = <1>;
+ video-source = <2>;
+ };
+
+ dpi3: dpi@3 {
+ compatible = "ti,dra7xx-dpi";
+ reg = <2>;
+ video-source = <3>;
+ };
+
+ hdmi: hdmi {
+ compatible = "ti,omap4-hdmi", "simple-bus";
+ ti,hwmods = "dss_hdmi";
+ vdda_hdmi_dac-supply = <&ldo3_reg>;
+ video-source = <1>;
+ };
+ };
+ };
+};
index ca551e9b9c8a8a0f0f87c8517e91c1471e226b00..c051499bad3e7259bdfff159a27641dc5ca880be 100644 (file)
model = "TI OMAP3 BeagleBoard xM";
compatible = "ti,omap3-beagle-xm, ti,omap3-beagle", "ti,omap3";
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&vcc>;
+ };
+ };
+
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
index 02d23f15fd867fafe2172a1eb75e60beab51a5c7..6eec69997607563e948575ade339b4f1aef3fd2b 100644 (file)
*/
/dts-v1/;
-/include/ "omap3.dtsi"
+/include/ "omap34xx.dtsi"
/ {
model = "TI OMAP3 BeagleBoard";
compatible = "ti,omap3-beagle", "ti,omap3";
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&vcc>;
+ };
+ };
+
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
index 6e6f80db689a3b0d8655aef034bc5e5ea0f1ba80..05f51e10ddd6730fcccc83a594f74cb550e7f181 100644 (file)
*/
/dts-v1/;
-/include/ "omap3.dtsi"
+/include/ "omap34xx.dtsi"
/ {
model = "TI OMAP3 EVM (OMAP3530, AM/DM37x)";
compatible = "ti,omap3-evm", "ti,omap3";
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&vcc>;
+ };
+ };
+
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
index e3979b195898438166ae72d0ee45dd4b5b90bae9..a4335900fb2472243ce53ebc1badceb4e3a976d1 100644 (file)
*/
/dts-v1/;
-/include/ "omap3.dtsi"
+/include/ "omap34xx.dtsi"
/ {
leds {
index 61e8a90c442381da9d88f6f7ed6a73ac6b78e5ec..8ed66ee5c6c02f28fda72cae5b762eebb5a382eb 100644 (file)
cpus {
cpu@0 {
compatible = "arm,cortex-a8";
+ clocks = <&dpll1>;
+ clock-names = "cpu";
};
};
ti,hwmods = "counter_32k";
};
+ dpll1: dpll1 {
+ #clock-cells = <0>;
+ compatible = "ti,omap-clock";
+ };
+
intc: interrupt-controller@48200000 {
compatible = "ti,omap2-intc";
interrupt-controller;
diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
--- /dev/null
@@ -0,0 +1,28 @@
+/*
+ * Device Tree Source for OMAP34xx/OMAP35xx SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "omap3.dtsi"
+
+/ {
+ cpus {
+ cpu@0 {
+ /* OMAP343x/OMAP35xx variants OPP1-5 */
+ operating-points = <
+ /* kHz uV */
+ 125000 975000
+ 250000 1075000
+ 500000 1200000
+ 550000 1270000
+ 600000 1350000
+ >;
+ clock-latency = <300000>; /* From legacy driver */
+ };
+ };
+};
index 96bf0287cb9f92028b14b4f7e2c093d8fac57d5e..b89233e43b0f6af39690941eb664a3306d9b1d33 100644 (file)
serial3 = &uart4;
};
+ cpus {
+ /* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
+ cpu@0 {
+ operating-points = <
+ /* kHz uV */
+ 300000 975000
+ 600000 1075000
+ 800000 1200000
+ >;
+ clock-latency = <300000>; /* From legacy driver */
+ };
+ };
+
ocp {
uart4: serial@49042000 {
compatible = "ti,omap3-uart";
index 75466d2abfb555a54e2ab41764f56e5f86010854..f89b0ee031a4cc85413bfe45939d81517bc389f2 100644 (file)
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-/include/ "omap4-panda.dts"
+/dts-v1/;
+
+/include/ "omap4.dtsi"
+/include/ "omap4-panda-common.dtsi"
/* Pandaboard Rev A4+ have external pullups on SCL & SDA */
&dss_hdmi_pins {
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
--- /dev/null
@@ -0,0 +1,371 @@
+/*
+ * Copyright (C) 2011-2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/include/ "elpida_ecb240abacn.dtsi"
+
+/ {
+ model = "TI OMAP4 PandaBoard";
+ compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>; /* 1 GB */
+ };
+
+ leds: leds {
+ compatible = "gpio-leds";
+ heartbeat {
+ label = "pandaboard::status1";
+ gpios = <&gpio1 7 0>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ mmc {
+ label = "pandaboard::status2";
+ gpios = <&gpio1 8 0>;
+ linux,default-trigger = "mmc0";
+ };
+ };
+
+ sound: sound {
+ compatible = "ti,abe-twl6040";
+ ti,model = "PandaBoard";
+
+ ti,mclk-freq = <38400000>;
+
+ ti,mcpdm = <&mcpdm>;
+ ti,mcbsp1 = <&mcbsp1>;
+ ti,mcbsp2 = <&mcbsp2>;
+ ti,aess = <&aess>;
+
+ ti,twl6040 = <&twl6040>;
+
+ /* Audio routing */
+ ti,audio-routing =
+ "Headset Stereophone", "HSOL",
+ "Headset Stereophone", "HSOR",
+ "Ext Spk", "HFL",
+ "Ext Spk", "HFR",
+ "Line Out", "AUXL",
+ "Line Out", "AUXR",
+ "HSMIC", "Headset Mic",
+ "Headset Mic", "Headset Mic Bias",
+ "AFML", "Line In",
+ "AFMR", "Line In",
+ "Headset Playback", "PDM_DL1",
+ "Handsfree Playback", "PDM_DL2",
+ "PDM_UL1", "Capture",
+ "40122000.mcbsp Playback", "BT_VX_DL",
+ "BT_VX_UL", "40122000.mcbsp Capture",
+ "40124000.mcbsp Playback", "MM_EXT_DL",
+ "MM_EXT_UL", "40124000.mcbsp Capture";
+ };
+
+ sound_hdmi {
+ compatible = "ti,omap-hdmi-tpd12s015-audio";
+ ti,model = "OMAP4HDMI";
+
+ ti,hdmi_audio = <&hdmi>;
+ ti,level_shifter = <&tpd12s015>;
+ };
+
+ /* HS USB Port 1 RESET */
+ hsusb1_reset: hsusb1_reset_reg {
+ compatible = "regulator-fixed";
+ regulator-name = "hsusb1_reset";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 30 0>; /* gpio_62 */
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ /* HS USB Port 1 Power */
+ hsusb1_power: hsusb1_power_reg {
+ compatible = "regulator-fixed";
+ regulator-name = "hsusb1_vbus";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 1 0>; /* gpio_1 */
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ /* HS USB Host PHY on PORT 1 */
+ hsusb1_phy: hsusb1_phy {
+ compatible = "usb-nop-xceiv";
+ reset-supply = <&hsusb1_reset>;
+ vcc-supply = <&hsusb1_power>;
+ };
+
+ /* hsusb1_phy is clocked by FREF_CLK3 i.e. auxclk3 */
+ clock_alias {
+ clock-name = "auxclk3_ck";
+ clock-alias = "main_clk";
+ device = <&hsusb1_phy>;
+ };
+};
+
+&omap4_pmx_core {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &twl6040_pins
+ &mcpdm_pins
+ &mcbsp1_pins
+ &dss_hdmi_pins
+ &tpd12s015_pins
+ &hsusbb1_pins
+ &led_gpio_pins
+ >;
+
+ twl6040_pins: pinmux_twl6040_pins {
+ pinctrl-single,pins = <
+ 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
+ 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */
+ >;
+ };
+
+ mcpdm_pins: pinmux_mcpdm_pins {
+ pinctrl-single,pins = <
+ 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
+ 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
+ 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
+ 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
+ 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
+ >;
+ };
+
+ mcbsp1_pins: pinmux_mcbsp1_pins {
+ pinctrl-single,pins = <
+ 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
+ 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
+ 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
+ 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
+ >;
+ };
+
+ dss_hdmi_pins: pinmux_dss_hdmi_pins {
+ pinctrl-single,pins = <
+ 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+ 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
+ 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
+ >;
+ };
+
+ tpd12s015_pins: pinmux_tpd12s015_pins {
+ pinctrl-single,pins = <
+ 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */
+ 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */
+ 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */
+ >;
+ };
+
+ hsusbb1_pins: pinmux_hsusbb1_pins {
+ pinctrl-single,pins = <
+ 0x82 0x10C /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_clk INPUT | PULLDOWN */
+ 0x84 0x4 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_stp OUTPUT */
+ 0x86 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dir INPUT | PULLDOWN */
+ 0x88 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_nxt INPUT | PULLDOWN */
+ 0x8a 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat0 INPUT | PULLDOWN */
+ 0x8c 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat1 INPUT | PULLDOWN */
+ 0x8e 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat2 INPUT | PULLDOWN */
+ 0x90 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat3 INPUT | PULLDOWN */
+ 0x92 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat4 INPUT | PULLDOWN */
+ 0x94 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat5 INPUT | PULLDOWN */
+ 0x96 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat6 INPUT | PULLDOWN */
+ 0x98 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */
+ >;
+ };
+
+ i2c1_pins: pinmux_i2c1_pins {
+ pinctrl-single,pins = <
+ 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */
+ 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */
+ >;
+ };
+
+ i2c2_pins: pinmux_i2c2_pins {
+ pinctrl-single,pins = <
+ 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */
+ 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */
+ >;
+ };
+
+ i2c3_pins: pinmux_i2c3_pins {
+ pinctrl-single,pins = <
+ 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */
+ 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */
+ >;
+ };
+
+ i2c4_pins: pinmux_i2c4_pins {
+ pinctrl-single,pins = <
+ 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */
+ 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */
+ >;
+ };
+
+ led_gpio_pins: pinmux_leds_pins {
+ pinctrl-single,pins = <
+ >;
+ };
+};
+
+&omap4_pmx_wkup {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &led_wkgpio_pins
+ >;
+
+ led_wkgpio_pins: pinmux_leds_wkpins {
+ pinctrl-single,pins = <
+ 0x1a 0x3 /* gpio_wk7 OUTPUT | MODE 3 */
+ 0x1c 0x3 /* gpio_wk8 OUTPUT | MODE 3 */
+ >;
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+
+ clock-frequency = <400000>;
+
+ twl: twl@48 {
+ reg = <0x48>;
+ /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
+ interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
+ interrupt-parent = <&gic>;
+ };
+
+ twl6040: twl@4b {
+ compatible = "ti,twl6040";
+ /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
+ interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */
+ interrupt-parent = <&gic>;
+ ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */
+
+ vio-supply = <&v1v8>;
+ v2v1-supply = <&v2v1>;
+ enable-active-high;
+ };
+};
+
+/include/ "twl6030.dtsi"
+/include/ "twl6040.dtsi"
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+
+ clock-frequency = <400000>;
+};
+
+&i2c3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+
+ clock-frequency = <100000>;
+
+ /*
+ * Display monitor features are burnt in their EEPROM as EDID data.
+ * The EEPROM is connected as I2C slave device.
+ */
+ eeprom@50 {
+ compatible = "ti,eeprom";
+ reg = <0x50>;
+ };
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_pins>;
+
+ clock-frequency = <400000>;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmc>;
+ bus-width = <8>;
+};
+
+&mmc2 {
+ status = "disabled";
+};
+
+&mmc3 {
+ status = "disabled";
+};
+
+&mmc4 {
+ status = "disabled";
+};
+
+&mmc5 {
+ ti,non-removable;
+ bus-width = <4>;
+};
+
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+};
+
+&mcbsp3 {
+ status = "disabled";
+};
+
+&dmic {
+ status = "disabled";
+};
+
+&dpi {
+ dvi {
+ compatible = "ti,tfp410";
+ data-lines = <24>;
+ gpios = <&gpio1 0 0>; /* 0, power-down */
+ i2c-bus = <&i2c3>;
+ };
+};
+
+&hdmi {
+ tpd12s015: tpd12s015 {
+ compatible = "ti,tpd12s015";
+
+ gpios = <&gpio2 28 0>, /* 60, CT CP HPD */
+ <&gpio2 9 0>, /* 41, LS OE */
+ <&gpio2 31 0>; /* 63, HPD */
+
+ hdmi {
+ compatible = "ti,hdmi_panel";
+ };
+
+ };
+};
+
+&twl_usb_comparator {
+ usb-supply = <&vusb>;
+};
+
+&usbhshost {
+ port1-mode = "ehci-phy";
+};
+
+&usbhsehci {
+ phys = <&hsusb1_phy>;
+};
+
+&usb_otg_hs {
+ interface-type = <1>;
+ mode = <3>;
+ power = <50>;
+};
index 2bc0839f2b8457b77677faa68fb784db93b52e8f..c9ba4372a7ed9d434c4346e6424ce4edd776edaf 100644 (file)
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+/dts-v1/;
-/include/ "omap4-panda.dts"
/include/ "omap4460.dtsi"
+/include/ "omap4-panda-common.dtsi"
+
+&leds {
+ compatible = "gpio-leds";
+ heartbeat {
+ label = "pandaboard::status1";
+ gpios = <&gpio4 14 0>;
+ linux,default-trigger = "heartbeat";
+ };
+ mmc {
+ label = "pandaboard::status2";
+ gpios = <&gpio1 8 0>;
+ linux,default-trigger = "gpio";
+ };
+};
+
+&led_gpio_pins {
+ pinctrl-single,pins = <
+ 0xb6 0x3 /* gpio_110 OUTPUT | MODE 3 */
+ >;
+};
+
+&omap4_pmx_wkup {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &led_wkgpio_pins
+ >;
+
+ led_wkgpio_pins: pinmux_leds_wkpins {
+ pinctrl-single,pins = <
+ 0x1c 0x3 /* gpio_wk8 OUTPUT | MODE 3 */
+ >;
+ };
+};
/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
&sound {
index 90ae5295e01ea63dcd7bb78c8c8a2fa364b40e44..1a23f5a7b362c0ee5bb240c97f35b0d077d51571 100644 (file)
/dts-v1/;
/include/ "omap4.dtsi"
-/include/ "elpida_ecb240abacn.dtsi"
-
-/ {
- model = "TI OMAP4 PandaBoard";
- compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
-
- memory {
- device_type = "memory";
- reg = <0x80000000 0x40000000>; /* 1 GB */
- };
-
- leds {
- compatible = "gpio-leds";
- heartbeat {
- label = "pandaboard::status1";
- gpios = <&gpio1 7 0>;
- linux,default-trigger = "heartbeat";
- };
-
- mmc {
- label = "pandaboard::status2";
- gpios = <&gpio1 8 0>;
- linux,default-trigger = "mmc0";
- };
- };
-
- sound: sound {
- compatible = "ti,abe-twl6040";
- ti,model = "PandaBoard";
-
- ti,mclk-freq = <38400000>;
-
- ti,mcpdm = <&mcpdm>;
- ti,mcbsp1 = <&mcbsp1>;
- ti,mcbsp2 = <&mcbsp2>;
- ti,aess = <&aess>;
-
- ti,twl6040 = <&twl6040>;
-
-
- /* Audio routing */
- ti,audio-routing =
- "Headset Stereophone", "HSOL",
- "Headset Stereophone", "HSOR",
- "Ext Spk", "HFL",
- "Ext Spk", "HFR",
- "Line Out", "AUXL",
- "Line Out", "AUXR",
- "HSMIC", "Headset Mic",
- "Headset Mic", "Headset Mic Bias",
- "AFML", "Line In",
- "AFMR", "Line In",
- "Headset Playback", "PDM_DL1",
- "Handsfree Playback", "PDM_DL2",
- "PDM_UL1", "Capture",
- "40122000.mcbsp Playback", "BT_VX_DL",
- "BT_VX_UL", "40122000.mcbsp Capture",
- "40124000.mcbsp Playback", "MM_EXT_DL",
- "MM_EXT_UL", "40124000.mcbsp Capture";
- };
-
- sound_hdmi {
- compatible = "ti,omap-hdmi-tpd12s015-audio";
- ti,model = "OMAP4HDMI";
-
- ti,hdmi_audio = <&hdmi>;
- ti,level_shifter = <&tpd12s015>;
- };
-
- /* HS USB Port 1 RESET */
- hsusb1_reset: hsusb1_reset_reg {
- compatible = "regulator-fixed";
- regulator-name = "hsusb1_reset";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio2 30 0>; /* gpio_62 */
- startup-delay-us = <70000>;
- enable-active-high;
- };
-
- /* HS USB Port 1 Power */
- hsusb1_power: hsusb1_power_reg {
- compatible = "regulator-fixed";
- regulator-name = "hsusb1_vbus";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio1 1 0>; /* gpio_1 */
- startup-delay-us = <70000>;
- enable-active-high;
- };
-
- /* HS USB Host PHY on PORT 1 */
- hsusb1_phy: hsusb1_phy {
- compatible = "usb-nop-xceiv";
- reset-supply = <&hsusb1_reset>;
- vcc-supply = <&hsusb1_power>;
- };
-
- /* hsusb1_phy is clocked by FREF_CLK3 i.e. auxclk3 */
- clock_alias {
- clock-name = "auxclk3_ck";
- clock-alias = "main_clk";
- device = <&hsusb1_phy>;
- };
-};
-
-&omap4_pmx_core {
- pinctrl-names = "default";
- pinctrl-0 = <
- &twl6040_pins
- &mcpdm_pins
- &mcbsp1_pins
- &dss_hdmi_pins
- &tpd12s015_pins
- &hsusbb1_pins
- >;
-
- twl6040_pins: pinmux_twl6040_pins {
- pinctrl-single,pins = <
- 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
- 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */
- >;
- };
-
- mcpdm_pins: pinmux_mcpdm_pins {
- pinctrl-single,pins = <
- 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
- 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
- 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
- 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
- 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
- >;
- };
-
- mcbsp1_pins: pinmux_mcbsp1_pins {
- pinctrl-single,pins = <
- 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
- 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
- 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
- 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
- >;
- };
-
- dss_hdmi_pins: pinmux_dss_hdmi_pins {
- pinctrl-single,pins = <
- 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
- 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
- 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
- >;
- };
-
- tpd12s015_pins: pinmux_tpd12s015_pins {
- pinctrl-single,pins = <
- 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */
- 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */
- 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */
- >;
- };
-
- hsusbb1_pins: pinmux_hsusbb1_pins {
- pinctrl-single,pins = <
- 0x82 0x10C /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_clk INPUT | PULLDOWN */
- 0x84 0x4 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_stp OUTPUT */
- 0x86 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dir INPUT | PULLDOWN */
- 0x88 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_nxt INPUT | PULLDOWN */
- 0x8a 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat0 INPUT | PULLDOWN */
- 0x8c 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat1 INPUT | PULLDOWN */
- 0x8e 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat2 INPUT | PULLDOWN */
- 0x90 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat3 INPUT | PULLDOWN */
- 0x92 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat4 INPUT | PULLDOWN */
- 0x94 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat5 INPUT | PULLDOWN */
- 0x96 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat6 INPUT | PULLDOWN */
- 0x98 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */
- >;
- };
-
- i2c1_pins: pinmux_i2c1_pins {
- pinctrl-single,pins = <
- 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */
- 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */
- >;
- };
-
- i2c2_pins: pinmux_i2c2_pins {
- pinctrl-single,pins = <
- 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */
- 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */
- >;
- };
-
- i2c3_pins: pinmux_i2c3_pins {
- pinctrl-single,pins = <
- 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */
- 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */
- >;
- };
-
- i2c4_pins: pinmux_i2c4_pins {
- pinctrl-single,pins = <
- 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */
- 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */
- >;
- };
-};
-
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
-
- clock-frequency = <400000>;
-
- twl: twl@48 {
- reg = <0x48>;
- /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
- interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
- interrupt-parent = <&gic>;
- };
-
- twl6040: twl@4b {
- compatible = "ti,twl6040";
- /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
- interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */
- interrupt-parent = <&gic>;
- ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */
-
- vio-supply = <&v1v8>;
- v2v1-supply = <&v2v1>;
- enable-active-high;
- };
-};
-
-/include/ "twl6030.dtsi"
-/include/ "twl6040.dtsi"
-
-&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins>;
-
- clock-frequency = <400000>;
-};
-
-&i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c3_pins>;
-
- clock-frequency = <100000>;
-
- /*
- * Display monitor features are burnt in their EEPROM as EDID data.
- * The EEPROM is connected as I2C slave device.
- */
- eeprom@50 {
- compatible = "ti,eeprom";
- reg = <0x50>;
- };
-};
-
-&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c4_pins>;
-
- clock-frequency = <400000>;
-};
-
-&mmc1 {
- vmmc-supply = <&vmmc>;
- bus-width = <8>;
-};
-
-&mmc2 {
- status = "disabled";
-};
-
-&mmc3 {
- status = "disabled";
-};
-
-&mmc4 {
- status = "disabled";
-};
-
-&mmc5 {
- ti,non-removable;
- bus-width = <4>;
-};
-
-&emif1 {
- cs1-used;
- device-handle = <&elpida_ECB240ABACN>;
-};
-
-&emif2 {
- cs1-used;
- device-handle = <&elpida_ECB240ABACN>;
-};
-
-&mcbsp3 {
- status = "disabled";
-};
-
-&dmic {
- status = "disabled";
-};
-
-&dpi {
- dvi {
- compatible = "ti,tfp410";
- data-lines = <24>;
- gpios = <&gpio1 0 0>; /* 0, power-down */
- i2c-bus = <&i2c3>;
- };
-};
-
-&hdmi {
- tpd12s015: tpd12s015 {
- compatible = "ti,tpd12s015";
-
- gpios = <&gpio2 28 0>, /* 60, CT CP HPD */
- <&gpio2 9 0>, /* 41, LS OE */
- <&gpio2 31 0>; /* 63, HPD */
-
- hdmi {
- compatible = "ti,hdmi_panel";
- };
-
- };
-};
-
-&twl_usb_comparator {
- usb-supply = <&vusb>;
-};
-
-&usbhshost {
- port1-mode = "ehci-phy";
-};
-
-&usbhsehci {
- phys = <&hsusb1_phy>;
-};
-
-&usb_otg_hs {
- interface-type = <1>;
- mode = <3>;
- power = <50>;
-};
+/include/ "omap4-panda-common.dtsi"
index ec0490a31715e6d8ab9cf18a3deab398fad298d8..92c4a3b293bd5b153602bba3998b5fa12172be1a 100644 (file)
*/
/dts-v1/;
-/include/ "omap4.dtsi"
+/include/ "omap443x.dtsi"
/include/ "elpida_ecb240abacn.dtsi"
/ {
index efa876030bf33d9d181454aec62c4184d8bcbaa4..7e04103779c43d1aa336ac6e57d983c87fbb6884 100644 (file)
*/
/dts-v1/;
-/include/ "omap4.dtsi"
+/include/ "omap443x.dtsi"
/ {
model = "Variscite OMAP4 SOM";
index 5e4984a58c40f82cb1cb59f86a5413a50ecb1fcb..403b879c6d87f4eecc84da59db971cf644190c1b 100644 (file)
cpu@0 {
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
+ clocks = <&dpll_mpu>;
+ clock-names = "cpu";
};
cpu@1 {
compatible = "arm,cortex-a9";
ti,hwmods = "counter_32k";
};
+ dpll_mpu: dpll_mpu {
+ #clock-cells = <0>;
+ compatible = "ti,omap-clock";
+ };
+
omap4_pmx_core: pinmux@4a100040 {
compatible = "ti,omap4-padconf", "pinctrl-single";
reg = <0x4a100040 0x0196>;
pinctrl-single,function-mask = <0x7fff>;
};
+ sdma: dma-controller@4a056000 {
+ compatible = "ti,omap4430-sdma";
+ reg = <0x4a056000 0x1000>;
+ interrupts = <0 12 0x4>,
+ <0 13 0x4>,
+ <0 14 0x4>,
+ <0 15 0x4>;
+ #dma-cells = <1>;
+ #dma-channels = <32>;
+ #dma-requests = <127>;
+ };
+
+ dmm: dmm@4e000000 {
+ compatible = "ti,omap4-dmm";
+ reg = <0x4e000000 0x800>;
+ interrupts = <0 113 0x4>;
+ ti,hwmods = "dmm";
+ };
+
dss {
compatible = "ti,omap4-dss";
ti,hwmods = "dss_core";
vdda_hdmi_dac-supply = <&vdac>;
video-source = <1>;
};
- };
-
- sdma: dma-controller@4a056000 {
- compatible = "ti,omap4430-sdma";
- reg = <0x4a056000 0x1000>;
- interrupts = <0 12 0x4>,
- <0 13 0x4>,
- <0 14 0x4>,
- <0 15 0x4>;
- #dma-cells = <1>;
- #dma-channels = <32>;
- #dma-requests = <127>;
};
gpio1: gpio@4a310000 {
diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi
--- /dev/null
@@ -0,0 +1,27 @@
+/*
+ * Device Tree Source for OMAP443x SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "omap4.dtsi"
+
+/ {
+ cpus {
+ cpu@0 {
+ /* OMAP443x variants OPP50-OPPNT */
+ operating-points = <
+ /* kHz uV */
+ 300000 1025000
+ 600000 1200000
+ 800000 1313000
+ 1008000 1375000
+ >;
+ clock-latency = <300000>; /* From legacy driver */
+ };
+ };
+};
index 0a1d38bdcd047af3c2b0064b8eaacb7300044bd2..e09b3e1f91067fefa2a02c37788da0ea4b0ae16a 100644 (file)
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
+/include/ "omap4.dtsi"
/ {
pmu {
diff --git a/arch/arm/boot/dts/omap5-panda.dts b/arch/arm/boot/dts/omap5-panda.dts
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/include/ "omap5-evm.dts"
-
-/ {
- model = "TI OMAP5 EVM board";
- compatible = "ti,omap5-panda", "ti,omap5";
-
- memory {
- device_type = "memory";
- reg = <0x80000000 0x80000000>; /* 2 GB */
- };
-
- vmmcsd_fixed: fixedregulator-mmcsd {
- compatible = "regulator-fixed";
- regulator-name = "vmmcsd_fixed";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- sound {
- compatible = "ti,abe-twl6040";
- ti,model = "PandaBoard5";
-
- ti,jack-detection = <1>;
- ti,mclk-freq = <19200000>;
-
- ti,mcpdm = <&mcpdm>;
- ti,mcbsp1 = <&mcbsp1>;
- ti,mcbsp2 = <&mcbsp2>;
- ti,aess = <&aess>;
-
- ti,twl6040 = <&twl6040>;
-
- /* Audio routing */
- ti,audio-routing =
- "Headset Stereophone", "HSOL",
- "Headset Stereophone", "HSOR",
- "Line Out", "AUXL",
- "Line Out", "AUXR",
- "HSMIC", "Headset Mic",
- "Headset Mic", "Headset Mic Bias",
- "AFML", "Line In",
- "AFMR", "Line In",
- "Headset Playback", "PDM_DL1",
- "PDM_UL1", "Capture",
- "40122000.mcbsp Playback", "BT_VX_DL",
- "BT_VX_UL", "40122000.mcbsp Capture",
- "40124000.mcbsp Playback", "MM_EXT_DL",
- "MM_EXT_UL", "40124000.mcbsp Capture";
- };
-
- sound_hdmi {
- compatible = "ti,omap-hdmi-tpd12s015-audio";
- ti,model = "OMAP5HDMI";
-
- ti,hdmi_audio = <&hdmi>;
- ti,level_shifter = <&tpd12s015>;
- };
-};
-
-/* card detect gpio is different for mmc1 / micro sd card slot */
-&mmc1_pins {
- pinctrl-single,pins = <
- 0x1a2 0x118 /* sdcard_clk.sdcard_clk INPUT PULLUP | MODE0 */
- 0x1a4 0x118 /* sdcard_cmd.sdcard_cmd INPUT PULLUP | MODE0 */
- 0x1a6 0x118 /* sdcard_data2.sdcard_data2 INPUT PULLUP | MODE0 */
- 0x1a8 0x118 /* sdcard_data3.sdcard_data3 INPUT PULLUP | MODE0 */
- 0x1aa 0x118 /* sdcard_data0.sdcard_data0 INPUT PULLUP | MODE0 */
- 0x1ac 0x118 /* sdcard_data1.sdcard_data1 INPUT PULLUP | MODE0 */
- 0x194 0x106 /* uart6_rts.gpio5_152 INPUT | MODE6 */
- >;
- };
-
-&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins>;
- vmmc-supply = <&vmmcsd_fixed>;
- bus-width = <4>;
- cd-gpios = <&gpio5 24 0>; /* gpio 152 */
-};
-
-&mmc2 {
- vmmc-supply = <&vmmcsd_fixed>;
- vmmc-aux-supply = <&ldo9_reg>;
- bus-width = <8>;
- ti,non-removable;
-};
-
-&mmc3 {
- bus-width = <4>;
- ti,non-removable;
-};
-
-&mmc4 {
- status = "disabled";
-};
-
-&mmc5 {
- status = "disabled";
-};
-
-&i2c1 {
- clock-frequency = <400000>;
-
- palmas: palmas@48 {
- reg = <0x48>;
- /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
- interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */
- interrupt-parent = <&gic>;
- };
-
- twl6040: twl@4b {
- compatible = "ti,twl6040";
-
- interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */
- interrupt-parent = <&gic>;
- ti,audpwron-gpio = <&gpio5 13 0>; /* gpio line 141 */
-
- vio-supply = <&smps7_reg>;
- v2v1-supply = <&smps9_reg>;
- enable-active-high;
- };
-};
-
-
-&i2c5 {
- tca6424a: tca6424a@22 {
- compatible = "ti,tca6424a";
- reg = <0x22>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-};
-
-&omap5_pmx_core {
- pinctrl-names = "default";
- pinctrl-0 = <
- &twl6040_pins
- &mcpdm_pins
- &dmic_pins
- &mcbsp1_pins
- &mcbsp2_pins
- &dss_hdmi_pins
- &tpd12s015_pins
- &tca6424a_pins
- >;
-
- twl6040_pins: pinmux_twl6040_pins {
- pinctrl-single,pins = <
- 0x17e 0x6 /* mcspi1_somi.gpio5_141 OUTPUT | MODE6 */
- >;
- };
-
- mcpdm_pins: pinmux_mcpdm_pins {
- pinctrl-single,pins = <
- 0x142 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
- 0x15c 0x108 /* abemcpdm_ul_data.abemcpdm_ul_data INPUT PULLDOWN | MODE0 */
- 0x15e 0x108 /* abemcpdm_dl_data.abemcpdm_dl_data INPUT PULLDOWN | MODE0 */
- 0x160 0x118 /* abemcpdm_frame.abemcpdm_frame INPUT PULLUP | MODE0 */
- 0x162 0x108 /* abemcpdm_lb_clk.abemcpdm_lb_clk INPUT PULLDOWN | MODE0 */
- >;
- };
-
- dmic_pins: pinmux_dmic_pins {
- pinctrl-single,pins = <
- 0x144 0x100 /* abedmic_din1.abedmic_din1 INPUT | MODE0 */
- 0x146 0x100 /* abedmic_din2.abedmic_din2 INPUT | MODE0 */
- 0x148 0x100 /* abedmic_din3.abedmic_din3 INPUT | MODE0 */
- 0x14a 0 /* abedmic_clk1.abedmic_clk1 OUTPUT | MODE0 */
- >;
- };
-
- mcbsp1_pins: pinmux_mcbsp1_pins {
- pinctrl-single,pins = <
- 0x14c 0x101 /* abedmic_clk2.abemcbsp1_fsx INPUT | MODE1 */
- 0x14e 0x9 /* abedmic_clk3.abemcbsp1_dx OUTPUT PULLDOWN | MODE1 */
- 0x150 0x101 /* abeslimbus1_clock.abemcbsp1_clkx INPUT | MODE0 */
- 0x152 0x109 /* abeslimbus1_data.abemcbsp1_dr INPUT PULLDOWN | MODE1 */
- >;
- };
-
- mcbsp2_pins: pinmux_mcbsp2_pins {
- pinctrl-single,pins = <
- 0x154 0x108 /* abemcbsp2_dr.abemcbsp2_dr INPUT PULLDOWN | MODE0 */
- 0x156 0x8 /* abemcbsp2_dx.abemcbsp2_dx OUTPUT PULLDOWN | MODE0 */
- 0x158 0x100 /* abemcbsp2_fsx.abemcbsp2_fsx INPUT | MODE0 */
- 0x15a 0x100 /* abemcbsp2_clkx.abemcbsp2_clkx INPUT | MODE0 */
- >;
- };
-
- dss_hdmi_pins: pinmux_dss_hdmi_pins {
- pinctrl-single,pins = <
- 0x0fc 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
- 0x100 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
- 0x102 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
- >;
- };
-
- tpd12s015_pins: pinmux_tpd12s015_pins {
- pinctrl-single,pins = <
- 0x0fe 0x116 /* hdmi_hpd.gpio7_193 INPUT PULLDOWN | MODE6 */
- >;
- };
-
- tca6424a_pins: pinmux_tca6424a_pins {
- pinctrl-single,pins = <
- 0x186 0x100 /* i2c5_scl.i2c5_scl INPUT | MODE0 */
- 0x188 0x100 /* i2c5_sda.i2c5_sda INPUT | MODE0 */
- >;
- };
-};
-
-&hdmi {
- tpd12s015: tpd12s015 {
- compatible = "ti,tpd12s015";
-
- gpios = <&tca6424a 0 0>, /* TCA6424A P01, CT_CP_HDP */
- <&tca6424a 1 0>, /* TCA6424A P00, LS_OE*/
- <&gpio7 1 0>; /* 193, HPD */
-
- hdmi-monitor {
- compatible = "ti,hdmi_panel";
- };
-
- };
-};
-
-/include/ "palmas.dtsi"
-/include/ "twl6040.dtsi"
index 2bdbd68d0f4386e0d9b91a9d2c4db5c418b54a82..9d9bbb65190abab6118d4d8b6d45d1324deb5c5c 100644 (file)
model = "TI OMAP5 sEVM board";
compatible = "ti,omap5-sevm", "ti,omap5";
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&smps123_reg>;
+ };
+ };
+
memory {
device_type = "memory";
reg = <0x80000000 0x7F000000>; /* 2032 MB */
index 2865b4f3a5e0c34d0d0b39438d2ddee179d64498..7b7b5347ef15df576b93d0c27864171bd8ca1a81 100644 (file)
model = "TI OMAP5 uEVM board";
compatible = "ti,omap5-uevm", "ti,omap5";
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&smps123_reg>;
+ };
+ };
+
memory {
device_type = "memory";
reg = <0x80000000 0x7F000000>; /* 2032 MB */
ti,hdmi_audio = <&hdmi>;
ti,level_shifter = <&tpd12s015>;
};
+
+ leds {
+ compatible = "gpio-leds";
+ led@1 {
+ label = "omap5:blue:usr1";
+ gpios = <&gpio5 25 0>; /* gpio5_153 D1 LED */
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+ };
};
&omap5_pmx_core {
&tpd12s015_pins
&tca6424a_pins
&palmas_pins
+ &led_gpio_pins
>;
twl6040_pins: pinmux_twl6040_pins {
dss_hdmi_pins: pinmux_dss_hdmi_pins {
pinctrl-single,pins = <
0x0fc 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
- 0x100 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
- 0x102 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
+ 0x100 0x106 /* GPIO7_194, DDC-SCL */
+ 0x102 0x106 /* GPIO7_195, DDC-SDA */
>;
};
0x140 0x11f /* MSLEEP INPUT | PULLUP | MODE7 */
>;
};
+
+ led_gpio_pins: pinmux_led_gpio_pins {
+ pinctrl-single,pins = <
+ 0x196 0x6 /* uart3_cts_rctx.gpio5_153 OUTPUT | MODE6 */
+ >;
+ };
};
&omap5_pmx_wkup {
gpios = <&tca6424a 0 0>, /* TCA6424A P01, CT_CP_HDP */
<&tca6424a 1 0>, /* TCA6424A P00, LS_OE*/
- <&gpio7 1 0>; /* 193, HPD */
+ <&gpio7 1 0>, /* 193, HPD */
+ <&gpio7 2 0>, /* 194, SCL */
+ <&gpio7 3 0>; /* 195, SDA */
+
hdmi-monitor {
compatible = "ti,hdmi_panel";
index ed7fc47d0d5ede18d81c54122bfb10027e6c025a..f51745028961a0bcff8471e0e36289733612c055 100644 (file)
cpus {
cpu@0 {
compatible = "arm,cortex-a15";
- cpu0-supply = <&smps123_reg>;
operating-points = <
/* kHz uV */
/* Only for Nominal Samples */
1000000 1060000
1500000 1250000
>;
+ clocks = <&dpll_mpu>;
+ clock-names = "cpu";
clock-latency = <300000>; /* From omap-cpufreq driver */
};
cpu@1 {
ti,hwmods = "counter_32k";
};
+ dpll_mpu: dpll_mpu {
+ #clock-cells = <0>;
+ compatible = "ti,omap-clock";
+ };
+
omap5_pmx_core: pinmux@4a002840 {
compatible = "ti,omap4-padconf", "pinctrl-single";
reg = <0x4a002840 0x01b6>;
ti,timer-pwm;
};
+ dmm: dmm@4e000000 {
+ compatible = "ti,omap5-dmm";
+ reg = <0x4e000000 0x800>;
+ interrupts = <0 113 0x4>;
+ ti,hwmods = "dmm";
+ };
+
emif1: emif@0x4c000000 {
compatible = "ti,emif-4d5";
ti,hwmods = "emif1";
video-source = <1>;
};
};
+
+ bandgap {
+ reg = <0x4a0021e0 0xc
+ 0x4a00232c 0xc
+ 0x4a002380 0x2c
+ 0x4a0023C0 0x3c>;
+ interrupts = <0 126 4>; /* talert */
+ compatible = "ti,omap5430-bandgap";
+ };
};
};
diff --git a/arch/arm/boot/dts/tps659038.dtsi b/arch/arm/boot/dts/tps659038.dtsi
--- /dev/null
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ * Based on "omap4.dtsi"
+ */
+
+/*
+ * TPS659038 is an Integrated Power Management Chip from Texas Instruments
+ * Data Manual - TPS659039-Q1 POWER MANAGEMENT UNIT (PMU) FOR PROCESSOR Data Manual
+ * Register Manual - TPS659038/39-Q1 Functional Register Descriptions.
+ */
+
+&tps659038 {
+ compatible = "ti,tps659038";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ tps659038_pmic {
+ compatible = "ti,tps659038-pmic";
+ ti,ldo6_vibrator = <0>;
+ ti,smps10 = <0>;
+
+ regulators {
+ smps123_reg: smps123 {
+ regulator-name = "smps123";
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps45_reg: smps45 {
+ regulator-name = "smps45";
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1310000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps6_reg: smps6 {
+ regulator-name = "smps6";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1310000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps7_reg: smps7 {
+ regulator-name = "smps7";
+ regulator-min-microvolt = <1030000>;
+ regulator-max-microvolt = <1030000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps8_reg: smps8 {
+ regulator-name = "smps8";
+ regulator-min-microvolt = < 600000>;
+ regulator-max-microvolt = <1310000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps9_reg: smps9 {
+ regulator-name = "smps9";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo1_reg: ldo1 {
+ regulator-name = "ldo1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo2_reg: ldo2 {
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo3_reg: ldo3 {
+ regulator-name = "ldo3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo4_reg: ldo4 {
+ regulator-name = "ldo4";
+ regulator-min-microvolt = <2200000>;
+ regulator-max-microvolt = <2200000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo5_reg: ldo5 {
+ regulator-name = "ldo5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo6_reg: ldo6 {
+ regulator-name = "ldo6";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo7_reg: ldo7 {
+ regulator-name = "ldo7";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo8_reg: ldo8 {
+ regulator-name = "ldo8";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo9_reg: ldo9 {
+ regulator-name = "ldo9";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldoln_reg: ldoln {
+ regulator-name = "ldoln";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldousb_reg: ldousb {
+ regulator-name = "ldousb";
+ regulator-min-microvolt = <3250000>;
+ regulator-max-microvolt = <3250000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
+ };
+};
index 23c0cdd6172b98da54bc8080c25ab209e2decac9..b3034da00a37bfe6a5361420bc2fb8d99101fb5a 100644 (file)
compatible = "ti,twl4030-wdt";
};
+ vcc: regulator-vdd1 {
+ compatible = "ti,twl4030-vdd1";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1450000>;
+ };
+
vdac: regulator-vdac {
compatible = "ti,twl4030-vdac";
regulator-min-microvolt = <1800000>;
index 606d48f3b8f81c10370b718d7b2b3475818b9a03..8aab786863dfabac6854bf6ce1c6054074f61a28 100644 (file)
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_SDIO_UART=m
CONFIG_MMC_ATMELMCI=y
-CONFIG_MMC_ATMELMCI_DMA=y
CONFIG_LEDS_ATMEL_PWM=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGER_TIMER=y
index 10561f4d6239c47d1d3060592395d3315ba25d7e..b94343fa51046f4b396357a4aea471d76b714317 100644 (file)
CONFIG_OMAP_RESET_CLOCKS=y
CONFIG_OMAP_MUX_DEBUG=y
CONFIG_SOC_OMAP5=y
+CONFIG_SOC_DRA7XX=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_ERRATA_411920=y
CONFIG_SMP=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_GENERIC_CPUFREQ_CPU0=y
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
CONFIG_FPE_NWFPE=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_NETFILTER=y
+CONFIG_CAN=m
+CONFIG_CAN_RAW=m
+CONFIG_CAN_BCM=m
+CONFIG_CAN_C_CAN=m
+CONFIG_CAN_C_CAN_PLATFORM=m
CONFIG_BT=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=16384
+CONFIG_SENSORS_TSL2550=m
+CONFIG_SENSORS_LIS3_I2C=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_MATRIX=m
CONFIG_KEYBOARD_TWL4030=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_TWL4030=y
CONFIG_W1=y
CONFIG_POWER_SUPPLY=y
+CONFIG_SENSORS_LM75=m
+CONFIG_THERMAL=y
+CONFIG_THERMAL_GOV_FAIR_SHARE=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_CPU_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_OMAP_WATCHDOG=y
CONFIG_TWL4030_WATCHDOG=y
CONFIG_PALMAS_WATCHDOG=y
CONFIG_MFD_TPS65217=y
+CONFIG_TWL6040_CORE=y
CONFIG_REGULATOR_TWL4030=y
CONFIG_MFD_PALMAS=y
CONFIG_MFD_PALMAS_GPADC=y
CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
CONFIG_USB_GSPCA=m
CONFIG_DRM=y
+CONFIG_DRM_OMAP=y
+CONFIG_DRM_OMAP_NUM_CRTCS=3
CONFIG_FIRMWARE_EDID=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_TILEBLITTING=y
CONFIG_OMAP2_DSS=y
+CONFIG_OMAP2_DSS_DRA7XX_DPI=y
CONFIG_OMAP2_DSS_RFBI=y
CONFIG_OMAP2_DSS_SDI=y
CONFIG_OMAP2_DSS_DSI=y
-CONFIG_FB_OMAP_LCD_VGA=y
-CONFIG_FB_OMAP2=m
-CONFIG_PANEL_GENERIC_DPI=m
-CONFIG_PANEL_SHARP_LS037V7DW01=m
-CONFIG_PANEL_NEC_NL8048HL11_01B=m
-CONFIG_PANEL_TAAL=m
-CONFIG_PANEL_TPO_TD043MTEA1=m
-CONFIG_PANEL_ACX565AKM=m
+CONFIG_PANEL_GENERIC_DPI=y
+CONFIG_PANEL_TFP410=y
+CONFIG_PANEL_LGPHILIPS_LB035Q02=y
+CONFIG_PANEL_SHARP_LS037V7DW01=y
+CONFIG_PANEL_NEC_NL8048HL11_01B=y
+CONFIG_PANEL_PICODLP=y
+CONFIG_PANEL_TFCS9700=y
+CONFIG_PANEL_TAAL=y
+CONFIG_PANEL_LG4591=y
+CONFIG_PANEL_TPO_TD043MTEA1=y
+CONFIG_PANEL_ACX565AKM=y
+CONFIG_PANEL_N8X0=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_PLATFORM=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FONTS=y
CONFIG_SDIO_UART=y
CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_OMAP=y
+CONFIG_RTC_DRV_PALMAS=y
CONFIG_RTC_DRV_TWL92330=y
CONFIG_RTC_DRV_TWL4030=y
-CONFIG_RTC_DRV_PALMAS=y
+CONFIG_RTC_DRV_OMAP=y
CONFIG_DMADEVICES=y
CONFIG_TI_EDMA=y
CONFIG_DMA_OMAP=y
CONFIG_STAGING=y
-CONFIG_DRM_OMAP=y
-CONFIG_DRM_OMAP_NUM_CRTCS=3
+CONFIG_TI_SOC_THERMAL=y
+CONFIG_TI_THERMAL=y
+CONFIG_OMAP4_THERMAL=y
+CONFIG_OMAP5_THERMAL=y
+CONFIG_DRA752_THERMAL=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_CRC_ITU_T=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
+CONFIG_TI_DAVINCI_MDIO=y
+CONFIG_TI_DAVINCI_CPDMA=y
index 02fe2fbe2477078b4fa8da59c6f2a416fdb71913..ed94b1a366ae62d9535c66847ebe85abf4f4f0c0 100644 (file)
* IOP3XX processor registers
*/
#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000
-#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfeffe000
+#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfedfe000
#define IOP3XX_PERIPHERAL_SIZE 0x00002000
#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
IOP3XX_PERIPHERAL_SIZE - 1)
index 8c5e828f484dd7a039a2c5c9d060d6bba008c0ef..91b99abe7a95c114be0d3b628fb8b8d09f781c74 100644 (file)
#endif
#endif
+/*
+ * Needed to be able to broadcast the TLB invalidation for kmap.
+ */
+#ifdef CONFIG_ARM_ERRATA_798181
+#undef ARCH_NEEDS_KMAP_HIGH_GET
+#endif
+
#ifdef ARCH_NEEDS_KMAP_HIGH_GET
extern void *kmap_high_get(struct page *page);
#else
index 863a6611323c70077a9428b198a10d59758ff919..a7b85e0d0cc154a90a2efadca763cc60d95e82d8 100644 (file)
void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);
#define init_new_context(tsk,mm) ({ atomic64_set(&mm->context.id, 0); 0; })
+DECLARE_PER_CPU(atomic64_t, active_asids);
+
#else /* !CONFIG_CPU_HAS_ASID */
#ifdef CONFIG_MMU
index 6e924d3a77ebc168cb8359e7cf79f21b8890146d..a9f3ddf7b9959d5fc0ffac2484d2b9a52f845503 100644 (file)
}
}
+#ifdef CONFIG_ARM_ERRATA_798181
+static inline void dummy_flush_tlb_a15_erratum(void)
+{
+ /*
+ * Dummy TLBIMVAIS. Using the unmapped address 0 and ASID 0.
+ */
+ asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
+ dsb();
+}
+#else
+static inline void dummy_flush_tlb_a15_erratum(void)
+{
+}
+#endif
+
/*
* flush_pmd_entry
*
index f9e8657dd24122cf67362e4def103d41cfd25329..23fa6a21e228d15da6698d41a3bff2aae63ff5b9 100644 (file)
struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
struct pmu *leader_pmu = event->group_leader->pmu;
- if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF)
+ if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
+ return 1;
+
+ if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
return 1;
return armpmu->get_event_idx(hw_events, event) >= 0;
index bd6f56b9ec2101534b7477c11c9f6ef0a3a6e68b..59d2adb764a995f9174a6494bd2bcc1974c10e73 100644 (file)
static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
-static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
{
return (cyc * mult) >> shift;
}
-static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
+static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask)
{
u64 epoch_ns;
u32 epoch_cyc;
index 02c5d2ce23bf121f17479bba2b52460419481930..dcf7f17c3b81cbf32181d306b7878209d5e2deeb 100644 (file)
#include <asm/smp_plat.h>
#include <asm/tlbflush.h>
+#include <asm/mmu_context.h>
/**********************************************************************/
local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
}
+#ifdef CONFIG_ARM_ERRATA_798181
+static int erratum_a15_798181(void)
+{
+ unsigned int midr = read_cpuid_id();
+
+ /* Cortex-A15 r0p0..r3p2 affected */
+ if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
+ return 0;
+ return 1;
+}
+#else
+static int erratum_a15_798181(void)
+{
+ return 0;
+}
+#endif
+
+static void ipi_flush_tlb_a15_erratum(void *arg)
+{
+ dmb();
+}
+
+static void broadcast_tlb_a15_erratum(void)
+{
+ if (!erratum_a15_798181())
+ return;
+
+ dummy_flush_tlb_a15_erratum();
+ smp_call_function_many(cpu_online_mask, ipi_flush_tlb_a15_erratum,
+ NULL, 1);
+}
+
+static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
+{
+ int cpu;
+ cpumask_t mask = { CPU_BITS_NONE };
+
+ if (!erratum_a15_798181())
+ return;
+
+ dummy_flush_tlb_a15_erratum();
+ for_each_online_cpu(cpu) {
+ if (cpu == smp_processor_id())
+ continue;
+ /*
+ * We only need to send an IPI if the other CPUs are running
+ * the same ASID as the one being invalidated. There is no
+ * need for locking around the active_asids check since the
+ * switch_mm() function has at least one dmb() (as required by
+ * this workaround) in case a context switch happens on
+ * another CPU after the condition below.
+ */
+ if (atomic64_read(&mm->context.id) ==
+ atomic64_read(&per_cpu(active_asids, cpu)))
+ cpumask_set_cpu(cpu, &mask);
+ }
+ smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
+}
+
void flush_tlb_all(void)
{
if (tlb_ops_need_broadcast())
on_each_cpu(ipi_flush_tlb_all, NULL, 1);
else
local_flush_tlb_all();
+ broadcast_tlb_a15_erratum();
}
void flush_tlb_mm(struct mm_struct *mm)
on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
else
local_flush_tlb_mm(mm);
+ broadcast_tlb_mm_a15_erratum(mm);
}
void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
&ta, 1);
} else
local_flush_tlb_page(vma, uaddr);
+ broadcast_tlb_mm_a15_erratum(vma->vm_mm);
}
void flush_tlb_kernel_page(unsigned long kaddr)
on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
} else
local_flush_tlb_kernel_page(kaddr);
+ broadcast_tlb_a15_erratum();
}
void flush_tlb_range(struct vm_area_struct *vma,
&ta, 1);
} else
local_flush_tlb_range(vma, start, end);
+ broadcast_tlb_mm_a15_erratum(vma->vm_mm);
}
void flush_tlb_kernel_range(unsigned long start, unsigned long end)
on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
} else
local_flush_tlb_kernel_range(start, end);
+ broadcast_tlb_a15_erratum();
}
index 4b678478cf95d9f60d6a4484b4a490ee46228d45..6b4608d58da284bba765701ddc06a0ddbd57b443 100644 (file)
of_id = of_match_node(rstc_ids, np);
if (!of_id)
- panic("AT91: rtsc no restart function availlable\n");
+ panic("AT91: rtsc no restart function available\n");
arm_pm_restart = of_id->data;
index 0edce4bf3ae7a8328445783f8d35dd0176867325..5e3ca7a10438d3cae3c25db73acfb2be61a3efee 100644 (file)
clk_prepare_enable(clk[gpio3_gate]);
clk_prepare_enable(clk[iim_gate]);
clk_prepare_enable(clk[emi_gate]);
+ clk_prepare_enable(clk[max_gate]);
+ clk_prepare_enable(clk[iomuxc_gate])