ARM: dts: OMAP5: AESS: Fix AESS L3 Interconnect address

OMAP543x_ES2.0_Public_TRM from May 2013 has this same bug too, but the
right address is 490f1000. Also the bit-wise match to MPU private
access looks better this way.

Signed-off-by: Jyri Sarha <jsarha@ti.com>

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 8f1b49b5c6a34c56f2f2f0727b274996c68d7655..c3f69f30a365a986b955a97d6675dec1063d0dbe 100644 (file)
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -454,7 +454,7 @@
                              <0x401a0000 0x1fff>, /* CMEM - MPU */
                              <0x401c0000 0x5fff>, /* SMEM - MPU */
                              <0x401e0000 0x1fff>, /* PMEM - MPU */
-                             <0x4901f000 0x3ff>, /* L3 Interconnect */
+                             <0x490f1000 0x3ff>, /* L3 Interconnect */
                              <0x49080000 0xffff>, /* DMEM - MPU */
                              <0x490a0000 0x1fff>, /* CMEM - MPU */
                              <0x490ce000 0x5fff>, /* SMEM - MPU */