OMAPDSS: DISPC: Add support for global MFLAG feature

Description: DSS generates real time and non real time traffic (read and write).
Real time traffic can not be stalled. FIFO overflow/underflow can occur in case
of real time traffic. MFLAG mechanisum can dynamically increase the priority of
DISPC real time traffic when required based on the fullness of the DISPC
DMA buffers (read and write buffers).

Programmable buffer thresholds are used to indicate when MFLAG shall be generated.
MFLAG is provided to L3 and used to grant OCP requests. It is implemented for all
DMA buffers (gfx, video1, video2, video3 and write-back).

Set mflag start signal at the beginning of each frame

Change-Id: I89e5ec9eff1ee533da44de429a0a4f670f1f8ef2
Signed-off-by: Sreenidhi Koti <sreenidhi@ti.com>
Signed-off-by: Arthur Philpott <arthur.philpott@ti.com>
Signed-off-by: Srinivas Pulukuru <srinivas.pulukuru@ti.com>

diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 3ff855a2bf07977e111c7d67888c4d3aac9c9e73..2567da7af4e0a86631c6c7fd816a29b75d187295 100644 (file)
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -1172,6 +1172,48 @@ static u32 dispc_ovl_get_fifo_size(enum omap_plane plane)
        return size;
 }
 
+static void dispc_ovl_set_mflag_attribute(enum dispc_mflag_ctrl ctrl)
+{
+       REG_FLD_MOD(DISPC_GLOBAL_MFLAG, ctrl, 1, 0);
+}
+
+static void dispc_ovl_set_mflag_start(enum dispc_mflag_start start)
+{
+       REG_FLD_MOD(DISPC_GLOBAL_MFLAG, start, 2, 2);
+}
+
+void dispc_ovl_set_global_mflag(enum omap_plane plane, bool mflag)
+{
+       u32 fifosize;
+       u8 bit;
+
+       /* Set the ARBITRATION bit to give
+        * highest priority to the pipeline.
+        * MFLAG is applicable only to high
+        * priority pipes.
+        */
+        if (plane == OMAP_DSS_GFX)
+               bit = 14;
+        else
+               bit = 23;
+
+        REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), mflag, bit, bit);
+
+        dispc_ovl_set_mflag_attribute(DISPC_MFLAG_CTRL_ENABLE);
+        /* Allows the mflag signal to start at the beginning of each
+         * frame even if the DMA buffer is empty */
+        dispc_ovl_set_mflag_start(DISPC_MFLAG_START_ENABLE);
+
+        fifosize = dispc_ovl_get_fifo_size(plane);
+        /* As per the simultaion team suggestion, below thesholds are set:
+         * HT = fifosize * 5/8;
+         * LT = fifosize * 4/8;
+         */
+        dispc_write_reg(DISPC_OVL_MFLAG_THRESHOLD(plane),
+               FLD_VAL((fifosize*5)/8, 31, 16) |
+               FLD_VAL((fifosize*4)/8, 15, 0));
+}
+
 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high)
 {
        u8 hi_start, hi_end, lo_start, lo_end;
@@ -2401,8 +2443,9 @@ static int dispc_ovl_setup_common(enum omap_plane plane,
                u8 rotation, bool mirror, u8 zorder, u8 pre_mult_alpha,
                u8 global_alpha, enum omap_dss_rotation_type rotation_type,
                bool replication, const struct omap_video_timings *mgr_timings,
-               bool mem_to_mem)
+               bool mem_to_mem, bool mflag_en)
 {
+       struct omap_overlay *ovl = omap_dss_get_overlay(plane);
        bool five_taps = true;
        bool fieldmode = 0;
        int r, cconv = 0;
@@ -2521,7 +2564,12 @@ static int dispc_ovl_setup_common(enum omap_plane plane,
                dispc_ovl_set_ba1_uv(plane, p_uv_addr + offset1);
        }
 
-       dispc_ovl_set_row_inc(plane, row_inc);
+       if (dss_has_feature(FEAT_MFLAG)) {
+               mflag_en = true;
+               dispc_ovl_set_global_mflag(ovl->id, mflag_en);
+       }
+
+               dispc_ovl_set_row_inc(plane, row_inc);
        dispc_ovl_set_pix_inc(plane, pix_inc);
 
        DSSDBG("%d,%d %dx%d -> %dx%d\n", pos_x, pos_y, in_width,
@@ -2581,7 +2629,8 @@ int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
                oi->screen_width, oi->pos_x, oi->pos_y, oi->width, oi->height,
                oi->out_width, oi->out_height, oi->color_mode, oi->rotation,
                oi->mirror, oi->zorder, oi->pre_mult_alpha, oi->global_alpha,
-               oi->rotation_type, replication, mgr_timings, mem_to_mem);
+               oi->rotation_type, replication, mgr_timings, mem_to_mem,
+                                  oi->mflag_en);
 
        return r;
 }
@@ -2611,7 +2660,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
                wi->buf_width, pos_x, pos_y, in_width, in_height, wi->width,
                wi->height, wi->color_mode, wi->rotation, wi->mirror, zorder,
                wi->pre_mult_alpha, global_alpha, wi->rotation_type,
-               replication, mgr_timings, mem_to_mem);
+               replication, mgr_timings, mem_to_mem, false);
 
        switch (wi->color_mode) {
        case OMAP_DSS_COLOR_RGB16:

diff --git a/drivers/video/omap2/dss/dispc.h b/drivers/video/omap2/dss/dispc.h
index de4863d21ab78b7683d490628ef9bc5a7f1f335b..13aee3a54e2735d606c8ea26a211376cfe813c29 100644 (file)
--- a/drivers/video/omap2/dss/dispc.h
+++ b/drivers/video/omap2/dss/dispc.h
@@ -40,6 +40,7 @@
 #define DISPC_CONTROL3                  0x0848
 #define DISPC_CONFIG3                   0x084C
 #define DISPC_MSTANDBY_CTRL            0x0858
+#define DISPC_GLOBAL_MFLAG             0x085C
 
 /* DISPC overlay registers */
 #define DISPC_OVL_BA0(n)               (DISPC_OVL_BASE(n) + \
@@ -100,6 +101,8 @@
                                        DISPC_FIR_COEF_V2_OFFSET(n, i))
 #define DISPC_OVL_PRELOAD(n)           (DISPC_OVL_BASE(n) + \
                                        DISPC_PRELOAD_OFFSET(n))
+#define DISPC_OVL_MFLAG_THRESHOLD(n)   (DISPC_OVL_BASE(n) + \
+                                       DISPC_MFLAG_OFFSET(n))
 
 /* DISPC up/downsampling FIR filter coefficient structure */
 struct dispc_coef {
@@ -110,6 +113,18 @@ struct dispc_coef {
        s8 hc0_vc00;
 };
 
+/* MFLAG control attribute */
+enum dispc_mflag_ctrl {
+       DISPC_MFLAG_CTRL_DISABLE = 0,
+       DISPC_MFLAG_CTRL_FORCE = 1,
+       DISPC_MFLAG_CTRL_ENABLE = 2,
+};
+
+enum dispc_mflag_start {
+       DISPC_MFLAG_START_DISABLE = 0,
+       DISPC_MFLAG_START_ENABLE = 1,
+};
+
 const struct dispc_coef *dispc_ovl_get_scale_coef(int inc, int five_taps);
 
 /* DISPC manager/channel specific registers */
@@ -894,4 +909,20 @@ static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane)
                return 0;
        }
 }
+
+static inline u16 DISPC_MFLAG_OFFSET(enum omap_plane plane)
+{
+       switch (plane) {
+       case OMAP_DSS_GFX:
+               return 0x7E0;
+       case OMAP_DSS_VIDEO1:
+               return 0x7A8;
+       case OMAP_DSS_VIDEO2:
+               return 0x71C;
+       case OMAP_DSS_VIDEO3:
+               return 0x56C;
+       default:
+               BUG();
+       }
+}
 #endif

diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index c5f1f19549252f6b07c91a55caedf401496b0b43..7898e08af23cb982fb4fd1afe23a30fbbe32052a 100644 (file)
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -418,6 +418,7 @@ int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
                struct dispc_clock_info *cinfo);
 
 
+void dispc_ovl_set_global_mflag(enum omap_plane plane, bool mflag);
 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
 void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
                u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,

diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c
index 8ae30bd19cb9e1be3cabd81d1fbb003668a7d219..0942e6f85ea08c74cdfe754fcdd561ffddcc4336 100644 (file)
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -663,6 +663,7 @@ static const enum dss_feat_id omap5_dss_feat_list[] = {
        FEAT_DSI_PLL_SELFREQDCO,
        FEAT_DSI_PLL_REFSEL,
        FEAT_DSI_PHY_DCC,
+       FEAT_MFLAG,
 };
 
 /* OMAP2 DSS Features */

diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h
index 2dc25fb89d4ea28f19a1774e1d12a19a60f48e02..117ca38518fe01f05a785a07c5e8d651fc9e0d97 100644 (file)
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -68,6 +68,7 @@ enum dss_feat_id {
        FEAT_DSI_PLL_SELFREQDCO,
        FEAT_DSI_PLL_REFSEL,
        FEAT_DSI_PHY_DCC,
+       FEAT_MFLAG,
 };
 
 /* DSS register field id */

diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 6819d0a21ee08ca05e279bc4b973e57566bde9cd..363c71ad062bf676be449cf730188a67a141970d 100644 (file)
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -515,6 +515,7 @@ struct omap_writeback_info {
        u8                                      rotation;
        enum omap_dss_rotation_type             rotation_type;
        bool force_1d;
+       bool mflag_en;
 };
 
 struct omap_writeback {