]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - android/platform-hardware-interfaces.git/commit
Fix logics for floating-point comparision in VTS test.
authorXusong Wang <xusongw@google.com>
Tue, 28 Aug 2018 23:50:01 +0000 (16:50 -0700)
committerXusong Wang <xusongw@google.com>
Thu, 6 Sep 2018 20:20:12 +0000 (13:20 -0700)
commitf6235f8a097c45c5bea8f169bb1b561d598c0043
tree1fb37e04114d6f7230d4381729bbbe8a8a0a52e2
parent5bc9799808c2683b339f403bc0ca91ef5f25f4e4
Fix logics for floating-point comparision in VTS test.

Set the acceptable error range based on both absolute tolerance and
relative tolerance.

Currently, absolute tolerance is set to 1e-5 for FP32 and 5 epsilon
(~5e-3) for FP16 relaxed computation. The relative tolerance is set to
5ULP of the corresponding precision. Add a TODO mark for potential
future adjustment on error limit based on testing.

Bug: 111768023

Test: none
Change-Id: Idedcec3e09fd7de9696811b93c81d0f180e896ef
neuralnetworks/1.0/vts/functional/GeneratedTestHarness.cpp