1 /*************************************************************************/ /*!
2 @Title Common Device header
3 @Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
4 @Description Device related function templates and defines
5 @License Dual MIT/GPLv2
7 The contents of this file are subject to the MIT license as set out below.
9 Permission is hereby granted, free of charge, to any person obtaining a copy
10 of this software and associated documentation files (the "Software"), to deal
11 in the Software without restriction, including without limitation the rights
12 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 copies of the Software, and to permit persons to whom the Software is
14 furnished to do so, subject to the following conditions:
16 The above copyright notice and this permission notice shall be included in
17 all copies or substantial portions of the Software.
19 Alternatively, the contents of this file may be used under the terms of
20 the GNU General Public License Version 2 ("GPL") in which case the provisions
21 of GPL are applicable instead of those above.
23 If you wish to allow use of your version of this file only under the terms of
24 GPL, and not to allow others to use your version of this file under the terms
25 of the MIT license, indicate your decision by deleting the provisions above
26 and replace them with the notice and other provisions required by GPL as set
27 out in the file called "GPL-COPYING" included in this distribution. If you do
28 not delete the provisions above, a recipient may use your version of this file
29 under the terms of either the MIT license or GPL.
31 This License is also included in this distribution in the file called
32 "MIT-COPYING".
34 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
35 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
36 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
37 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
38 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
39 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
40 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
41 */ /**************************************************************************/
43 #ifndef __DEVICE_H__
44 #define __DEVICE_H__
46 #if defined(__cplusplus)
47 extern "C" {
48 #endif
50 #include "ra.h" /* RA_ARENA */
51 #include "resman.h" /* PRESMAN_ITEM */
53 /* BM context forward reference */
54 typedef struct _BM_CONTEXT_ BM_CONTEXT;
56 /* pre-defined MMU structure forward references */
57 typedef struct _MMU_HEAP_ MMU_HEAP;
58 typedef struct _MMU_CONTEXT_ MMU_CONTEXT;
60 /* physical resource types: */
61 /* contiguous system memory */
62 #define PVRSRV_BACKINGSTORE_SYSMEM_CONTIG (1<<(PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT+0))
63 /* non-contiguous system memory */
64 #define PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG (1<<(PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT+1))
65 /* contiguous local device memory */
66 #define PVRSRV_BACKINGSTORE_LOCALMEM_CONTIG (1<<(PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT+2))
67 /* non-contiguous local device memory */
68 #define PVRSRV_BACKINGSTORE_LOCALMEM_NONCONTIG (1<<(PVRSRV_MEM_BACKINGSTORE_FIELD_SHIFT+3))
70 /* heap types: */
71 typedef IMG_UINT32 DEVICE_MEMORY_HEAP_TYPE;
72 #define DEVICE_MEMORY_HEAP_PERCONTEXT 0
73 #define DEVICE_MEMORY_HEAP_KERNEL 1
74 #define DEVICE_MEMORY_HEAP_SHARED 2
75 #define DEVICE_MEMORY_HEAP_SHARED_EXPORTED 3
77 #define PVRSRV_DEVICE_NODE_FLAGS_PORT80DISPLAY 1
78 #define PVRSRV_DEVICE_NODE_FLAGS_MMU_OPT_INV 2 /* FIXME : Optimal Invalidation is not default */
80 typedef struct _DEVICE_MEMORY_HEAP_INFO_
81 {
82 /* heap identifier */
83 IMG_UINT32 ui32HeapID;
85 /* heap identifier string */
86 IMG_CHAR *pszName;
88 /* backing store identifier string */
89 IMG_CHAR *pszBSName;
91 /* Device virtual address of base of heap */
92 IMG_DEV_VIRTADDR sDevVAddrBase;
94 /* heapsize in bytes */
95 IMG_UINT32 ui32HeapSize;
97 /* Flags, includes physical resource (backing store type). Must be available to SOC */
98 IMG_UINT32 ui32Attribs;
100 /* Heap type: per device, kernel only, shared, shared_exported */
101 DEVICE_MEMORY_HEAP_TYPE DevMemHeapType;
103 /* kernel heap handle */
104 IMG_HANDLE hDevMemHeap;
106 /* ptr to local memory allocator for this heap */
107 RA_ARENA *psLocalDevMemArena;
109 /* MMU data page size (4kb, 16kb, 256kb, 1Mb, 4Mb) */
110 IMG_UINT32 ui32DataPageSize;
112 IMG_UINT32 ui32XTileStride;
114 } DEVICE_MEMORY_HEAP_INFO;
116 typedef struct _DEVICE_MEMORY_INFO_
117 {
118 /* size of address space, as log2 */
119 IMG_UINT32 ui32AddressSpaceSizeLog2;
121 /*
122 flags, includes physical memory resource types available to the system.
123 Allows for validation at heap creation, define PVRSRV_BACKINGSTORE_XXX
124 */
125 IMG_UINT32 ui32Flags;
127 /* heap count. Doesn't include additional heaps from PVRSRVCreateDeviceMemHeap */
128 IMG_UINT32 ui32HeapCount;
130 /* the sync heap id - common code needs to know */
131 IMG_UINT32 ui32SyncHeapID;
133 /* heap for buffer mappings */
134 IMG_UINT32 ui32MappingHeapID;
136 /* heap for ion buffers */
137 IMG_UINT32 ui32IonHeapID;
139 /* device memory heap info about each heap in a device address space */
140 DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
142 /* BM kernel context for the device */
143 BM_CONTEXT *pBMKernelContext;
145 /* BM context list for the device*/
146 BM_CONTEXT *pBMContext;
148 } DEVICE_MEMORY_INFO;
151 /*!
152 ****************************************************************************
153 Device memory descriptor for a given system
154 ****************************************************************************/
155 typedef struct DEV_ARENA_DESCRIPTOR_TAG
156 {
157 IMG_UINT32 ui32HeapID; /*!< memory pool has a unique id for diagnostic purposes */
159 IMG_CHAR *pszName; /*!< memory pool has a unique string for diagnostic purposes */
161 IMG_DEV_VIRTADDR BaseDevVAddr; /*!< Device virtual base address of the managed memory pool. */
163 IMG_UINT32 ui32Size; /*!< Size in bytes of the managed memory pool. */
165 DEVICE_MEMORY_HEAP_TYPE DevMemHeapType;/*!< heap type */
167 /* MMU data page size (4kb, 16kb, 256kb, 1Mb, 4Mb) */
168 IMG_UINT32 ui32DataPageSize;
170 DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeapInfo;
172 } DEV_ARENA_DESCRIPTOR;
175 /*
176 PDUMP MMU atttributes
177 */
178 typedef struct _PDUMP_MMU_ATTRIB_
179 {
180 PVRSRV_DEVICE_IDENTIFIER sDevId;
182 IMG_CHAR *pszPDRegRegion;
184 /* data page info */
185 IMG_UINT32 ui32DataPageMask;
187 /* page table info */
188 IMG_UINT32 ui32PTEValid;
189 IMG_UINT32 ui32PTSize;
190 IMG_UINT32 ui32PTEAlignShift;
192 /* page directory info */
193 IMG_UINT32 ui32PDEMask;
194 IMG_UINT32 ui32PDEAlignShift;
196 } PDUMP_MMU_ATTRIB;
198 /* forward reference to _SYS_DATA_ */
199 typedef struct _SYS_DATA_TAG_ *PSYS_DATA;
201 typedef struct _PVRSRV_DEVICE_NODE_
202 {
203 PVRSRV_DEVICE_IDENTIFIER sDevId;
204 IMG_UINT32 ui32RefCount;
206 /*
207 callbacks the device must support:
208 */
209 /* device initialiser */
210 PVRSRV_ERROR (*pfnInitDevice) (IMG_VOID*);
211 /* device deinitialiser */
212 PVRSRV_ERROR (*pfnDeInitDevice) (IMG_VOID*);
214 /* device post-finalise compatibility check */
215 PVRSRV_ERROR (*pfnInitDeviceCompatCheck) (struct _PVRSRV_DEVICE_NODE_*);
217 /* device MMU interface */
218 PVRSRV_ERROR (*pfnMMUInitialise)(struct _PVRSRV_DEVICE_NODE_*, MMU_CONTEXT**, IMG_DEV_PHYADDR*);
219 IMG_VOID (*pfnMMUFinalise)(MMU_CONTEXT*);
220 IMG_VOID (*pfnMMUInsertHeap)(MMU_CONTEXT*, MMU_HEAP*);
221 MMU_HEAP* (*pfnMMUCreate)(MMU_CONTEXT*,DEV_ARENA_DESCRIPTOR*,RA_ARENA**,PDUMP_MMU_ATTRIB **ppsMMUAttrib);
222 IMG_VOID (*pfnMMUDelete)(MMU_HEAP*);
223 IMG_BOOL (*pfnMMUAlloc)(MMU_HEAP*pMMU,
224 IMG_SIZE_T uSize,
225 IMG_SIZE_T *pActualSize,
226 IMG_UINT32 uFlags,
227 IMG_UINT32 uDevVAddrAlignment,
228 IMG_DEV_VIRTADDR *pDevVAddr);
229 IMG_VOID (*pfnMMUFree)(MMU_HEAP*,IMG_DEV_VIRTADDR,IMG_UINT32);
230 IMG_VOID (*pfnMMUEnable)(MMU_HEAP*);
231 IMG_VOID (*pfnMMUDisable)(MMU_HEAP*);
232 IMG_VOID (*pfnMMUMapPages)(MMU_HEAP *pMMU,
233 IMG_DEV_VIRTADDR devVAddr,
234 IMG_SYS_PHYADDR SysPAddr,
235 IMG_SIZE_T uSize,
236 IMG_UINT32 ui32MemFlags,
237 IMG_HANDLE hUniqueTag);
238 IMG_VOID (*pfnMMUMapPagesSparse)(MMU_HEAP *pMMU,
239 IMG_DEV_VIRTADDR devVAddr,
240 IMG_SYS_PHYADDR SysPAddr,
241 IMG_UINT32 ui32ChunkSize,
242 IMG_UINT32 ui32NumVirtChunks,
243 IMG_UINT32 ui32NumPhysChunks,
244 IMG_BOOL *pabMapChunk,
245 IMG_UINT32 ui32MemFlags,
246 IMG_HANDLE hUniqueTag);
248 IMG_VOID (*pfnMMUMapShadow)(MMU_HEAP *pMMU,
249 IMG_DEV_VIRTADDR MapBaseDevVAddr,
250 IMG_SIZE_T uSize,
251 IMG_CPU_VIRTADDR CpuVAddr,
252 IMG_HANDLE hOSMemHandle,
253 IMG_DEV_VIRTADDR *pDevVAddr,
254 IMG_UINT32 ui32MemFlags,
255 IMG_HANDLE hUniqueTag);
256 IMG_VOID (*pfnMMUMapShadowSparse)(MMU_HEAP *pMMU,
257 IMG_DEV_VIRTADDR MapBaseDevVAddr,
258 IMG_UINT32 ui32ChunkSize,
259 IMG_UINT32 ui32NumVirtChunks,
260 IMG_UINT32 ui32NumPhysChunks,
261 IMG_BOOL *pabMapChunk,
262 IMG_CPU_VIRTADDR CpuVAddr,
263 IMG_HANDLE hOSMemHandle,
264 IMG_DEV_VIRTADDR *pDevVAddr,
265 IMG_UINT32 ui32MemFlags,
266 IMG_HANDLE hUniqueTag);
268 IMG_VOID (*pfnMMUUnmapPages)(MMU_HEAP *pMMU,
269 IMG_DEV_VIRTADDR dev_vaddr,
270 IMG_UINT32 ui32PageCount,
271 IMG_HANDLE hUniqueTag);
273 IMG_VOID (*pfnMMUMapScatter)(MMU_HEAP *pMMU,
274 IMG_DEV_VIRTADDR DevVAddr,
275 IMG_SYS_PHYADDR *psSysAddr,
276 IMG_SIZE_T uSize,
277 IMG_UINT32 ui32MemFlags,
278 IMG_HANDLE hUniqueTag);
279 #if defined(SUPPORT_PDUMP_MULTI_PROCESS)
280 IMG_BOOL (*pfnMMUIsHeapShared)(MMU_HEAP *);
281 #endif
282 IMG_DEV_PHYADDR (*pfnMMUGetPhysPageAddr)(MMU_HEAP *pMMUHeap, IMG_DEV_VIRTADDR sDevVPageAddr);
283 IMG_DEV_PHYADDR (*pfnMMUGetPDDevPAddr)(MMU_CONTEXT *pMMUContext);
284 IMG_VOID (*pfnMMUGetCacheFlushRange)(MMU_CONTEXT *pMMUContext, IMG_UINT32 *pui32RangeMask);
285 IMG_VOID (*pfnMMUGetPDPhysAddr)(MMU_CONTEXT *pMMUContext, IMG_DEV_PHYADDR *psDevPAddr);
287 /* tiling range control functions */
288 PVRSRV_ERROR (*pfnAllocMemTilingRange)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
289 PVRSRV_KERNEL_MEM_INFO *psMemInfo,
290 IMG_UINT32 ui32TilingStride,
291 IMG_UINT32 *pui32RangeIndex);
292 PVRSRV_ERROR (*pfnFreeMemTilingRange)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
293 IMG_UINT32 ui32RangeIndex);
295 /* LISR handler for device */
296 IMG_BOOL (*pfnDeviceISR)(IMG_VOID*);
297 /* ISR data */
298 IMG_VOID *pvISRData;
299 /* System/SOC specific interrupt bit relating to this device */
300 IMG_UINT32 ui32SOCInterruptBit;
301 /* MISR handler for device */
302 IMG_VOID (*pfnDeviceMISR)(IMG_VOID*);
304 /* Software command complete callback for device */
305 IMG_VOID (*pfnDeviceCommandComplete)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode);
306 /* Flag indicating that command complete callback needs to be reprocessed */
307 IMG_BOOL bReProcessDeviceCommandComplete;
309 IMG_VOID (*pfnCacheInvalidate)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode);
311 /* information about the device's address space and heaps */
312 DEVICE_MEMORY_INFO sDevMemoryInfo;
314 /* private device information */
315 IMG_VOID *pvDevice;
316 IMG_UINT32 ui32pvDeviceSize; /* required by GetClassDeviceInfo API */
318 /* Resource Manager Context */
319 PRESMAN_CONTEXT hResManContext;
321 /* pointer back to parent sysdata */
322 PSYS_DATA psSysData;
324 /* default MMU PT/PD backing store to use for the device */
325 RA_ARENA *psLocalDevMemArena;
327 IMG_UINT32 ui32Flags;
329 struct _PVRSRV_DEVICE_NODE_ *psNext;
330 struct _PVRSRV_DEVICE_NODE_ **ppsThis;
332 #if defined(PDUMP)
333 /* device-level callback which is called when pdump.exe starts.
334 * Should be implemented in device-specific init code, e.g. sgxinit.c
335 */
336 PVRSRV_ERROR (*pfnPDumpInitDevice)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode);
337 /* device-level callback to return pdump ID associated to a memory context */
338 IMG_UINT32 (*pfnMMUGetContextID)(IMG_HANDLE hDevMemContext);
339 #endif
340 } PVRSRV_DEVICE_NODE;
342 PVRSRV_ERROR IMG_CALLCONV PVRSRVRegisterDevice(PSYS_DATA psSysData,
343 PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
344 IMG_UINT32 ui32SOCInterruptBit,
345 IMG_UINT32 *pui32DeviceIndex );
347 PVRSRV_ERROR IMG_CALLCONV PVRSRVInitialiseDevice(IMG_UINT32 ui32DevIndex);
348 PVRSRV_ERROR IMG_CALLCONV PVRSRVFinaliseSystem(IMG_BOOL bInitSuccesful);
350 PVRSRV_ERROR IMG_CALLCONV PVRSRVDevInitCompatCheck(PVRSRV_DEVICE_NODE *psDeviceNode);
352 PVRSRV_ERROR IMG_CALLCONV PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex);
354 #if !defined(USE_CODE)
356 /*!
357 ******************************************************************************
359 @Function PollForValueKM
361 @Description
362 Polls for a value to match a masked read of sysmem
364 @Input pui32LinMemAddr : CPU linear address of the mem to poll
365 @Input ui32Value : req'd value
366 @Input ui32Mask : Mask
367 @Input ui32Timeoutus : maximum total time to wait (us)
368 @Input ui32PollPeriodus : minimum delay between consecutive polls (us)
369 @Input bAllowPreemption : allow the polling loop to be preempted
371 @Return PVRSRV_ERROR :
373 ******************************************************************************/
374 IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV PollForValueKM(volatile IMG_UINT32* pui32LinMemAddr,
375 IMG_UINT32 ui32Value,
376 IMG_UINT32 ui32Mask,
377 IMG_UINT32 ui32Timeoutus,
378 IMG_UINT32 ui32PollPeriodus,
379 IMG_BOOL bAllowPreemption);
381 #endif /* !defined(USE_CODE) */
384 #if defined (USING_ISR_INTERRUPTS)
385 PVRSRV_ERROR IMG_CALLCONV PollForInterruptKM(IMG_UINT32 ui32Value,
386 IMG_UINT32 ui32Mask,
387 IMG_UINT32 ui32Waitus,
388 IMG_UINT32 ui32Tries);
390 #endif /* #if defined (USING_ISR_INTERRUPTS) */
392 /* The following functions don't really belong here (srvkm.h might be a better
393 * place), but as they use the device data structures, this is the most convenient
394 * place for them. */
395 PVRSRV_ERROR IMG_CALLCONV PVRSRVInit(PSYS_DATA psSysData);
396 IMG_VOID IMG_CALLCONV PVRSRVDeInit(PSYS_DATA psSysData);
397 IMG_BOOL IMG_CALLCONV PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode);
398 IMG_BOOL IMG_CALLCONV PVRSRVSystemLISR(IMG_VOID *pvSysData);
399 IMG_VOID IMG_CALLCONV PVRSRVMISR(IMG_VOID *pvSysData);
401 #if defined(__cplusplus)
402 }
403 #endif
405 #endif /* __DEVICE_H__ */
407 /******************************************************************************
408 End of file (device.h)
409 ******************************************************************************/