initial release
[apps/tidep0074.git] / ipu1 / PktProcEng.c
1 /*
2  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
3  * 
4  * 
5  *  Redistribution and use in source and binary forms, with or without 
6  *  modification, are permitted provided that the following conditions 
7  *  are met:
8  *
9  *    Redistributions of source code must retain the above copyright 
10  *    notice, this list of conditions and the following disclaimer.
11  *
12  *    Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the 
14  *    documentation and/or other materials provided with the   
15  *    distribution.
16  *
17  *    Neither the name of Texas Instruments Incorporated nor the names of
18  *    its contributors may be used to endorse or promote products derived
19  *    from this software without specific prior written permission.
20  *
21  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
22  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
23  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
25  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
26  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
27  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
30  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
31  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  */
36 #include <stdlib.h>
37 #include <stdio.h>
38 #include <string.h>
40 #include <xdc/std.h>
41 #include <xdc/runtime/Error.h>
42 #include <xdc/runtime/System.h>
43 #include <xdc/runtime/knl/Cache.h>
45 #include <xdc/runtime/Diags.h>
46 #include <xdc/runtime/Log.h>
48 #include <ti/sysbios/BIOS.h>
49 #include <ti/sysbios/knl/Task.h>
50 #include <ti/sysbios/hal/Core.h>
52 #include <ti/csl/src/ip/icss/V0/cslr_icss_intc.h>
54 #include <ti/drv/pruss/soc/pruicss_v1.h>
56 #include <icss_emacDrv.h>
58 #ifdef SOC_AM572x
59 #include <ti/drv/icss_emac/firmware/am57x/v1_0/icss_emac_pru0_bin.h>
60 #include <ti/drv/icss_emac/firmware/am57x/v1_0/icss_emac_pru1_bin.h>
61 #include <ti/drv/pruss/soc/am572x/pruicss_device.c>
62 #include <ti/drv/icss_emac/soc/am572x/icss_emacSoc.c>
63 #include <ti/csl/soc/am572x/src/csl_device_xbar.h>
64 #define PRU0_FIRMWARE_V1_0_NAME      PRU0_FIRMWARE_V1_0 
65 #define PRU1_FIRMWARE_V1_1_NAME      PRU1_FIRMWARE_V1_0 
67 #include <ti/drv/icss_emac/firmware/am57x/v2_1/icss_emac_pru0_bin.h>
68 #include <ti/drv/icss_emac/firmware/am57x/v2_1/icss_emac_pru1_bin.h>
69 #define PRU0_FIRMWARE_NAME      PRU0_FIRMWARE
70 #define PRU1_FIRMWARE_NAME      PRU1_FIRMWARE
71 #endif
73 #ifdef SOC_AM571x
74 #include <ti/drv/icss_emac/firmware/am57x/v2_1/icss_emac_pru0_bin.h>
75 #include <ti/drv/icss_emac/firmware/am57x/v2_1/icss_emac_pru1_bin.h>
76 #include <ti/drv/pruss/soc/am571x/pruicss_device.c>
77 #include <ti/drv/icss_emac/soc/am571x/icss_emacSoc.c>
78 #include <ti/csl/soc/am571x/src/csl_device_xbar.h>
79 #define PRU0_FIRMWARE_NAME      PRU0_FIRMWARE
80 #define PRU1_FIRMWARE_NAME      PRU1_FIRMWARE
81 #endif
82 #include <ti/drv/icss_emac/test/src/tiemac_pruss_intc_mapping.h>
84 #include <ti/drv/icss_emac/test/src/icss_switch_emac.h>
85 #include <ti/drv/icss_emac/test/src/test_mdio.c>
86 #include <ti/drv/icss_emac/test/src/icss_switch_emac.c>
87 #include <ti/drv/icss_emac/test/src/icss_emac_osal.c>
89 #include "Server.h"
91 PRUICSS_Handle pruIcssHandle;
92 ICSS_EmacHandle emachandle;
93 ICSS_EmacHandle emachandle1;
95 void SOCCtrlGetPortMacAddr(uint32_t portNum, uint8_t *pMacAddr);
96 void ICSSEmacDRVInit(ICSS_EmacHandle handle, uint8_t instance);
97 extern ICSS_EmacBaseAddrCfgParams icss_EmacBaseAddrCfgParams[3];
98 void InterruptInit(ICSS_EmacHandle icssEmacHandle);
99 void InterruptEnd(ICSS_EmacHandle icssEmacHandle);
100 static void EnableEMACInterrupts(ICSS_EmacHandle icssemacHandle);
101 void DisableEMACInterrupts(ICSS_EmacHandle icssemacHandle);
102 inline void clearLink0ISR(ICSS_EmacHandle icssemacHandle);
103 inline void clearLink1ISR(ICSS_EmacHandle icssemacHandle);
105 #define MAX_TEST_PKT_NUM        12
106 #define TEST_PKT_SIZE           256
108 #define GOOSE_ENABLE            0xBEEFBEEF
109 #define GOOSE_DISABLE           0xDEADDEAD
111 uint32_t packetLength = 0;
112 uint32_t testNum = 0;
114 void *icssRxSem;
115 void *icssRxSem1;
116 extern uint32_t *pRxPkt;
117 extern uint32_t *pTxPkt;
119 extern uint32_t *pGoosePara;
120 extern uint32_t bGooseFilter;
122 uint8_t lclMac[6];
123 uint8_t lclMac1[6];
125 uint32_t GooseBuf[MAX_PKT_FRAME_SIZE];
126 uint32_t PtpBuf[MAX_PKT_FRAME_SIZE];
127 uint32_t GarbageBuf[MAX_PKT_FRAME_SIZE];
129 char GooseDestMacAddr[DEST_MAC_NUM][ETH_ALEN] = {
130         {0x11, 0x22, 0x33, 0x44, 0x55, 0x66},
131         {0x22, 0x33, 0x44, 0x55, 0x66, 0x77},
132         {0x33, 0x44, 0x55, 0x66, 0x77, 0x88},
133         {0x44, 0x55, 0x66, 0x77, 0x88, 0x99},
134 };
135 uint16_t GooseAPPID[ACCEPT_APPID_NUM] = {0x1111, 0x2222, 0x3333, 0x4444};
137 char ptpMulDest1MacAddr[ETH_ALEN] = {0x01, 0x1b, 0x19, 0x00, 0x00, 0x00};
138 char ptpMulDest2MacAddr[ETH_ALEN] = {0x01, 0x80, 0x02, 0x00, 0x00, 0x0F};
140 static const uint8_t test_pkt[MAX_TEST_PKT_NUM][TEST_PKT_SIZE] = {
141         {
142                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* broadcast mac */
143                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
144                 0x08, 0x06, 0x00, 0x01, /* ARP, accept, route to A15 */
145                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
146                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
147                 0xc0, 0xa8, 0x01, 0x16,
148                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
149                 0xc0, 0xa8,0x01, 0x02
150         },
151         {
152                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* broadcast mac, Goose*/
153                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
154                 0x88, 0xb8, 0x00, 0x01, /* Goose 0x88b8, to A15,not match mac */
155                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
156                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
157                 0xc0, 0xa8, 0x01, 0x16,
158                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
159                 0xc0, 0xa8,0x01, 0x02
160         },
162         {
163                 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, /* Goose mac*/
164                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
165                 0x88, 0xb8, 0x00, 0x01, /* Goose 0x88b8, drop,not match APPID */
166                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
167                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
168                 0xc0, 0xa8, 0x01, 0x16,
169                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
170                 0xc0, 0xa8,0x01, 0x02
171         },
173         {
174                 0x01, 0x1b, 0x19, 0x00, 0x00, 0x00, /* multi-cast 01-1b mac */
175                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
176                 0x88, 0xf7, 0x00, 0x01, /* 1588, accept */
177                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
178                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
179                 0xc0, 0xa8, 0x01, 0x16,
180                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
181                 0xc0, 0xa8,0x01, 0x02
182         },
184         {
185                 0x01, 0x80, 0x02, 0x00, 0x00, 0x0f, /* multi-cast 01-80 mac */
186                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
187                 0x88, 0xf7, 0x00, 0x01, /* 1588, accept */
188                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
189                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
190                 0xc0, 0xa8, 0x01, 0x16,
191                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
192                 0xc0, 0xa8,0x01, 0x02
193         },
194         {
195                 0x11, 0x80, 0x02, 0x00, 0x00, 0x0f, /* multi-cast 11-80 mac */
196                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
197                 0x88, 0xf7, 0x00, 0x01, /* 1588, drop */
198                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
199                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
200                 0xc0, 0xa8, 0x01, 0x16,
201                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
202                 0xc0, 0xa8,0x01, 0x02
203         },
204         {
205                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* broadcast mac, SV*/
206                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
207                 0x88, 0xba, 0x00, 0x01, /* IEC61850, SV, drop*/
208                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
209                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
210                 0xc0, 0xa8, 0x01, 0x16,
211                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
212                 0xc0, 0xa8,0x01, 0x02
213         },
214         {
215                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* broadcast mac */
216                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
217                 0x08, 0x06, 0x00, 0x01, /* ARP, accept, route to A15 */
218                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
219                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
220                 0xc0, 0xa8, 0x01, 0x16,
221                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
222                 0xc0, 0xa8,0x01, 0x02,
223                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
224                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
225                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
226                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
227                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
228                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
229                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
230                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
231                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
232                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
233                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
234                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
235                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
236         },
237         {
238                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* broadcast mac, to A15 */
239                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
240                 0x81, 0x00, /* type - VLAN */
241                 0x00, 0x00, /* VLAN tag - TCI */
242                 0x88, 0xb8, /* VLAN tag - Goose */
243                 0x11, 0x11,     /* APPID, type 1 */
244                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
245                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
246                 0xc0, 0xa8, 0x01, 0x16,
247                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
248                 0xc0, 0xa8,0x01, 0x02
249         },
251         {
252                 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, /* goose mac, accept */
253                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
254                 0x81, 0x00, /* type - VLAN */
255                 0x00, 0x00, /* VLAN tag - TCI */
256                 0x88, 0xb8, /* VLAN tag - Goose */
257                 0x11, 0x11,     /* APPID, type 1 */
258                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
259                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
260                 0xc0, 0xa8, 0x01, 0x16,
261                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
262                 0xc0, 0xa8,0x01, 0x02
263         },
265         {
266                 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, /* goose dest mac, accept */
267                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
268                 0x81, 0x00, /* type - VLAN */
269                 0x00, 0x00, /* VLAN tag - TCI */
270                 0x88, 0xb8, /* VLAN tag - Goose */
271                 0x44, 0x44,     /* APPID, type 1A */
272                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
273                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
274                 0xc0, 0xa8, 0x01, 0x16,
275                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
276                 0xc0, 0xa8,0x01, 0x02
277         },
279         {
280                 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* broadcast mac, to A15 */
281                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
282                 0x81, 0x00, /* type - VLAN */
283                 0x00, 0x00, /* VLAN tag - TCI */
284                 0x88, 0xb8, /* VLAN tag - Goose */
285                 0x11, 0x22,     /* APPID, reject */
286                 0x08, 0x00, 0x06, 0x04, 0x00,0x01,
287                 0x01, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
288                 0xc0, 0xa8, 0x01, 0x16,
289                 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
290                 0xc0, 0xa8,0x01, 0x02
291         },
292 };
294 /**
295  * @brief configures GOOSE filter parameters is enabled
296  *
297  * @param none
298  *
299  * @retval none
300  */
301 void Goose_para_config()
303         uint32_t *pTempAddr;
304         uint32_t len;
305         int i;
307         if(*pGoosePara == GOOSE_ENABLE) {
308                 Log_print0(Diags_INFO, "Enable/configure Goose filtering...");
309                 bGooseFilter = 1;
310                 pTempAddr = pGoosePara + 1;
311                 len = DEST_MAC_NUM * ETH_ALEN;
312                 memcpy(GooseDestMacAddr, pTempAddr, len);
314                 for(i=0; i<6; i++)
315                         Log_print1(Diags_INFO, "Dest Mac Addr[0] = 0x%x\n", 
316                                         GooseDestMacAddr[0][i]);
318                 pTempAddr = pGoosePara + 1 + len/4;
319                 len = ACCEPT_APPID_NUM * 2;
320                 memcpy(GooseAPPID, pTempAddr, len);
322                 for(i=0; i<4; i++)
323                         Log_print1(Diags_INFO, "GooseAPPID = 0x%x", 
324                                         GooseAPPID[i]);
325         }
326         else if(*pGoosePara == GOOSE_DISABLE) {
327                 Log_print0(Diags_INFO, "Disable Goose filtering");
328                 bGooseFilter = 0;
329         }
330         else
331                 Log_print0(Diags_INFO, "Use default Goose filtering config");
333         /* clear Goose Flag */
334         *pGoosePara = 0;
337 /**
338  * @brief transmit packets from IPU
339  *
340  * @param none
341  *
342  * @retval none
343  */
344 void icss_tx()
346         ICSS_EmacTxArgument txArgs;
348         /* Send out test packet for loopback */
349         txArgs.icssEmacHandle = emachandle;
350         txArgs.lengthOfPacket = TEST_PKT_SIZE;
351         txArgs.portNumber = 1;
352         txArgs.queuePriority = 3;
353         txArgs.srcAddress = &test_pkt[testNum][0];
355         ICSS_EmacTxPacket(&txArgs, NULL);
356         testNum++;
357         if ( testNum >= MAX_TEST_PKT_NUM)
358                 testNum = 0;
361 /**
362  * @brief transmit packets received from host MPU
363  *
364  * @param pTxPacket: trasmit packet buffer pointer
365  *        TxPacketLen: trasmit packet size
366  *
367  * @retval none
368  */
369 void icss_tx_mpu(UInt32 *pTxPacket, Int TxPacketLen)
371         ICSS_EmacTxArgument txArgs;
373         Log_print0(Diags_INFO, "Sending packet from A15...");
375         txArgs.icssEmacHandle = emachandle;
376         txArgs.lengthOfPacket = TxPacketLen;
377         txArgs.portNumber = 1;
378         txArgs.queuePriority = 3;
379         txArgs.srcAddress = (const uint8_t *)pTxPacket;
381         ICSS_EmacTxPacket(&txArgs, NULL);
384 /**
385  * @brief post semaphore when a packet is received
386  *
387  * @param none
388  *
389  * @retval none
390  */
391 void icss_rx()
393         SemaphoreP_pend(icssRxSem, SemaphoreP_WAIT_FOREVER);
394         Log_print0(Diags_INFO, "Packet Received!");
398 /**
399  * @brief packet reception callback function
400  *
401  * @param queueNum: receive queue number
402  *        ICSS_EmacSubSysHandle: ICSS_EMAC handler
403  *
404  * @retval none
405  */
406 void testCallbackRxPacket(uint32_t *queueNum, uint32_t ICSS_EmacSubSysHandle)
408         int32_t         port;
409         uint32_t        queue;
410         int32_t         pkt_proc;
411         int32_t         pktLen;
412         uint32_t        *pProcRxPkt;
413         ICSS_EmacRxArgument rxArgs;
415         queue = (*queueNum);
416         packetLength = 0;
418         pktLen = ICSS_EmacRxPktInfo((ICSS_EmacHandle)ICSS_EmacSubSysHandle, 
419                                         &port, (int32_t *)&queue, &pkt_proc);
421         if(pktLen > 0) {
422                 if(pkt_proc == PKT_PROC_MPU) {
423                         Log_print0(Diags_INFO, "place packet in A15 queue");
424                         pProcRxPkt = pRxPkt;
425                         packetLength = pktLen;
426                 }
427                 else if(pkt_proc == PKT_PROC_GOOSE) {
428                         Log_print0(Diags_INFO, "place packet in Goose buffer");
429                         pProcRxPkt = &GooseBuf[0];
430                 }
431                 else if(pkt_proc == PKT_PROC_PTP) {
432                         Log_print0(Diags_INFO, "place packet in PTP buffer");
433                         pProcRxPkt = &PtpBuf[0];
434                 }
435                 else if(pkt_proc == PKT_PROC_SV) {
436                         Log_print0(Diags_INFO, "place packet in SV buffer");
437                         pProcRxPkt = &GarbageBuf[0];
438                 }
439                 else {
440                         Log_print0(Diags_INFO, "place packet in garbage buffer");
441                         pProcRxPkt = &GarbageBuf[0];
442                 }
444                 rxArgs.icssEmacHandle = (ICSS_EmacHandle)ICSS_EmacSubSysHandle;
445                 rxArgs.destAddress =  (uint32_t)pProcRxPkt;
446                 rxArgs.queueNumber = *((uint32_t *)(queueNum));
447                 rxArgs.more = 0;
448                 rxArgs.port = 0;
449                 ICSS_EmacRxPktGet(&rxArgs, NULL);
450         }
452         if((ICSS_EmacHandle)ICSS_EmacSubSysHandle == emachandle) {
453                 SemaphoreP_post(icssRxSem);
454         }
455         else if((ICSS_EmacHandle)ICSS_EmacSubSysHandle == emachandle1)
456         {
457                 SemaphoreP_post(icssRxSem1);
458         }
461 /*
462  *    ---task to initialize PRU---
463  */
464 Void taskPruss(UArg a0, UArg a1)
466         Uint8 firmwareLoad_done = FALSE;
468         Log_print0(Diags_INFO, "start task PRU-ICSS\n");
470         uint32_t pgVersion = (VHW_RD_REG32(
471                                 CSL_MPU_CTRL_MODULE_WKUP_CORE_REGISTERS_REGS + 
472                                 CTRL_WKUP_ID_CODE) & 0xf0000000) >> 28;
473         PRUICSS_pruDisable(pruIcssHandle, ICSS_EMAC_PORT_1-1);
474         PRUICSS_pruDisable(pruIcssHandle, ICSS_EMAC_PORT_2-1);
476 #ifdef SOC_AM572x
477         if (pgVersion >= 2)
478         {
479                 Log_print0(Diags_INFO, "taskPruss: Load FW to PG2.0 AM572x\n");
480                 if(PRUICSS_pruWriteMemory(pruIcssHandle,PRU_ICSS_IRAM(0), 0,
481                                         (uint32_t *) PRU0_FIRMWARE_NAME,
482                                         sizeof(PRU0_FIRMWARE_NAME)))
483                 {
484                         if(PRUICSS_pruWriteMemory(pruIcssHandle,
485                                                 PRU_ICSS_IRAM(1), 0,
486                                                 (uint32_t *) PRU1_FIRMWARE_NAME,
487                                                 sizeof(PRU1_FIRMWARE_NAME)))
488                                 firmwareLoad_done = TRUE;
489                 }
490         }
491         else
492         {
493                 if(PRUICSS_pruWriteMemory(pruIcssHandle,PRU_ICSS_IRAM(0), 0,
494                                         (uint32_t *) PRU0_FIRMWARE_V1_0_NAME,
495                                         sizeof(PRU0_FIRMWARE_V1_0_NAME)))
496                 {
497                         if(PRUICSS_pruWriteMemory(pruIcssHandle,
498                                         PRU_ICSS_IRAM(1), 0,
499                                         (uint32_t *) PRU1_FIRMWARE_V1_1_NAME,
500                                         sizeof(PRU1_FIRMWARE_V1_1_NAME)))
501                                 firmwareLoad_done = TRUE;
502                 }
503         }
504 #else
505         if(PRUICSS_pruWriteMemory(pruIcssHandle,PRU_ICSS_IRAM(0) ,0,
506                                 (uint32_t *) PRU0_FIRMWARE_NAME,
507                                 sizeof(PRU0_FIRMWARE_NAME)))
508         {
509                 if(PRUICSS_pruWriteMemory(pruIcssHandle,PRU_ICSS_IRAM(1) ,0,
510                                         (uint32_t *) PRU1_FIRMWARE_NAME,
511                                         sizeof(PRU1_FIRMWARE_NAME)))
512                         firmwareLoad_done = TRUE;
513         }
514 #endif
516         if( firmwareLoad_done)
517         {
518                 PRUICSS_pruEnable(pruIcssHandle, ICSS_EMAC_PORT_1-1);
519                 PRUICSS_pruEnable(pruIcssHandle, ICSS_EMAC_PORT_2-1);
520         }
522         while (!(((ICSS_EmacObject*)emachandle->object)->linkStatus[0] | 
523                         ((ICSS_EmacObject*)emachandle1->object)->linkStatus[0]))
524         {
525                 Log_print0(Diags_INFO, "taskPruss: link down\n");
526                 Task_sleep(200);
527         }
529         Log_print0(Diags_INFO, "link is finally up \n");
531         ICSS_EmacRegisterHwIntRx(emachandle, (ICSS_EmacCallBack)testCallbackRxPacket);
532         //ICSS_EmacRegisterHwIntRx(emachandle1, testCallbackRxPacket);
535 /**
536  * @brief initialize PRU & ICSS_EMAC config parameters due to MMU in IPU
537  *
538  * @param none
539  *
540  * @retval none
541  */
542 void initPruIcssEmacCfg()
544         uint32_t i;
546         /* phys. to virt translation for prussInitCfg[0], [1]*/
547         for(i=0; i<sizeof(PRUICSS_HwAttrs)/2; i++)
548                 *((uint32_t *)prussInitCfg + i) += VIRT0;
550         prussInitCfg[0].version = 0;
551         prussInitCfg[1].version = 0;
553         /* phys. to virt translation for ICSS_EmacBaseAddrCfgParams[0], [1]*/
554         for(i=0; i<sizeof(ICSS_EmacBaseAddrCfgParams)/2; i++)
555                 *((uint32_t *)icss_EmacBaseAddrCfgParams + i) += VIRT0;
558 /**
559  * @brief PRU & ICSS_EMAC initialization
560  *
561  * @param none
562  *
563  * @retval 0: success
564  *         -1: rx semaphore creation failed
565  *         -2: rx task creation failed
566  */
567 int pru_icss()
570         Error_Block eb;
571         Task_Params taskParams;
572         SemaphoreP_Params semParams;
574         Error_init(&eb);
576 #ifdef EVM_INIT
577         Log_print0(Diags_INFO, "AM57x_setup");
578         AM57x_setup();
579 #endif
580         /* Pin Mux completed in U-boot */
581         Log_print0(Diags_INFO, "Pin Mux Config parameters address mapping");
583         initPruIcssEmacCfg();
585         pruIcssHandle = PRUICSS_create(pruss_config,2);
587         Task_Params_init(&taskParams);
588         taskParams.priority = 15;
589         taskParams.instance->name = "SwitchTask";
590         Task_create(taskPruss, &taskParams, &eb);
592         /*ETH0 initializations*/
593         emachandle = (ICSS_EmacHandle)malloc(sizeof(ICSS_EmacConfig));
595         ICSS_EmacInitConfig* switchEmacCfg;
596         switchEmacCfg = (ICSS_EmacInitConfig*)
597                 malloc(sizeof(ICSS_EmacInitConfig));
598         switchEmacCfg->phyAddr[0]=0;
599         switchEmacCfg->portMask = ICSS_EMAC_MODE_MAC1;
600         switchEmacCfg->ethPrioQueue = ICSS_EMAC_QUEUE1;
602         /* Crosssbar confiiguration */
603         *(unsigned int*)(0x4A0027E8U + VIRT0) =(unsigned int)(0x00C400CA);
604         *(unsigned int*)(0x4A0027ECU + VIRT0) =(unsigned int)(0x00CB00C5);
606         switchEmacCfg->halfDuplexEnable = 1;
607         switchEmacCfg->enableIntrPacing = ICSS_EMAC_ENABLE_PACING;
608         switchEmacCfg->ICSS_EmacIntrPacingMode = ICSS_EMAC_INTR_PACING_MODE1;
609         switchEmacCfg->pacingThreshold = 100;
610         switchEmacCfg->learningEn = 0;
611         SOCCtrlGetPortMacAddr(0,lclMac);
612         switchEmacCfg->macId = lclMac;
614         ICSSEmacDRVInit(emachandle, 2); 
616         switchEmacCfg->rxIntNum = 28;
617         switchEmacCfg->linkIntNum=27;
619         ((ICSS_EmacObject*)emachandle->object)->pruIcssHandle = pruIcssHandle;
620         ((ICSS_EmacObject*)emachandle->object)->emacInitcfg = switchEmacCfg;
622         /*ETH1 initializations*/
623         emachandle1 = (ICSS_EmacHandle)malloc(sizeof(ICSS_EmacConfig));
625         ICSS_EmacInitConfig* switchEmacCfg1;
626         switchEmacCfg1 = (ICSS_EmacInitConfig*)
627                 malloc(sizeof(ICSS_EmacInitConfig));
628         switchEmacCfg1->phyAddr[0]= 1;
630         switchEmacCfg1->portMask = ICSS_EMAC_MODE_MAC2;
631         switchEmacCfg1->ethPrioQueue = ICSS_EMAC_QUEUE3;
632         switchEmacCfg1->enableIntrPacing = ICSS_EMAC_DISABLE_PACING;
633         switchEmacCfg1->pacingThreshold = 100;
635         switchEmacCfg1->learningEn = 0;
637         SOCCtrlGetPortMacAddr(1,lclMac1);
638         switchEmacCfg1->macId = lclMac1;
640         ICSSEmacDRVInit(emachandle1, 2);
641         switchEmacCfg1->rxIntNum = 30;;
642         switchEmacCfg1->linkIntNum=29;
644         ((ICSS_EmacObject*)emachandle1->object)->pruIcssHandle = pruIcssHandle;
645         ((ICSS_EmacObject*)emachandle1->object)->emacInitcfg = switchEmacCfg1;
647         PRUICSS_IntcInitData pruss_intc_initdata = PRUSS_INTC_INITDATA;
648         ICSS_EmacInit(emachandle,&pruss_intc_initdata,ICSS_EMAC_MODE_MAC1);
650         ICSS_EmacInit(emachandle1,&pruss_intc_initdata,ICSS_EMAC_MODE_MAC2);
652         Task_Params_init(&taskParams);
653         taskParams.priority = 10;
654         taskParams.instance->name = (char*)"port0_rxTaskFnc";
655         taskParams.stackSize = 0x1000;
656         taskParams.arg0 = (UArg)emachandle;
657         ((ICSS_EmacObject*)emachandle->object)->rxTaskHandle = 
658                 Task_create(ICSS_EMacOsRxTaskFnc, &taskParams, NULL);
660         if(((ICSS_EmacObject*)emachandle->object)->rxTaskHandle==NULL)
661                 return -2;
663         Task_Params_init(&taskParams);
664         taskParams.priority = 10;
665         taskParams.instance->name = (char*)"port1_rxTaskFnc";
666         taskParams.stackSize = 0x1000;
667         taskParams.arg0 = (UArg)emachandle1;
668         ((ICSS_EmacObject*)emachandle1->object)->rxTaskHandle = 
669                 Task_create(ICSS_EMacOsRxTaskFnc, &taskParams, NULL);
671         if(((ICSS_EmacObject*)emachandle1->object)->rxTaskHandle==NULL)
672                 return -2;
674         PRUICSS_pinMuxConfig(pruIcssHandle, 0x0); 
675         InterruptInit(emachandle);
676         InterruptInit(emachandle1);
678         EMACOpen(emachandle, 2);
680         EnableEMACInterrupts(emachandle);
681         EnableEMACInterrupts(emachandle1);
683         semParams.mode = SemaphoreP_Mode_COUNTING;
684         semParams.name= "icss_rxSemaphore";
685         icssRxSem =  SemaphoreP_create(0,&semParams);;
686         if(icssRxSem == NULL)
687                 return -1;
689         semParams.mode = SemaphoreP_Mode_COUNTING;
690         semParams.name= "icss_rxSemaphore1";
691         icssRxSem1 =  SemaphoreP_create(0,&semParams);;
692         if(icssRxSem1 == NULL)
693                 return -1;
695         Log_print0(Diags_INFO, "main_pruss: initialization done!");
696         return(0);
699 /**
700  * @brief Get MAC address
701  *
702  * @param portNum: port number
703  *        pMacAddr: MAC address data pointer
704  *
705  * @retval none
706  */
707 void SOCCtrlGetPortMacAddr(uint32_t portNum, uint8_t *pMacAddr)
709         if(portNum == 0) {
710                 pMacAddr[5U] =  (VHW_RD_REG32(0x4A002514)
711                                 >> 0U) & 0xFFU;
712                 pMacAddr[4U] =  (VHW_RD_REG32(0x4A002514)
713                                 >> 8U) & 0xFF;
714                 pMacAddr[3U] =  (VHW_RD_REG32(0x4A002514)
715                                 >> 16U) & 0xFFU;
716                 pMacAddr[2U] =  (VHW_RD_REG32(0x4A002518)
717                                 >> 0U) & 0xFFU;
718                 pMacAddr[1U] =  (VHW_RD_REG32(0x4A002518)
719                                 >> 8U) & 0xFFU;
720                 pMacAddr[0U] =  (VHW_RD_REG32(0x4A002518)
721                                 >> 16U) & 0xFFU;
722         }
723         else {
724                 pMacAddr[5U] =  (VHW_RD_REG32(0x4A00251c)
725                                 >> 0U) & 0xFFU;
726                 pMacAddr[4U] =  (VHW_RD_REG32(0x4A00251c)
727                                 >> 8U) & 0xFF;
728                 pMacAddr[3U] =  (VHW_RD_REG32(0x4A00251c)
729                                 >> 16U) & 0xFFU;
730                 pMacAddr[2U] =  (VHW_RD_REG32(0x4A002520)
731                                 >> 0U) & 0xFFU;
732                 pMacAddr[1U] =  (VHW_RD_REG32(0x4A002520)
733                                 >> 8U) & 0xFFU;
734                 pMacAddr[0U] =  (VHW_RD_REG32(0x4A002520)
735                                 >> 16U) & 0xFFU;
736         }
740 /**
741  * @brief ICSS_EMAC driver initialization
742  *
743  * @param handle: ICSS_EMAC handler
744  *        instance: PRU instance number
745  *
746  * @retval none
747  */
748 void ICSSEmacDRVInit(ICSS_EmacHandle handle, uint8_t instance) 
750         /* LLD attributes mallocs */
751         handle->object = (ICSS_EmacObject*)malloc(sizeof(ICSS_EmacObject));
752         handle->hwAttrs= (ICSS_EmacHwAttrs*)malloc(sizeof(ICSS_EmacHwAttrs));
754         /* Callback mallocs */
755         ICSS_EmacCallBackObject* callBackObj = (ICSS_EmacCallBackObject*)
756                 malloc(sizeof(ICSS_EmacCallBackObject));
758         callBackObj->learningExCallBack=(ICSS_EmacCallBackConfig*)
759                 malloc(sizeof(ICSS_EmacCallBackConfig));
760         callBackObj->rxRTCallBack=(ICSS_EmacCallBackConfig*)
761                 malloc(sizeof(ICSS_EmacCallBackConfig));
762         callBackObj->rxCallBack=(ICSS_EmacCallBackConfig*)
763                 malloc(sizeof(ICSS_EmacCallBackConfig));
764         callBackObj->txCallBack=(ICSS_EmacCallBackConfig*)
765                 malloc(sizeof(ICSS_EmacCallBackConfig));
766         ((ICSS_EmacObject*)handle->object)->callBackHandle = callBackObj;
768         /*Allocate memory for learning*/
769         ((ICSS_EmacObject*)handle->object)->macTablePtr = (HashTable_t*)
770                 malloc(NUM_PORTS * sizeof(HashTable_t));
772         /*Allocate memory for PRU Statistics*/
773         ((ICSS_EmacObject*)handle->object)->pruStat = 
774                 (ICSS_EmacPruStatistics_t*)malloc(NUM_PORTS * 
775                                 sizeof(ICSS_EmacPruStatistics_t));
777         /*Allocate memory for Host Statistics*/
778         ((ICSS_EmacObject*)handle->object)->hostStat = 
779                 (ICSS_EmacHostStatistics_t*)malloc(NUM_PORTS * 
780                                 sizeof(ICSS_EmacHostStatistics_t));
782         /*Allocate memory for Storm Prevention*/
783         ((ICSS_EmacObject*)handle->object)->stormPrevPtr = 
784                 (stormPrevention_t*)malloc(NUM_PORTS * 
785                                 sizeof(stormPrevention_t));
787         /* Base address initialization */
788         if(NULL == ((ICSS_EmacHwAttrs*)handle->hwAttrs)->emacBaseAddrCfg) {
789                 ((ICSS_EmacHwAttrs*)handle->hwAttrs)->emacBaseAddrCfg =
790                         (ICSS_EmacBaseAddressHandle_T)
791                         malloc(sizeof(ICSS_EmacBaseAddrCfgParams));
792         }
793         ICSS_EmacBaseAddressHandle_T emacBaseAddr = 
794                 ((ICSS_EmacHwAttrs*)handle->hwAttrs)->emacBaseAddrCfg;
796         if(instance == 2)
797         {
798                 emacBaseAddr->dataRam0BaseAddr = 
799                         icss_EmacBaseAddrCfgParams[instance-1].dataRam0BaseAddr;
800                 emacBaseAddr->dataRam1BaseAddr = 
801                         icss_EmacBaseAddrCfgParams[instance-1].dataRam1BaseAddr;
802                 emacBaseAddr->l3OcmcBaseAddr =  
803                         icss_EmacBaseAddrCfgParams[instance-1].l3OcmcBaseAddr;
804                 emacBaseAddr->prussCfgRegs =  
805                         icss_EmacBaseAddrCfgParams[instance-1].prussCfgRegs;
806                 emacBaseAddr->prussIepRegs =  
807                         icss_EmacBaseAddrCfgParams[instance-1].prussIepRegs;
808                 emacBaseAddr->prussIntcRegs = 
809                         icss_EmacBaseAddrCfgParams[instance-1].prussIntcRegs;
810                 emacBaseAddr->prussMiiMdioRegs = 
811                         icss_EmacBaseAddrCfgParams[instance-1].prussMiiMdioRegs;
812                 emacBaseAddr->prussMiiRtCfgRegsBaseAddr = 
813                         icss_EmacBaseAddrCfgParams[instance-1].prussMiiRtCfgRegsBaseAddr;
814                 emacBaseAddr->prussPru0CtrlRegs = 
815                         icss_EmacBaseAddrCfgParams[instance-1].prussPru0CtrlRegs;
816                 emacBaseAddr->prussPru1CtrlRegs = 
817                         icss_EmacBaseAddrCfgParams[instance-1].prussPru1CtrlRegs;
818                 emacBaseAddr->sharedDataRamBaseAddr = 
819                         icss_EmacBaseAddrCfgParams[instance-1].sharedDataRamBaseAddr;
820         }
823 /**
824  * @internal
825  * @brief Registering Interrupts and Enabling global interrupts
826  *
827  * @param icssEmacHandle: ICSS_EMAC handler
828  *
829  * @retval none
830  */
831 void InterruptInit(ICSS_EmacHandle icssEmacHandle)
833         HwiP_Handle rxHwiHandle;
834         HwiP_Handle linkHwiHandle;
835         static uint32_t cookie = 0;
836         uint8_t linkIntrN = (((ICSS_EmacObject*)
837                         icssEmacHandle->object)->emacInitcfg)->linkIntNum;
838         uint8_t rxIntrN = (((ICSS_EmacObject*)
839                         icssEmacHandle->object)->emacInitcfg)->rxIntNum;
841         cookie = ICSS_EMAC_osalHardwareIntDisable();
843         HwiP_Params hwiParams;
845         ICSS_EMAC_osalHwiParamsInit(&hwiParams);
847         hwiParams.arg = (uintptr_t)icssEmacHandle;
848         hwiParams.evtId = rxIntrN;
849         hwiParams.priority = 0x20; 
850         rxHwiHandle = ICSS_EMAC_osalRegisterInterrupt(rxIntrN, 
851                         (HwiP_Fxn)ICSS_EmacRxInterruptHandler, &hwiParams);
852         if (rxHwiHandle == NULL )
853                 return;
855         hwiParams.arg = (uintptr_t)icssEmacHandle;
856         hwiParams.evtId = linkIntrN;
857         hwiParams.priority = 0x20;
858         linkHwiHandle = ICSS_EMAC_osalRegisterInterrupt(linkIntrN,
859                         (HwiP_Fxn)ICSS_EmacLinkISR, &hwiParams);
860         if (linkHwiHandle == NULL)
861                 return;
863         ((ICSS_EmacObject*)icssEmacHandle->object)->rxintHandle = rxHwiHandle;
864         ((ICSS_EmacObject*)icssEmacHandle->object)->linkintHandle = 
865                 linkHwiHandle;
867         ICSS_EMAC_osalHardwareIntRestore(cookie);
869 /**
870  * @internal
871  * @brief De-registering the interrupts and disabling global interrupts
872  *
873  * @param none
874  *
875  * @retval none
876  */
877 void InterruptEnd(ICSS_EmacHandle icssEmacHandle)
879         ICSS_EMAC_osalHardwareIntDestruct((HwiP_Handle)(((ICSS_EmacObject*)
880                                 icssEmacHandle->object)->rxintHandle));
882         ICSS_EMAC_osalHardwareIntDestruct((HwiP_Handle)(((ICSS_EmacObject*)
883                                 icssEmacHandle->object)->linkintHandle));
885 /**
886  * @internal
887  * @brief This function enables the EMAC interrupts
888  *
889  * @param none
890  *
891  * @retval none
892  */
893 static void EnableEMACInterrupts(ICSS_EmacHandle icssemacHandle)
895         uint32_t key = 0;
897         ICSS_EmacHandle handle = icssemacHandle;
898         key = ICSS_EMAC_osalHardwareIntDisable();
900         ICSS_EMAC_osalHardwareInterruptEnable((((ICSS_EmacObject*)
901                                 handle->object)->emacInitcfg)->linkIntNum);
902         ICSS_EMAC_osalHardwareInterruptEnable((((ICSS_EmacObject*)
903                                 handle->object)->emacInitcfg)->rxIntNum);
905         ICSS_EMAC_osalHardwareIntRestore(key);
907 /**
908  * @brief This function disables the EMAC interrupts
909  * @internal
910  * @param none
911  *
912  * @retval none
913  */
914 void DisableEMACInterrupts(ICSS_EmacHandle icssemacHandle)
916         uint32_t key;
917         ICSS_EmacHandle handle = icssemacHandle;
918         key = ICSS_EMAC_osalHardwareIntDisable();
920         ICSS_EMAC_osalHardwareInterruptDisable((((ICSS_EmacObject*)
921                                 handle->object)->emacInitcfg)->linkIntNum);
922         ICSS_EMAC_osalHardwareInterruptDisable((((ICSS_EmacObject*)
923                                 handle->object)->emacInitcfg)->rxIntNum);
925         ICSS_EMAC_osalHardwareIntRestore(key);
928 /**
929  * @brief Clears Link interrupt for Port0
930  * @internal
931  * @param pruIcssHandle Provides PRUSS memory map
932  *
933  * @retval none
934  */
935 inline void clearLink0ISR(ICSS_EmacHandle icssemacHandle)
937         HW_WR_FIELD32(((((ICSS_EmacHwAttrs *)icssemacHandle->hwAttrs)
938                         ->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR1),
939                         CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, 0x200);
942 /**
943  * @brief Clears Link interrupt for ICSS_EMAC_PORT_1
944  * @internal
945  * @param pruIcssHandle Provides PRUSS memory map
946  *
947  * @retval none
948  */
949 inline void clearLink1ISR(ICSS_EmacHandle icssemacHandle)
951         HW_WR_FIELD32(((((ICSS_EmacHwAttrs *)icssemacHandle->hwAttrs)
952                         ->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR1),
953                         CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, 0x200000);