Makefiles for linux - calls makefile EC ICSS lib
[apps/tidep0079.git] / EC_Master_SysBios_Am572x / Workspace / SYSBIOS_AM57xx / common / main.c
1 /*-----------------------------------------------------------------------------
2  * main.c
3  * Copyright                acontis technologies GmbH, Weingarten, Germany
4  * Description              EtherCAT Master demo application
5  *---------------------------------------------------------------------------*/
8 #include <xdc/std.h>
9 #include <xdc/runtime/Error.h>
10 #include <xdc/runtime/System.h>
11 #include <ti/sysbios/BIOS.h>
12 #include <ti/sysbios/knl/Task.h>
13 #include <ti/sysbios/timers/dmtimer/Timer.h>
14 #include <ti/sysbios/hal/Cache.h>
16 /* EcMaster includes */
17 #include <EcVersion.h>
18 #include <EcOs.h>
20 /* includes from demo  */
21 #include <stdio.h>
22 #include <string.h>
23 #include <stdlib.h>
24 #include <ti/sysbios/family/arm/gic/Hwi.h>
26 #include <ti/csl/soc.h>
27 #include <ti/csl/cslr_device.h> 
28 #include <ti/board/board.h> 
31 /* TI-RTOS Header files */
32 #include <ti/drv/i2c/I2C.h>
33 #include <ti/drv/i2c/soc/I2C_v1.h>
35 /* UART Header files */
36 #include <ti/drv/uart/UART.h>
37 #include <ti/drv/uart/UART_stdio.h>
39 //PC-- 03/14/2017
40 #include <ti/drv/icss_emac/test/src/test_common_utils.h>
41 //uint8_t board_type = 0;
42 /* either idkAM572x or idkAM571x */
43 uint8_t ICSS_EMAC_testEvmType = 0;
45 /* PG version of EVM */
46 uint32_t ICSS_EMAC_testPgVersion = 0;
48 #define SLEEP Task_sleep
49 #define PRINT UART_printf
51 /********************************************************************************/
52 /** \brief Puts string to the UART and replace "\n" to "\n\r"
53 *
54 * \return N/A
55 */
56 static int UARTPutStringWithCR(char* pStr, int maxLength)
57 {
58     int symCount = 0;
59     char* pCurrent = pStr;
61     while (*pCurrent != 0)
62     {
63         Char curChar = *pCurrent;
64         if ( '\n' == curChar )
65         {
66                 UART_putc('\n');
67                 UART_putc('\r');
68         }
69         else
70                 UART_putc(curChar);
72         symCount++;
74         pCurrent++;
75     }
77     return symCount;
78 }
80 /********************************************************************************/
81 /** \brief Puts string to the UART
82 *
83 * \return printed symbols count
84 */
85 #define MAX_TRACE_MSGLEN 255
86 int UARTVprintf(const char *szFormat, va_list vaArgs)
87 {
88     char achMsg[MAX_TRACE_MSGLEN];
89     vsnprintf(achMsg, MAX_TRACE_MSGLEN, szFormat, vaArgs);
91     return UARTPutStringWithCR(achMsg, MAX_TRACE_MSGLEN);
92 }
95 /* Enable the below macro to have prints on the IO Console */
96 //#define IO_CONSOLE
98 #ifndef IO_CONSOLE
99 #define NIMU_log                UART_printf
100 #else
101 #define NIMU_log                printf
102 #endif
104 /* ========================================================================== */
105 /*                             Macros                                  */
106 /* ========================================================================== */
108 /**Phy address of the CPSW port 1*/
109         #define CPSW_PORT0_PHY_ADDR_IDK         0
110 /**Phy address of the CPSW port 1*/
111         #define CPSW_PORT1_PHY_ADDR_IDK         1
113 #define GMAC_SW_IRQ_RX_PULSE_INT_NUM         (92 + 32)
114 #define GMAC_SW_IRQ_TX_PULSE_INT_NUM         (93 + 32)
115 #define GMAC_SW_IRQ_RX_THRESH_PULSE_INT_NUM  (94 + 32)
116 #define GMAC_SW_IRQ_MISC_PULSE_INT_NUM       (95 + 32)
118 #define MAX_TABLE_ENTRIES   3
122 /**Task handle for EIP*/
123 Task_Handle main_task;
126 //NIMU_DEVICE_TABLE_ENTRY NIMUDeviceTable[MAX_TABLE_ENTRIES];
128 void TaskFxn(UArg a0, UArg a1);
129 uint32_t ClockSynthesizerSetup(void);
130 extern const I2C_Config I2C_config[];
132 /* ========================================================================== */
133 /*                          Function Definitions                              */
134 /* ========================================================================== */
137 void CSL_xbarMpuIrqConfigure(Uint32 irqNumIdx, CSL_XbarIrq xbarIrq)
139     CSL_control_intr_dmaRegs *ctrlCoreIntrDmaReg =
140         (CSL_control_intr_dmaRegs *) CSL_MPU_IRQ_DMARQ_CROSSBAR_REGISTERS_REGS;
141     CSL_control_coreRegs *ctrlCoreReg =
142         (CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS;
143     Uint32 regIdx = (irqNumIdx - 1U) / 2U;
144     Uint32 regLsb = (((irqNumIdx - 1U) % 2U) * 16U);
145     Uint32 regMsb = regLsb + 16U;
147     if((CSL_XBAR_IRQ_MIN < xbarIrq) && (CSL_XBAR_IRQ_MAX > xbarIrq))
148     {
149         if ((0U < irqNumIdx) && (CSL_MPU_IRQ_XBAR_COUNT >= irqNumIdx))
150         {
151             ctrlCoreReg->MMR_LOCK_2 = 0xF757FDC0U;
152             CSL_FINSR(ctrlCoreIntrDmaReg->MPU_IRQ[regIdx],
153                 regMsb, regLsb, xbarIrq);
154             ctrlCoreReg->MMR_LOCK_2 = 0xFDF45530U;
155         }
156     }
158 #define BOARD_IDKAM571x     1
159 #define BOARD_IDKAM572x     2
161 /**
162  *  \name main
163  *  \brief Main Function
164  *  \param none
165  *  \return none
166  *
167  */
168 int main()
170     /* Call board init functions */
172     Board_STATUS boardInitStatus =0;
173         Board_IDInfo info;
174         Error_Block eb;
175     Board_initCfg boardCfg;
176     Task_Params taskParams;
177     uint32_t numPorts = 4; //PC-- 03/14/2017
179     //boardCfg = BOARD_INIT_UNLOCK_MMR | BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_UART_STDIO;
180     //PC-- 03/14/2017
181     boardCfg = BOARD_INIT_UNLOCK_MMR | BOARD_INIT_UART_STDIO | BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_ICSS_ETH_PHY;
182     Error_init(&eb);
183     boardInitStatus=Board_init(boardCfg);
185     if (boardInitStatus !=0)
186     {
187         printf("Board_init failure\n");
188         return(0);
189     }
191     memset(&info, 0,sizeof(Board_IDInfo));
192     Board_getIDInfo(&info);
193     PRINT("boardName: %s\n", info.boardName);
194     if (!(strcmp(info.boardName, "AM571IDK")))
195     {
196         ICSS_EMAC_testEvmType =ICSS_EMAC_TEST_BOARD_IDKAM571x;
197         PRINT("board type is AM571IDK, numPorts: %d\n", numPorts);
198     }
199     else
200     {
201         ICSS_EMAC_testEvmType =ICSS_EMAC_TEST_BOARD_IDKAM572x;
202         PRINT("board type is AM572IDK, numPorts: %d\n", numPorts);
203      }
204 //#if (defined LINKLAYER_ICSS)
205 //    AM57x_setup(board_type, 2); //PC-- for AM571x IDK we can use workaround --> https://jira.itg.ti.com/browse/PRSDK-40 AM57x_setup(board_type, 4)
206 //#endif
207         //ClockSynthesizerSetup(); //PC-- commented due to error
209     //PC-- 03/14/2017
210     //AM57x_setup();
211     //ICSS_EMAC_testAM572xSetup(board_type, 2);
213     CSL_xbarMpuIrqConfigure(CSL_XBAR_INST_MPU_IRQ_92, CSL_XBAR_GMAC_SW_IRQ_RX_PULSE);
214     CSL_xbarMpuIrqConfigure(CSL_XBAR_INST_MPU_IRQ_93, CSL_XBAR_GMAC_SW_IRQ_TX_PULSE);
216       /* Select RGMII 2 ports GMIIx_SEL = 2 for RGMII*/
217           CSL_FINS (((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_1,
218               CONTROL_CORE_CONTROL_IO_1_GMII1_SEL, 2U);
219           CSL_FINS (((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_1,
220               CONTROL_CORE_CONTROL_IO_1_GMII2_SEL, 2U);
222       /*GMAC RESET ISOLATION Enable*/
223           CSL_FINS (((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_2,
224               CONTROL_CORE_CONTROL_IO_2_GMAC_RESET_ISOLATION_ENABLE, 0U);
225           CSL_FINS (((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_2,
226               CONTROL_CORE_CONTROL_IO_2_GMAC_RESET_ISOLATION_ENABLE, 1U);
229     Task_Params_init(&taskParams);
230     taskParams.priority = 1;
231     taskParams.stackSize = 0x1400;
232     taskParams.instance->name = "MainTask";
233     main_task = Task_create (TaskFxn, &taskParams, &eb);
236     BIOS_start();
237     //return -1;
238     return(0);
241 /*****************************************************************************/
242 /** \brief Auxiliary clock timer instance.
243  *
244  * Used inside EcMaster code for auxiliary clock.
245  * If instance is NULL, than standard clock is used (not precise).
246 */
247 Timer_Handle g_auxClocksTimerHandle = 0;
249 /*****************************************************************************/
250 /** \brief Initializes timer instance which is used from auxiliary clock.
251 */
252 void InitAuxClockTimer()
254 //    const UInt DMTimer4ID = 2;
256 //    g_auxClocksTimerHandle = Timer_getHandle(DMTimer4ID);
259 /*****************************************************************************/
260 /** \brief Timer ISR which do nothing.
261 */
262 void TimerEmptyISR()
268 /*****************************************************************************/
269 /** \brief Prototype of main task defined in another file.
271 */
272 extern int EcMasterDemo(void);
274 /**
275  *  \name TaskFxn
276  *  \brief Task which do EIP initialization
277  *  \param a0
278  *  \param a1
279  *  \return none
280  *
281  */
282 void TaskFxn(UArg a0, UArg a1)
284         NIMU_log("\n\rSYS/BIOS EcMaster Sample application\n\r");
286     InitAuxClockTimer();
288         /* Workarround call to cache function should exist in executable becuase linker does not want to add it */
289     Cache_wbInv(&main_task, 1, Cache_Type_ALL, TRUE);
290         EcMasterDemo();
294 /** \brief Macro indicating the i2c time out value. */
295 #define I2C_TIMEOUT_VAL           (100U)
297 /* Delay function */
298 static void delay(unsigned int delayValue);
301 /*
302  *  ======== Delay function ========
303  */
304 void delay(unsigned int delayValue)
306     volatile uint32_t delay1 = delayValue*10000;
307     while (delay1--) ;
310 /* I2C Instance Controlling Clock Synthesizer */
311 #define CLOCK_SYNTHESIZER_I2C_INST_NUM  0
313 /* Clock Synthesizer Device Address */
314 #define CLOCK_SYNTHESIZER_I2C_ADDR      0x65
316 #define CLOCK_SYNTHESIZER_ID_REG        0
318 /* Crystal load capacitor selection */
319 #define CLOCK_SYNTHESIZER_XCSEL         0x05
321 /* PLL1 Configuration Register */
322 #define CLOCK_SYNTHESIZER_MUX_REG       0x14
324 /* PDIV2 */
325 #define CLOCK_SYNTHESIZER_PDIV2_REG     0x16
327 /* PDIV3 */
328 #define CLOCK_SYNTHESIZER_PDIV3_REG     0x17
330 #define TX_LENGTH              (2U)
331 #define RX_LENGTH              (10U)
333 uint32_t ClockSynthesizerSetup(void)
335     uint32_t status = TRUE;
336         uint32_t regValue = 0U;
337     I2C_Params i2cParams;
338     I2C_Handle handle = NULL;
339     I2C_Transaction i2cTransaction;
340     char txBuf[TX_LENGTH] = {0x00, 0x01};
341     char rxBuf[RX_LENGTH] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
342                              0x00, 0x00};
344     I2C_init();
346     I2C_Params_init(&i2cParams);
348     ((I2C_HwAttrs *) I2C_config[CLOCK_SYNTHESIZER_I2C_INST_NUM].hwAttrs)->enableIntr = false;
349     handle = I2C_open(CLOCK_SYNTHESIZER_I2C_INST_NUM, &i2cParams);
351 /* Read - CLOCK_SYNTHESIZER_ID_REG */
353     if (FALSE != status)
354         {
355             txBuf[0] = CLOCK_SYNTHESIZER_ID_REG | 0x80U;
356             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
357             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
358             i2cTransaction.writeCount = 1U;
359             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
360             i2cTransaction.readCount = 0U;
361             status = I2C_transfer(handle, &i2cTransaction);
363             if(FALSE == status)
364             {
365                 NIMU_log("\n CLOCK_SYNTHESIZER_ID_REG: Data Write failed. \n");
366             }
367         }
369     delay(I2C_TIMEOUT_VAL);
371     if (FALSE != status)
372         {
373             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
374             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
375             i2cTransaction.writeCount = 0U;
376             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
377             i2cTransaction.readCount = 1U;
378             status = I2C_transfer(handle, &i2cTransaction);
380             if(FALSE == status)
381             {
382                 NIMU_log("\n CLOCK_SYNTHESIZER_ID_REG: Data Read failed. \n");
383             }
384                 else
385                 {
386                         regValue = rxBuf[0];
387                 }
388         }
390     delay(I2C_TIMEOUT_VAL);
392     if((regValue & 0x81U)!= 0x81U)
393     {
394         NIMU_log("\n Clock synthesizer: Read: Failed");
395         status = FALSE;
396     }
398     /** CDCE913 Clock Synthesizer configuration for RMII Clock = 50 MHz
399      * fout = fin/Pdiv x N/M
400      * fout = 50 MHz
401      * fin  = 25 MHz
402      * Pdiv = 2
403      * N    = 4
404      * M    = 1
405      */
407     /* Crystal load Capacitor Selection - 18pF: 0x12h(bits 7:3) */
409 /* Write - CLOCK_SYNTHESIZER_XCSEL */
411     if (FALSE != status)
412         {
413             txBuf[0] = CLOCK_SYNTHESIZER_XCSEL | 0x80U;
414             txBuf[1] = 0x90U;
415             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
416             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
417             i2cTransaction.writeCount = 2U;
418             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
419             i2cTransaction.readCount = 0U;
420             status = I2C_transfer(handle, &i2cTransaction);
422             if(FALSE == status)
423             {
424                 NIMU_log("\n CLOCK_SYNTHESIZER_XCSEL: Data Write failed. \n");
425             }
426         }
428     delay(I2C_TIMEOUT_VAL);
430     if (FALSE == status)
431     {
432         NIMU_log("\n Clock synthesizer: Write: Failed");
433     }
435     /* PLL1 Multiplexer b7:0 (PLL1) */
437 /* Write - CLOCK_SYNTHESIZER_MUX_REG */
439     if (FALSE != status)
440         {
441             txBuf[0] = CLOCK_SYNTHESIZER_MUX_REG | 0x80U;
442             txBuf[1] = 0x6DU;
443             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
444             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
445             i2cTransaction.writeCount = 2U;
446             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
447             i2cTransaction.readCount = 0U;
448             status = I2C_transfer(handle, &i2cTransaction);
450             if(FALSE == status)
451             {
452                 NIMU_log("\n CLOCK_SYNTHESIZER_MUX_REG: Data Write failed. \n");
453             }
454         }
456     delay(I2C_TIMEOUT_VAL);
458     if (FALSE == status)
459     {
460         NIMU_log("\n Clock synthesizer: Write: Failed");
461     }
463     /** b7-0(PLL1 SSC down selection by default),
464      *  b6:0-0x02h(7-bit Y2-Output-Divider Pdiv2)
465      */
467 /* Write - CLOCK_SYNTHESIZER_PDIV2_REG */
469     if (FALSE != status)
470         {
471             txBuf[0] = CLOCK_SYNTHESIZER_PDIV2_REG | 0x80U;
472             txBuf[1] = 0x02U;
473             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
474             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
475             i2cTransaction.writeCount = 2U;
476             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
477             i2cTransaction.readCount = 0U;
478             status = I2C_transfer(handle, &i2cTransaction);
480             if(FALSE == status)
481             {
482                 NIMU_log("\n CLOCK_SYNTHESIZER_PDIV2_REG: Data Write failed. \n");
483             }
484         }
486     delay(I2C_TIMEOUT_VAL);
488     if (FALSE == status)
489     {
490         NIMU_log("\n Clock synthesizer: Write: Failed");
491     }
493     /* b6:0-0x02h(7-bit Y3-Output-Divider Pdiv3) */
495 /* Write - CLOCK_SYNTHESIZER_PDIV3_REG */
497     if (FALSE != status)
498         {
499             txBuf[0] = CLOCK_SYNTHESIZER_PDIV3_REG | 0x80U;
500             txBuf[1] = 0x02U;
501             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
502             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
503             i2cTransaction.writeCount = 2U;
504             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
505             i2cTransaction.readCount = 0U;
506             status = I2C_transfer(handle, &i2cTransaction);
508             if(FALSE == status)
509             {
510                 NIMU_log("\n CLOCK_SYNTHESIZER_PDIV3_REG: Data Write failed. \n");
511             }
512         }
514     delay(I2C_TIMEOUT_VAL);
516     if (FALSE == status)
517     {
518         NIMU_log("\n Clock synthesizer: Write: Failed");
519     }
521     I2C_close(handle);
523     return status;