ECMaster ported to PSDK 4.3
[apps/tidep0079.git] / EC_Master_SysBios_Am572x / Workspace / SYSBIOS_AM57xx / common / main.c
1 /*-----------------------------------------------------------------------------
2  * main.c
3  * Copyright                acontis technologies GmbH, Weingarten, Germany
4  * Description              EtherCAT Master demo application
5  *---------------------------------------------------------------------------*/
8 #include <xdc/std.h>
9 #include <xdc/runtime/Error.h>
10 #include <xdc/runtime/System.h>
11 #include <ti/sysbios/BIOS.h>
12 #include <ti/sysbios/knl/Task.h>
13 #include <ti/sysbios/timers/dmtimer/Timer.h>
14 #include <ti/sysbios/hal/Cache.h>
16 /* EcMaster includes */
17 #include <EcVersion.h>
18 #include <EcOs.h>
20 /* includes from demo  */
21 #include <stdio.h>
22 #include <string.h>
23 #include <stdlib.h>
24 #include <ti/sysbios/family/arm/gic/Hwi.h>
26 #include <ti/csl/soc.h>
27 #include <ti/csl/cslr_device.h> 
28 #include <ti/board/board.h> 
31 /* TI-RTOS Header files */
32 #include <ti/drv/i2c/I2C.h>
33 #include <ti/drv/i2c/soc/I2C_v1.h>
35 /* UART Header files */
36 #include <ti/drv/uart/UART.h>
37 #include <ti/drv/uart/UART_stdio.h>
39 //PC-- 03/14/2017
40 #include <ti/drv/icss_emac/test/src/test_common_utils.h>
41 //uint8_t board_type = 0;
42 /* either idkAM572x or idkAM571x */
43 uint8_t ICSS_EMAC_testEvmType = 0;
45 /* PG version of EVM */
46 uint32_t ICSS_EMAC_testPgVersion = 0;
48 #define SLEEP Task_sleep
49 #define PRINT UART_printf
51 /********************************************************************************/
52 /** \brief Puts string to the UART and replace "\n" to "\n\r"
53 *
54 * \return N/A
55 */
56 static int UARTPutStringWithCR(char* pStr, int maxLength)
57 {
58     int symCount = 0;
59     char* pCurrent = pStr;
61     while (*pCurrent != 0)
62     {
63         Char curChar = *pCurrent;
64         if ( '\n' == curChar )
65         {
66                 UART_putc('\n');
67                 UART_putc('\r');
68         }
69         else
70                 UART_putc(curChar);
72         symCount++;
74         pCurrent++;
75     }
77     return symCount;
78 }
80 /********************************************************************************/
81 /** \brief Puts string to the UART
82 *
83 * \return printed symbols count
84 */
85 #define MAX_TRACE_MSGLEN 255
86 int UARTVprintf(const char *szFormat, va_list vaArgs)
87 {
88     char achMsg[MAX_TRACE_MSGLEN];
89     vsnprintf(achMsg, MAX_TRACE_MSGLEN, szFormat, vaArgs);
91     return UARTPutStringWithCR(achMsg, MAX_TRACE_MSGLEN);
92 }
95 /* Enable the below macro to have prints on the IO Console */
96 //#define IO_CONSOLE
98 #ifndef IO_CONSOLE
99 #define NIMU_log                UART_printf
100 #else
101 #define NIMU_log                printf
102 #endif
104 /* ========================================================================== */
105 /*                             Macros                                  */
106 /* ========================================================================== */
108 /**Phy address of the CPSW port 1*/
109         #define CPSW_PORT0_PHY_ADDR_IDK         0
110 /**Phy address of the CPSW port 1*/
111         #define CPSW_PORT1_PHY_ADDR_IDK         1
113 #define GMAC_SW_IRQ_RX_PULSE_INT_NUM         (92 + 32)
114 #define GMAC_SW_IRQ_TX_PULSE_INT_NUM         (93 + 32)
115 #define GMAC_SW_IRQ_RX_THRESH_PULSE_INT_NUM  (94 + 32)
116 #define GMAC_SW_IRQ_MISC_PULSE_INT_NUM       (95 + 32)
118 #define MAX_TABLE_ENTRIES   3
122 /**Task handle for EIP*/
123 Task_Handle main_task;
126 //NIMU_DEVICE_TABLE_ENTRY NIMUDeviceTable[MAX_TABLE_ENTRIES];
128 void TaskFxn(UArg a0, UArg a1);
129 uint32_t ClockSynthesizerSetup(void);
130 extern const I2C_Config I2C_config[];
132 /* ========================================================================== */
133 /*                          Function Definitions                              */
134 /* ========================================================================== */
137 void CSL_xbarMpuIrqConfigure(Uint32 irqNumIdx, CSL_XbarIrq xbarIrq)
139     CSL_control_intr_dmaRegs *ctrlCoreIntrDmaReg =
140         (CSL_control_intr_dmaRegs *) CSL_MPU_IRQ_DMARQ_CROSSBAR_REGISTERS_REGS;
141     CSL_control_coreRegs *ctrlCoreReg =
142         (CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS;
143     Uint32 regIdx = (irqNumIdx - 1U) / 2U;
144     Uint32 regLsb = (((irqNumIdx - 1U) % 2U) * 16U);
145     Uint32 regMsb = regLsb + 16U;
147     if((CSL_XBAR_IRQ_MIN < xbarIrq) && (CSL_XBAR_IRQ_MAX > xbarIrq))
148     {
149         if ((0U < irqNumIdx) && (CSL_MPU_IRQ_XBAR_COUNT >= irqNumIdx))
150         {
151             ctrlCoreReg->MMR_LOCK_2 = 0xF757FDC0U;
152             CSL_FINSR(ctrlCoreIntrDmaReg->MPU_IRQ[regIdx],
153                 regMsb, regLsb, xbarIrq);
154             ctrlCoreReg->MMR_LOCK_2 = 0xFDF45530U;
155         }
156     }
158 #define BOARD_IDKAM571x     1
159 #define BOARD_IDKAM572x     2
161 /**
162  *  \name main
163  *  \brief Main Function
164  *  \param none
165  *  \return none
166  *
167  */
168 int main()
170     /* Call board init functions */
172     Error_Block eb;
173     Task_Params taskParams;
174     Board_IDInfo info;
175     Board_STATUS boardInitStatus =0;
177     Board_initCfg cfg = BOARD_INIT_UART_STDIO | BOARD_INIT_PINMUX_CONFIG | BOARD_INIT_MODULE_CLOCK | BOARD_INIT_ICSS_ETH_PHY | BOARD_INIT_UNLOCK_MMR;
179     Error_init(&eb);
180     boardInitStatus  = Board_init(cfg);
182     if (boardInitStatus !=0)
183     {
184         printf("Board_init failure\n");
185         return(0);
186     }
188     memset(&info, 0,sizeof(Board_IDInfo));
189     Board_getIDInfo(&info);
190     PRINT("boardName: %s\n", info.boardName);
191     if (!(strcmp(info.boardName, "AM571IDK")))
192     {
193         ICSS_EMAC_testEvmType =ICSS_EMAC_TEST_BOARD_IDKAM571x;
194     }
195     else if(!(strcmp(info.boardName, "AM572IDK")))
196     {
197        ICSS_EMAC_testEvmType =ICSS_EMAC_TEST_BOARD_IDKAM572x;
198     }
199     else
200     {
201         ICSS_EMAC_testEvmType =ICSS_EMAC_TEST_BOARD_IDKAM574x;
202      }
205     CSL_xbarMpuIrqConfigure(CSL_XBAR_INST_MPU_IRQ_92, CSL_XBAR_GMAC_SW_IRQ_RX_PULSE);
206     CSL_xbarMpuIrqConfigure(CSL_XBAR_INST_MPU_IRQ_93, CSL_XBAR_GMAC_SW_IRQ_TX_PULSE);
208       /* Select RGMII 2 ports GMIIx_SEL = 2 for RGMII*/
209           CSL_FINS (((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_1,
210               CONTROL_CORE_CONTROL_IO_1_GMII1_SEL, 2U);
211           CSL_FINS (((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_1,
212               CONTROL_CORE_CONTROL_IO_1_GMII2_SEL, 2U);
214       /*GMAC RESET ISOLATION Enable*/
215           CSL_FINS (((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_2,
216               CONTROL_CORE_CONTROL_IO_2_GMAC_RESET_ISOLATION_ENABLE, 0U);
217           CSL_FINS (((CSL_control_coreRegs *) CSL_MPU_CTRL_MODULE_CORE_CORE_REGISTERS_REGS)->CONTROL_IO_2,
218               CONTROL_CORE_CONTROL_IO_2_GMAC_RESET_ISOLATION_ENABLE, 1U);
221     Task_Params_init(&taskParams);
222     taskParams.priority = 1;
223     taskParams.stackSize = 0x1400;
224     taskParams.instance->name = "MainTask";
225     main_task = Task_create (TaskFxn, &taskParams, &eb);
228     BIOS_start();
229     return(0);
232 /*****************************************************************************/
233 /** \brief Auxiliary clock timer instance.
234  *
235  * Used inside EcMaster code for auxiliary clock.
236  * If instance is NULL, than standard clock is used (not precise).
237 */
238 Timer_Handle g_auxClocksTimerHandle = 0;
240 /*****************************************************************************/
241 /** \brief Initializes timer instance which is used from auxiliary clock.
242 */
243 void InitAuxClockTimer()
245 //    const UInt DMTimer4ID = 2;
247 //    g_auxClocksTimerHandle = Timer_getHandle(DMTimer4ID);
250 /*****************************************************************************/
251 /** \brief Timer ISR which do nothing.
252 */
253 void TimerEmptyISR()
259 /*****************************************************************************/
260 /** \brief Prototype of main task defined in another file.
262 */
263 extern int EcMasterDemo(void);
265 /**
266  *  \name TaskFxn
267  *  \brief Task which do EIP initialization
268  *  \param a0
269  *  \param a1
270  *  \return none
271  *
272  */
273 void TaskFxn(UArg a0, UArg a1)
275         NIMU_log("\n\rSYS/BIOS EcMaster Sample application\n\r");
277     InitAuxClockTimer();
279         /* Workarround call to cache function should exist in executable becuase linker does not want to add it */
280     Cache_wbInv(&main_task, 1, Cache_Type_ALL, TRUE);
281         EcMasterDemo();
285 /** \brief Macro indicating the i2c time out value. */
286 #define I2C_TIMEOUT_VAL           (100U)
288 /* Delay function */
289 static void delay(unsigned int delayValue);
292 /*
293  *  ======== Delay function ========
294  */
295 void delay(unsigned int delayValue)
297     volatile uint32_t delay1 = delayValue*10000;
298     while (delay1--) ;
301 /* I2C Instance Controlling Clock Synthesizer */
302 #define CLOCK_SYNTHESIZER_I2C_INST_NUM  0
304 /* Clock Synthesizer Device Address */
305 #define CLOCK_SYNTHESIZER_I2C_ADDR      0x65
307 #define CLOCK_SYNTHESIZER_ID_REG        0
309 /* Crystal load capacitor selection */
310 #define CLOCK_SYNTHESIZER_XCSEL         0x05
312 /* PLL1 Configuration Register */
313 #define CLOCK_SYNTHESIZER_MUX_REG       0x14
315 /* PDIV2 */
316 #define CLOCK_SYNTHESIZER_PDIV2_REG     0x16
318 /* PDIV3 */
319 #define CLOCK_SYNTHESIZER_PDIV3_REG     0x17
321 #define TX_LENGTH              (2U)
322 #define RX_LENGTH              (10U)
324 uint32_t ClockSynthesizerSetup(void)
326     uint32_t status = TRUE;
327         uint32_t regValue = 0U;
328     I2C_Params i2cParams;
329     I2C_Handle handle = NULL;
330     I2C_Transaction i2cTransaction;
331     char txBuf[TX_LENGTH] = {0x00, 0x01};
332     char rxBuf[RX_LENGTH] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
333                              0x00, 0x00};
335     I2C_init();
337     I2C_Params_init(&i2cParams);
339     ((I2C_HwAttrs *) I2C_config[CLOCK_SYNTHESIZER_I2C_INST_NUM].hwAttrs)->enableIntr = false;
340     handle = I2C_open(CLOCK_SYNTHESIZER_I2C_INST_NUM, &i2cParams);
342 /* Read - CLOCK_SYNTHESIZER_ID_REG */
344     if (FALSE != status)
345         {
346             txBuf[0] = CLOCK_SYNTHESIZER_ID_REG | 0x80U;
347             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
348             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
349             i2cTransaction.writeCount = 1U;
350             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
351             i2cTransaction.readCount = 0U;
352             status = I2C_transfer(handle, &i2cTransaction);
354             if(FALSE == status)
355             {
356                 NIMU_log("\n CLOCK_SYNTHESIZER_ID_REG: Data Write failed. \n");
357             }
358         }
360     delay(I2C_TIMEOUT_VAL);
362     if (FALSE != status)
363         {
364             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
365             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
366             i2cTransaction.writeCount = 0U;
367             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
368             i2cTransaction.readCount = 1U;
369             status = I2C_transfer(handle, &i2cTransaction);
371             if(FALSE == status)
372             {
373                 NIMU_log("\n CLOCK_SYNTHESIZER_ID_REG: Data Read failed. \n");
374             }
375                 else
376                 {
377                         regValue = rxBuf[0];
378                 }
379         }
381     delay(I2C_TIMEOUT_VAL);
383     if((regValue & 0x81U)!= 0x81U)
384     {
385         NIMU_log("\n Clock synthesizer: Read: Failed");
386         status = FALSE;
387     }
389     /** CDCE913 Clock Synthesizer configuration for RMII Clock = 50 MHz
390      * fout = fin/Pdiv x N/M
391      * fout = 50 MHz
392      * fin  = 25 MHz
393      * Pdiv = 2
394      * N    = 4
395      * M    = 1
396      */
398     /* Crystal load Capacitor Selection - 18pF: 0x12h(bits 7:3) */
400 /* Write - CLOCK_SYNTHESIZER_XCSEL */
402     if (FALSE != status)
403         {
404             txBuf[0] = CLOCK_SYNTHESIZER_XCSEL | 0x80U;
405             txBuf[1] = 0x90U;
406             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
407             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
408             i2cTransaction.writeCount = 2U;
409             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
410             i2cTransaction.readCount = 0U;
411             status = I2C_transfer(handle, &i2cTransaction);
413             if(FALSE == status)
414             {
415                 NIMU_log("\n CLOCK_SYNTHESIZER_XCSEL: Data Write failed. \n");
416             }
417         }
419     delay(I2C_TIMEOUT_VAL);
421     if (FALSE == status)
422     {
423         NIMU_log("\n Clock synthesizer: Write: Failed");
424     }
426     /* PLL1 Multiplexer b7:0 (PLL1) */
428 /* Write - CLOCK_SYNTHESIZER_MUX_REG */
430     if (FALSE != status)
431         {
432             txBuf[0] = CLOCK_SYNTHESIZER_MUX_REG | 0x80U;
433             txBuf[1] = 0x6DU;
434             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
435             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
436             i2cTransaction.writeCount = 2U;
437             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
438             i2cTransaction.readCount = 0U;
439             status = I2C_transfer(handle, &i2cTransaction);
441             if(FALSE == status)
442             {
443                 NIMU_log("\n CLOCK_SYNTHESIZER_MUX_REG: Data Write failed. \n");
444             }
445         }
447     delay(I2C_TIMEOUT_VAL);
449     if (FALSE == status)
450     {
451         NIMU_log("\n Clock synthesizer: Write: Failed");
452     }
454     /** b7-0(PLL1 SSC down selection by default),
455      *  b6:0-0x02h(7-bit Y2-Output-Divider Pdiv2)
456      */
458 /* Write - CLOCK_SYNTHESIZER_PDIV2_REG */
460     if (FALSE != status)
461         {
462             txBuf[0] = CLOCK_SYNTHESIZER_PDIV2_REG | 0x80U;
463             txBuf[1] = 0x02U;
464             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
465             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
466             i2cTransaction.writeCount = 2U;
467             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
468             i2cTransaction.readCount = 0U;
469             status = I2C_transfer(handle, &i2cTransaction);
471             if(FALSE == status)
472             {
473                 NIMU_log("\n CLOCK_SYNTHESIZER_PDIV2_REG: Data Write failed. \n");
474             }
475         }
477     delay(I2C_TIMEOUT_VAL);
479     if (FALSE == status)
480     {
481         NIMU_log("\n Clock synthesizer: Write: Failed");
482     }
484     /* b6:0-0x02h(7-bit Y3-Output-Divider Pdiv3) */
486 /* Write - CLOCK_SYNTHESIZER_PDIV3_REG */
488     if (FALSE != status)
489         {
490             txBuf[0] = CLOCK_SYNTHESIZER_PDIV3_REG | 0x80U;
491             txBuf[1] = 0x02U;
492             i2cTransaction.slaveAddress = CLOCK_SYNTHESIZER_I2C_ADDR;
493             i2cTransaction.writeBuf = (uint8_t *)&txBuf[0];
494             i2cTransaction.writeCount = 2U;
495             i2cTransaction.readBuf = (uint8_t *)&rxBuf[0];
496             i2cTransaction.readCount = 0U;
497             status = I2C_transfer(handle, &i2cTransaction);
499             if(FALSE == status)
500             {
501                 NIMU_log("\n CLOCK_SYNTHESIZER_PDIV3_REG: Data Write failed. \n");
502             }
503         }
505     delay(I2C_TIMEOUT_VAL);
507     if (FALSE == status)
508     {
509         NIMU_log("\n Clock synthesizer: Write: Failed");
510     }
512     I2C_close(handle);
514     return status;