1 /******************************************************************************
2 * Copyright (c) 2013-2015, Texas Instruments Incorporated - http://www.ti.com/
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
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8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of Texas Instruments Incorporated nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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27 *****************************************************************************/
29 #include "ti_cblas_acc.h"
30 #include "../../ticblas/ticblas.h"
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 void __real_cblas_sspr(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo, const int N, const float alpha, const float *X, const int incX, float *Ap) ;
37 #ifdef __cplusplus
38 }
39 extern "C"
40 #endif
41 void cblas_sspr(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo, const int N, const float alpha, const float *X, const int incX, float *Ap)
42 {
44 /* Do an init on first use */
45 if (!ti_cblas_init_done) ti_cblas_init();
46 TI_CBLAS_DEBUG_PRINT("Intercepted call to %s\n", "cblas_sspr");
48 TI_CBLAS_PROFILE_START();
49 /* Dynamic condtional offload to ARM */
50 if ((TI_CBLAS_L2_OFFLOAD == TI_CBLAS_OFFLOAD_NONE)) {
51 TI_CBLAS_DEBUG_PRINT("Executing ARM %s\n", "cblas_sspr");
52 __real_cblas_sspr(order,Uplo,N,alpha,X,incX,Ap);
53 TI_CBLAS_PROFILE_REPORT(" Entire %s call (ARM) took %8.2f us\n","cblas_sspr", (float) clock_diff);
54 return ;
55 }
56 /* End ARM offload */
58 /******************************************************************/
59 /* DSP offload WILL be done if control reaches here */
60 TI_CBLAS_DEBUG_PRINT("Offloading to DSP %s\n", "cblas_sspr");
62 /* Lookup kernel pointer from global table */
63 #ifdef __cplusplus
64 Event e;
65 Kernel* __K;
66 #else
67 cl_kernel __K;
68 #endif
69 __K = ti_cblas_get_kernel(TI_CBLAS_CBLAS_SSPR_IDX, "ocl_cblas_sspr");
70 #ifdef __cplusplus
71 try
72 #else
73 cl_int err = CL_SUCCESS;
74 #endif
75 {
77 #ifdef __cplusplus
78 __K->setArg(0, order);
79 #else
80 err |= clSetKernelArg(__K, 0, sizeof(order), &order);
81 #endif
83 #ifdef __cplusplus
84 __K->setArg(1, Uplo);
85 #else
86 err |= clSetKernelArg(__K, 1, sizeof(Uplo), &Uplo);
87 #endif
89 #ifdef __cplusplus
90 __K->setArg(2, N);
91 #else
92 err |= clSetKernelArg(__K, 2, sizeof(N), &N);
93 #endif
95 #ifdef __cplusplus
96 __K->setArg(3, alpha);
97 #else
98 err |= clSetKernelArg(__K, 3, sizeof(alpha), &alpha);
99 #endif
100 /* For const arguments we use CL_MEM_USE_READ_ONLY */
102 int size_bufX;
103 size_bufX = (1+(N-1)*abs(incX))*sizeof(float);
104 size_bufX = MAX(size_bufX,1);
106 #ifdef __cplusplus
107 Buffer buf_X(*ti_cblas_ocl_context, CL_MEM_READ_ONLY|CL_MEM_USE_HOST_PTR, size_bufX, (void *)X);
108 __K->setArg(4, buf_X);
109 #else
110 cl_mem buf_X = clCreateBuffer(ti_cblas_ocl_context, CL_MEM_READ_ONLY|CL_MEM_USE_HOST_PTR, size_bufX, (void *)X, &err);
111 TI_CBLAS_OCL_CHKERROR("clCreateBuffer",err);
112 err |= clSetKernelArg(__K, 4, sizeof(buf_X), &buf_X);
113 TI_CBLAS_OCL_CHKERROR("clSetKernelArg",err);
114 #endif
116 #ifdef __cplusplus
117 __K->setArg(5, incX);
118 #else
119 err |= clSetKernelArg(__K, 5, sizeof(incX), &incX);
120 #endif
122 int size_bufAp;
123 size_bufAp = N*(N+1)/2*sizeof(float);
124 size_bufAp = MAX(size_bufAp,1);
126 #ifdef __cplusplus
127 Buffer buf_Ap(*ti_cblas_ocl_context, CL_MEM_READ_WRITE|CL_MEM_USE_HOST_PTR, size_bufAp, (void *)Ap);
128 __K->setArg(6, buf_Ap);
129 #else
130 cl_mem buf_Ap = clCreateBuffer(ti_cblas_ocl_context, CL_MEM_READ_WRITE|CL_MEM_USE_HOST_PTR, size_bufAp, (void *)Ap, &err);
131 TI_CBLAS_OCL_CHKERROR("clCreateBuffer",err);
132 err |= clSetKernelArg(__K, 6, sizeof(buf_Ap), &buf_Ap);
133 TI_CBLAS_OCL_CHKERROR("clSetKernelArg",err);
134 #endif
136 #ifdef __cplusplus
137 ti_cblas_ocl_Q->enqueueTask(*__K, 0, &e);
138 e.wait();
139 #else
140 cl_event e;
141 err |= clEnqueueTask(ti_cblas_ocl_Q, __K, 0, 0, &e);
142 TI_CBLAS_OCL_CHKERROR("clEnqueueTask",err);
143 err |= clWaitForEvents(1, &e);
144 TI_CBLAS_OCL_CHKERROR("clWaitForEvents",err);
145 err |= clReleaseEvent(e);
146 TI_CBLAS_OCL_CHKERROR("clReleaseEvent",err);
147 #endif
149 ti_cblas_delete_kernel(__K);
151 TI_CBLAS_DEBUG_PRINT("Finished executing %s\n", "cblas_sspr");
152 TI_CBLAS_PROFILE_REPORT(" Entire %s call (DSP) took %8.2f us\n","cblas_sspr", (float) clock_diff);
153 return ;
154 }
156 #ifdef __cplusplus
157 catch (Error err)
158 {
159 ti_cblas_error(err.what(),err.err());
160 return ;
161 }
162 #endif
163 }