2c72d9474929a643c70c70fa2f772e360e85b650
[dense-linear-algebra-libraries/linalg.git] / src / ti / linalg / blasblisacc / src / ti_cblas_mem_config.c
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2 * Copyright (c) 2013-2015, Texas Instruments Incorporated - http://www.ti.com/
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28 #ifdef TI_CBLAS_DEBUG
29 #include <stdio.h>
30 #include <ti/csl/csl_chipAux.h>
31 #include <ti/csl/csl_idmaAux.h>
32 #endif
33 #include "../../ticblas/ticblas.h"
34 #include <libarch.h>
36 extern void bli_init();
37 extern void bli_finalize();
39 #ifdef TI_CBLAS_DEBUG
40 int malloc_size;
41 extern lib_memdscr_t * blas_memdscr_tab[4];
42 #endif
44 int bli_l3_mem_config(void *msmc_buf, size_t msmc_buf_size, void *ddr_buf, size_t ddr_buf_size, size_t *l1D_SRAM_size_orig, size_t *l2_SRAM_size_orig)
45 {
46 size_t smem_size_vfast, smem_size_fast, smem_size_med, smem_size_slow;
47 void *l1d_SRAM_ptr, *l2_SRAM_ptr;
48 int l1d_cfg_err, l2_cfg_err, blas_ret_err_code;
50 #ifdef TI_CBLAS_DEBUG
51 malloc_size = 0;
52 printf("Memory buffers passed to bli_l3_mem_config are: MSMC base 0x%x, size %d, DDR base 0x%x, size%d.\n", (unsigned int)msmc_buf, msmc_buf_size, (unsigned int) ddr_buf, ddr_buf_size);
53 printf("Before calling BLIS, malloc_size is %d.\n", malloc_size);
54 #endif
56 /* First, verify the provided/available memory meet requirements */
57 tiCblasGetSizes(&smem_size_vfast, &smem_size_fast, &smem_size_med, &smem_size_slow);
59 if( (smem_size_vfast> lib_get_L1D_total_size()) /* total available L1D */
60 ||(smem_size_fast > lib_get_L2_total_size()) /* total available L2 */
61 ||(smem_size_med > msmc_buf_size) /* provided MSMC memory */
62 ||(smem_size_slow > ddr_buf_size) /* provided DDR memory */
63 ) {
64 return(TICBLAS_ERROR);
65 }
67 /* Configure L1D if necessary */
68 *l1D_SRAM_size_orig = lib_get_L1D_SRAM_size(); /* get current L1D SRAM size */
69 l1d_cfg_err = LIB_CACHE_SUCCESS;
71 #ifdef TI_CBLAS_DEBUG
72 printf("Original L1D SRAM size is: %d\n", *l1D_SRAM_size_orig);
73 printf("Required L1D SRAM size is: %d\n", smem_size_vfast);
74 #endif
76 if(*l1D_SRAM_size_orig < smem_size_vfast) { /* configure L1D if needs more SRAM */
77 /*printf("Configuring L1D SRAM on all cores.\n");*/
78 #pragma omp parallel
79 {
80 l1d_cfg_err = lib_L1D_config_SRAM(smem_size_vfast);
81 }
82 }
84 #ifdef TI_CBLAS_DEBUG
85 #pragma omp parallel
86 {
87 int core_id = lib_get_coreID();
88 }
89 #endif
91 /* Configure L2 if necessary */
92 *l2_SRAM_size_orig = lib_get_L2_SRAM_size(); /* get current L2 SRAM size */
93 l2_cfg_err = LIB_CACHE_SUCCESS;
95 #ifdef TI_CBLAS_DEBUG
96 printf("Original L2 SRAM size is: %d\n", *l2_SRAM_size_orig);
97 printf("Required L2 SRAM size is: %d\n", smem_size_fast);
98 #endif
100 if(*l2_SRAM_size_orig < smem_size_fast) { /* configure L2 if needs more SRAM */
101 #pragma omp parallel
102 {
103 l2_cfg_err = lib_L2_config_SRAM(smem_size_fast);
104 }
105 }
107 if(l1d_cfg_err || l2_cfg_err) {
108 return(TICBLAS_ERROR);
109 }
111 #ifdef TI_CBLAS_DEBUG
112 printf("New L2 SRAM size is: %d\n", lib_get_L2_SRAM_size());
113 #endif
115 /* get L1D and L2 SRAM base address */
116 l1d_SRAM_ptr = lib_get_L1D_SRAM_base();
117 l2_SRAM_ptr = lib_get_L2_SRAM_base();
119 #ifdef TI_CBLAS_DEBUG
120 printf("L1D SRAM base address is 0x%x.\n", (unsigned int)l1d_SRAM_ptr);
121 printf("L2 SRAM base address is 0x%x.\n", (unsigned int) l2_SRAM_ptr);
122 printf("MSMC SRAM address is 0x%x.\n", (unsigned int) msmc_buf);
123 #endif
125 /* pass allocated memories for heap initialization */
126 blas_ret_err_code = tiCblasInit(l1d_SRAM_ptr, smem_size_vfast,
127 l2_SRAM_ptr, smem_size_fast,
128 msmc_buf, msmc_buf_size,
129 ddr_buf, ddr_buf_size);
131 #ifdef TI_CBLAS_DEBUG
132 if(blas_ret_err_code == TICBLAS_SUCCESS) {
133 printf("Before calling BLIS, memory descriptor base is 0x%x, used is %d.\n", blas_memdscr_tab[3]->base, blas_memdscr_tab[3]->used);
134 }
135 else {
136 printf("BLAS init error.\n");
137 }
138 #endif
140 return(blas_ret_err_code);
141 } /* bli_l3_mem_config */
143 /*==============================================================================
144 * This function reconfigures L1D and L2 after processing is finished
145 *============================================================================*/
146 int bli_l3_mem_reconfig(size_t l1D_SRAM_size_orig, size_t l2_SRAM_size_orig)
147 {
148 int l1d_cfg_err, l2_cfg_err;
150 #ifdef TI_CBLAS_DEBUG
151 printf("After calling BLIS, malloc_size is %d.\n", malloc_size);
152 printf("After calling BLIS, used_size in memory descriptor is %d.\n", blas_memdscr_tab[3]->used);
153 #endif
155 /* configure L1D back if necessary */
156 l1d_cfg_err = LIB_CACHE_SUCCESS;
157 if(l1D_SRAM_size_orig!=lib_get_L1D_SRAM_size()) {
158 #pragma omp parallel
159 {
160 l1d_cfg_err = lib_L1D_config_SRAM(l1D_SRAM_size_orig);
161 }
162 }
163 if(l1d_cfg_err != LIB_CACHE_SUCCESS) {
164 return(-3);
165 }
167 /* configure L2 back if necessary */
168 l2_cfg_err = LIB_CACHE_SUCCESS;
169 if(l2_SRAM_size_orig != lib_get_L2_SRAM_size()) {
170 #pragma omp parallel
171 {
172 l2_cfg_err = lib_L2_config_SRAM(l2_SRAM_size_orig);
173 }
174 }
175 if(l2_cfg_err != LIB_CACHE_SUCCESS) {
176 return(-4);
177 }
179 return(TICBLAS_SUCCESS);
180 } /* bli_l3_mem_reconfig */
182 /*==============================================================================
183 * This function initializes BLIS before first CBLAS call is made.
184 *============================================================================*/
185 void ti_bli_init_dsp(char *l3_buf, char *l2_buf)
186 {
187 #ifdef TI_CBLAS_DEBUG
188 printf("In function ti_bli_init_dsp, l3_buff is 0x%x, l2_buf is 0x%x.\n", (unsigned int)l3_buf, (unsigned int)l2_buf);
190 malloc_size = 0;
191 printf("Before calling bli_init, malloc_size is %d.\n", malloc_size);
192 #endif
194 tiCblasNew();
196 #ifdef TI_CBLAS_DEBUG
197 printf("After calling bli_init, malloc_size is %d.\n", malloc_size);
198 #endif
199 }
201 /*==============================================================================
202 * This function frees all memories allocated by ti_bli_init_dsp.
203 *============================================================================*/
204 void ti_bli_finalize_dsp(void)
205 {
206 tiCblasDelete();
207 }
209 /* Nothing after this line */