index a024be828c48f3d9da279759c599c73991afde7e..9e48c9d36b52ad5f95121d052cd81690f3dd33b9 100644 (file)
@@ -44,20 +44,19 @@ void cblas_dtbsv(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo, const
if (!ti_cblas_init_done) ti_cblas_init();
TI_CBLAS_DEBUG_PRINT("Intercepted call to %s\n", "cblas_dtbsv");
- TI_CBLAS_PROFILE_START();
-
+ TI_CBLAS_PROFILE_START();
/* Dynamic condtional offload to ARM */
- if ((TI_CBLAS_L2_OFFLOAD == TI_CBLAS_OFFLOAD_NONE)) {
- TI_CBLAS_DEBUG_PRINT("Executing ARM %s\n", "cblas_dtbsv");
- __real_cblas_dtbsv(order,Uplo,TransA,Diag,N,K,A,lda,X,incX);
- TI_CBLAS_PROFILE_REPORT(" Entire %s call (ARM) took %8.2f us\n","cblas_dtbsv", (float) clock_diff);
- return ;
- }
- /* End ARM offload */
+ if ((TI_CBLAS_L2_OFFLOAD == TI_CBLAS_OFFLOAD_NONE)) {
+ TI_CBLAS_DEBUG_PRINT("Executing ARM %s\n", "cblas_dtbsv");
+ __real_cblas_dtbsv(order,Uplo,TransA,Diag,N,K,A,lda,X,incX);
+ TI_CBLAS_PROFILE_REPORT(" Entire %s call (ARM) took %8.2f us\n","cblas_dtbsv", (float) clock_diff);
+ return ;
+ }
+ /* End ARM offload */
/******************************************************************/
/* DSP offload WILL be done if control reaches here */
- TI_CBLAS_DEBUG_PRINT("Offloading to DSP %s\n", "cblas_dtbsv");
+ TI_CBLAS_DEBUG_PRINT("Offloading to DSP %s\n", "cblas_dtbsv");
/* Lookup kernel pointer from global table */
#ifdef __cplusplus
#endif
{
-
#ifdef __cplusplus
__K->setArg(0, order);
#else
@@ -165,6 +163,7 @@ void cblas_dtbsv(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo, const
TI_CBLAS_OCL_CHKERROR("clReleaseEvent",err);
#endif
+
ti_cblas_delete_kernel(__K);
TI_CBLAS_DEBUG_PRINT("Finished executing %s\n", "cblas_dtbsv");