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raw | patch | inline | side by side (parent: 001a0fc)
raw | patch | inline | side by side (parent: 001a0fc)
author | Jianzhong Xu <xuj@ti.com> | |
Thu, 24 Mar 2016 20:07:22 +0000 (16:07 -0400) | ||
committer | Jianzhong Xu <xuj@ti.com> | |
Thu, 24 Mar 2016 20:07:22 +0000 (16:07 -0400) |
2. Replaced TSCL=0 with lib_clock_enable().
3. Minor change to medium memory model.
3. Minor change to medium memory model.
18 files changed:
index 02c0ebd13d7ac1356427f937bbe51cec0de966a1..bbded82a7308faa1ef844099136c2adf93f7ad9d 100644 (file)
#ifdef SOC_C6678
//#define BLAS_L2_BUF_SIZE (220*1024UL) /* 220KB SRAM is available in L2 for C6678 EVM */
#define BLAS_L2_BUF_SIZE (256*1024UL) /* 256KB SRAM is available in L2 for C6678 EVM */
-#define BLAS_MSMC_BUF_SIZE (2*1024*1024UL) /* reserve 2MB for BLAS */
+#define BLAS_MSMC_BUF_SIZE (5*512*1024UL) /* reserve 2.5MB for BLAS */
#define BLAS_L3_DDR_SIZE (5120)
#else
# if SOC_K2H
diff --git a/src/ti/linalg/blis/config/c66x/bli_kernel.h b/src/ti/linalg/blis/config/c66x/bli_kernel.h
index 59993769e15d6108ab17721dce9ea482dd410ea6..96cdbf6364b128c8eb94471334726f91da77c407 100755 (executable)
#define BLIS_DEFAULT_3M_NC_Z 100
#elif defined (MEM_MODEL_MEDIUM)
-
-#define BLIS_DEFAULT_MC_S 144
-#define BLIS_DEFAULT_KC_S 400 //320 good // 240 good // 428 error
+#define BLIS_DEFAULT_MC_S 128
+#define BLIS_DEFAULT_KC_S 440
#define BLIS_DEFAULT_NC_S 1224
-#define BLIS_DEFAULT_MC_D 140
+#define BLIS_DEFAULT_MC_D 120
#define BLIS_DEFAULT_KC_D 220
#define BLIS_DEFAULT_NC_D 1184
#define BLIS_DEFAULT_KC_Z 178
#define BLIS_DEFAULT_NC_Z 736
-#define BLIS_DEFAULT_4M_MC_C 140
-#define BLIS_DEFAULT_4M_KC_C 220
+#define BLIS_DEFAULT_4M_MC_C 128
+#define BLIS_DEFAULT_4M_KC_C 224
#define BLIS_DEFAULT_4M_NC_C 1184
-#define BLIS_DEFAULT_4M_MC_Z 86
-#define BLIS_DEFAULT_4M_KC_Z 178
+#define BLIS_DEFAULT_4M_MC_Z 84
+#define BLIS_DEFAULT_4M_KC_Z 168
#define BLIS_DEFAULT_4M_NC_Z 736
#define BLIS_DEFAULT_3M_MC_C 88
-#define BLIS_DEFAULT_3M_KC_C 220
+#define BLIS_DEFAULT_3M_KC_C 200
#define BLIS_DEFAULT_3M_NC_C 792
#define BLIS_DEFAULT_3M_MC_Z 56
-#define BLIS_DEFAULT_3M_KC_Z 178
+#define BLIS_DEFAULT_3M_KC_Z 168
#define BLIS_DEFAULT_3M_NC_Z 488
#elif defined(MEM_MODEL_SMALL)
diff --git a/src/ti/linalg/blis/frame/3/gemm/bli_gemm_int.c b/src/ti/linalg/blis/frame/3/gemm/bli_gemm_int.c
index af1ba8d8600fe8c28ff743b9ea117221b8762e54..9fe0e3c773da4217644fafdffc9fdff7b142c70c 100644 (file)
impl_t i;
FUNCPTR_T f;
#if defined(BLIS_ENABLE_PROFILE)
- volatile uint64_t counter_start;
- volatile uint64_t counter_end;
+ uint64_t counter_start;
+ uint64_t counter_end;
extern profile_data_t *bli_gemm_profile_data;
dim_t m_var, k_var, n_var;
dim_t index;
n_var = bli_obj_width( c_local );
#if defined(BLIS_ENABLE_C66X_BUILD)
- TSCL = 0;
- counter_start = lib_clock64();
+ lib_clock_enable();
+ counter_start = lib_clock_read();
#else
counter_start = (uint64_t) (bli_clock()*1.2e9);
#endif
#if defined(BLIS_ENABLE_PROFILE)
#if defined(BLIS_ENABLE_C66X_BUILD)
- counter_end = lib_clock64();
+ counter_end = lib_clock_read();
#else
counter_end = (uint64_t) (bli_clock()*1.2e9);
#endif
diff --git a/src/ti/linalg/blis/frame/3/gemm/bli_gemm_ker_var2.c b/src/ti/linalg/blis/frame/3/gemm/bli_gemm_ker_var2.c
index 43d2d05be5e6da4ddf99764bd45f77e4ac15b046..d96ae503a6ed82d43ed7e48cfef5d8cd8cdcfa61 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_gemm_profile_data; \
/*
Assumptions/assertions:
/* initiate first c transfer */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
n_cur = ( bli_is_not_edge_f( jr_thread_id, n_iter, n_left ) ? NR : n_left ); \
if(cs_c*sizeof(ctype) < BLIS_C66X_MAXDMASTRIDE) \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = ir_thread_id; i < m_iter; i += ir_num_threads ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_gemm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*m_cur*k*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_gemm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND],\
(counter_end_mr-counter_start_mr), (uint64_t) 2*m*k*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_gemm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND], \
(counter_end_nr-counter_start_nr), 2*m*k*n); \
} \
/* initiate first c transfer */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
\
for ( j = jr_thread_id; j < n_iter; j += jr_num_threads ) \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = ir_thread_id; i < m_iter; i += ir_num_threads ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_gemm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND], \
(counter_end_ker-counter_start_ker), 2*m_cur*k*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_gemm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*m*k*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_gemm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND], \
(counter_end_nr-counter_start_nr), 2*m*k*n); \
} \
diff --git a/src/ti/linalg/blis/frame/3/herk/bli_herk_int.c b/src/ti/linalg/blis/frame/3/herk/bli_herk_int.c
index b548fef4d368bde329d71ce8dea48056ee685797..2f7a5f4d833242bb75e143bdd8e8c92e5175f9f2 100644 (file)
bool_t uplo;
FUNCPTR_T f;
#if defined(BLIS_ENABLE_PROFILE)
- volatile uint64_t counter_start;
- volatile uint64_t counter_end;
+ uint64_t counter_start;
+ uint64_t counter_end;
extern profile_data_t *bli_herk_profile_data;
dim_t m_var, k_var, n_var;
dim_t index;
n_var = bli_obj_width_after_trans( ah_local );
#if defined(BLIS_ENABLE_C66X_BUILD)
- TSCL = 0;
- counter_start = lib_clock64();
+ lib_clock_enable();
+ counter_start = lib_clock_read();
#else
counter_start = (uint64_t) (bli_clock()*1.2e9);
#endif
#if defined(BLIS_ENABLE_PROFILE)
#if defined(BLIS_ENABLE_C66X_BUILD)
- counter_end = lib_clock64();
+ counter_end = lib_clock_read();
#else // if not DSP
counter_end = (uint64_t) (bli_clock()*1.2e9);
#endif
diff --git a/src/ti/linalg/blis/frame/3/herk/bli_herk_l_ker_var2.c b/src/ti/linalg/blis/frame/3/herk/bli_herk_l_ker_var2.c
index 2af25bbcf0c2f36d786b2479703b9fa622c738ac..0ffd2b4b6cd6ba1c831039b878c3e75bd3f16f97 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_herk_profile_data; \
\
/*
diagoffc_j = diagoffc - (doff_t) jr_thread_id * NR; \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
/*if ( diagoffc_j < 0 ) \
{ \
}\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
/* Interior loop over the m dimension (MR rows at a time). */ \
for ( i = ir_thread_id; i < m_iter_new; i += ir_num_threads ) \
{ \
ctype* restrict a2; \
\
- /*TSCL=0; \
- counter_start = TSCL;*/ \
+ /*lib_clock_enable(); \
+ counter_start = lib_clock_read();*/ \
/*a1 = a_cast + i * rstep_a; \
c11 = c1 + i * rstep_c;*/ \
a1 = a1_new + i * rstep_a; \
{ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
/* Invoke the gemm micro-kernel. */ \
gemm_ukr_cast( k, \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_herk_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
{ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
/* Handle interior and edge cases separately. */ \
if ( m_cur == MR && n_cur == NR ) \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_herk_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND], \
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_herk_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*mc_new*k*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_herk_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND], \
(counter_end_nr-counter_start_nr), 2*mc_new*k*n); \
} \
diff --git a/src/ti/linalg/blis/frame/3/herk/bli_herk_u_ker_var2.c b/src/ti/linalg/blis/frame/3/herk/bli_herk_u_ker_var2.c
index 12eafec36d962631133597d5823c890d48cfd13d..8cb6ae02962695233b7fdb8b1b8346c46523dc55 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_herk_profile_data; \
\
/*
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
\
if (cs_c*sizeof(ctype) < BLIS_C66X_MAXDMASTRIDE) \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
\
for ( i = ir_thread_id; i < m_iter; i += ir_num_threads ) \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
\
/* Invoke the gemm micro-kernel. */ \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_herk_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND], \
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
\
/* Handle interior and edge cases separately. */ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_herk_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND], \
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_herk_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*m*k*n_cur); \
} \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_herk_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND],\
(counter_end_nr-counter_start_nr), 2*m*k*n); \
} \
diff --git a/src/ti/linalg/blis/frame/3/trmm/bli_trmm_int.c b/src/ti/linalg/blis/frame/3/trmm/bli_trmm_int.c
index 71f38f9ed094affc089595d45f112145dba737cb..cf4a566f02d94e1728380aa521e4cb5784c055d1 100644 (file)
FUNCPTR_T f;
#if defined(BLIS_ENABLE_PROFILE)
- volatile uint64_t counter_start;
- volatile uint64_t counter_end;
+ uint64_t counter_start;
+ uint64_t counter_end;
extern profile_data_t *bli_trmm_profile_data;
dim_t m_var, k_var, n_var;
dim_t index;
bli_set_dim_with_side( side, m_var, n_var, k_var );
#if defined(BLIS_ENABLE_C66X_BUILD)
- TSCL = 0;
- counter_start = lib_clock64();
+ lib_clock_enable();
+ counter_start = lib_clock_read();
#else
counter_start = (uint64_t) (bli_clock()*1.2e9);
#endif
#if defined(BLIS_ENABLE_PROFILE)
#if defined(BLIS_ENABLE_C66X_BUILD)
- counter_end = lib_clock64();
+ counter_end = lib_clock_read();
#else
counter_end = (uint64_t) (bli_clock()*1.2e9);
#endif
diff --git a/src/ti/linalg/blis/frame/3/trmm/bli_trmm_ll_ker_var2.c b/src/ti/linalg/blis/frame/3/trmm/bli_trmm_ll_ker_var2.c
index 883ae2a71980718fd6a75e4a8fb2bc3f337991e0..0d288a99cf75370a8b2701c6c0a45122b93efb16 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_trmm_profile_data; \
/*
Assumptions/assertions:
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
\
n_cur = ( bli_is_not_edge_f( 0, n_iter, n_left ) ? NR : n_left ); \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
\
/* Loop over the m dimension (MR rows at a time). */ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND], \
(counter_end_ker-counter_start_ker), 2*k_a1011*m_cur*n_cur); \
} \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND],\
(counter_end_mr-counter_start_mr), 2*k*m*n_cur); \
} \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND],\
(counter_end_nr-counter_start_nr), 2*k*m*n); \
} \
diff --git a/src/ti/linalg/blis/frame/3/trmm/bli_trmm_lu_ker_var2.c b/src/ti/linalg/blis/frame/3/trmm/bli_trmm_lu_ker_var2.c
index e5c36e417d8d6bf4ce641549c3e5d72c9073f76e..24c65d79e20253f12e5e1da6143cb3ebab6fc193 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_trmm_profile_data; \
\
/*
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
\
n_cur = ( bli_is_not_edge_f( 0, n_iter, n_left ) ? NR : n_left ); \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
\
/* Loop over the m dimension (MR rows at a time). */ \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
\
/* Handle interior and edge cases separately. */ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k_a1112*m_cur*n_cur); \
} \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
\
/* Handle interior and edge cases separately. */ \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
} /*for ( i = 0; i < m_iter; ++i )*/\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k*m*n_cur); \
} \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND], \
(counter_end_nr-counter_start_nr), 2*k*m*n); \
} \
diff --git a/src/ti/linalg/blis/frame/3/trmm/bli_trmm_rl_ker_var2.c b/src/ti/linalg/blis/frame/3/trmm/bli_trmm_rl_ker_var2.c
index 1a102e40d6890459898860b55a22ba14ff31a9f0..d66e6e016001bebd556c86604f20120b27c35757 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_trmm_profile_data; \
\
/*
/* Loop over the n dimension (NR columns at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
/* Transfering MC(=m)xNR*/ \
if (cs_c*sizeof(ctype) < BLIS_C66X_MAXDMASTRIDE) \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = 0; i < m_iter; ++i ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- /*TSCL=0;*/ \
- counter_start_ker = TSCL; \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker),2*k_b1121*m_cur*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = TSCL; \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k_b1121*m*n_cur); \
} \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = 0; i < m_iter; ++i ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND], \
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
/*printf("gemm %d %d %d %ld\n", MR, NR, k, (counter_end_ker-counter_start_ker));*/ \
} /*for i*/\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k*m*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND], \
(counter_end_nr-counter_start_nr), 2*k*m*n); \
} \
diff --git a/src/ti/linalg/blis/frame/3/trmm/bli_trmm_ru_ker_var2.c b/src/ti/linalg/blis/frame/3/trmm/bli_trmm_ru_ker_var2.c
index 8d23b56e30ceaefa99c3b2d58cc11f52322c58aa..17cf468cf979cdbdfcf8a247cfd4326e41b9bc25 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_trmm_profile_data; \
\
/*
/* Loop over the n dimension (NR columns at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
/* Transfering MC(=m)xNR*/ \
if (cs_c*sizeof(ctype) < BLIS_C66X_MAXDMASTRIDE) \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = 0; i < m_iter; ++i ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k_b0111*m_cur*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k_b0111*m*n_cur); \
} \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = 0; i < m_iter; ++i ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND], \
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k*m*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_trmm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND], \
(counter_end_nr-counter_start_nr), 2*k*m*n); \
} \
diff --git a/src/ti/linalg/blis/frame/3/trsm/bli_trsm_blk_var1b.c b/src/ti/linalg/blis/frame/3/trsm/bli_trsm_blk_var1b.c
index 9dc5bead6acd9ebaa9a5f334fd8c1d229e3e2352..c6154d12a717428956ad12bbc5812e3510643566 100644 (file)
#ifdef BLIS_ENABLE_C66X_EDMA
dim_t b_alg_next;
#endif
- volatile int counter_start;
- volatile int counter_end;
+#ifdef BLIS_ENABLE_CYCLE_COUNT
+ uint64_t counter_start;
+ uint64_t counter_end;
+#endif
// printf("blk_var1b\n");
// Initialize object for packing B.
#endif
// Perform trsm subproblem.
- //TSCL = 0;
- //counter_start = TSCL;
+#ifdef BLIS_ENABLE_CYCLE_COUNT
+ lib_clock_enable();
+ counter_start = lib_clock_read();
+#endif
bli_trsm_int( &BLIS_ONE,
a1_pack,
b_pack,
cntl_sub_trsm( cntl ),
trsm_thread_sub_trsm( thread ) );
- //counter_end = TSCL;
- //if(lib_get_coreID()==0)
+#ifdef BLIS_ENABLE_CYCLE_COUNT
+ counter_end = lib_clock_read();
+ if(lib_get_coreID()==0)
{
- //printf("%d\n", (counter_end-counter_start));
+ printf("%d\n", (counter_end-counter_start));
}
-
+#endif
#ifdef BLIS_ENABLE_C66X_EDMA
bli_obj_alias_to(c2, c1);
#endif
diff --git a/src/ti/linalg/blis/frame/3/trsm/bli_trsm_int.c b/src/ti/linalg/blis/frame/3/trsm/bli_trsm_int.c
index 050e962ae286542ae9d2601cb1c43fc5c3795c06..fb64717e9f575d8a378aa7ba807ef286b20a17fa 100644 (file)
FUNCPTR_T f;
#if defined(BLIS_ENABLE_PROFILE)
- volatile uint64_t counter_start;
- volatile uint64_t counter_end;
+ uint64_t counter_start;
+ uint64_t counter_end;
extern profile_data_t *bli_trsm_profile_data;
dim_t m_var, k_var, n_var;
dim_t index;
bli_set_dim_with_side( side, m_var, n_var, k_var );
#if defined(BLIS_ENABLE_C66X_BUILD)
- TSCL = 0;
- counter_start = lib_clock64();
+ lib_clock_enable();
+ counter_start = lib_clock_read();
#else
counter_start = (uint64_t) (bli_clock()*1.2e9);
#endif
#if defined(BLIS_ENABLE_PROFILE)
#if defined(BLIS_ENABLE_C66X_BUILD)
- counter_end = lib_clock64();
+ counter_end = lib_clock_read();
#else
counter_end = (uint64_t) (bli_clock()*1.2e9);
#endif
diff --git a/src/ti/linalg/blis/frame/3/trsm/bli_trsm_rl_ker_var2.c b/src/ti/linalg/blis/frame/3/trsm/bli_trsm_rl_ker_var2.c
index ac0b20eee6e1ddd354b7a940a0bcda476d2ee7dd..2bd31192b152f6d17db5615fbb561f1cb20ad3e1 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_trsm_profile_data; \
/*
Assumptions/assertions:
n_cur = ( bli_is_not_edge_f( 0, n_iter, n_left ) ? NR : n_left ); \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
\
if(rs_c == 1) \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = 0; i < m_iter; ++i ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k_b21*m_cur*n_cur); \
} \
} /*MR loop*/\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k*m*n_cur); \
} \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
\
for ( i = 0; i < m_iter; ++i ) \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if (BLIS_ENABLE_C66X_IDMA_KERVAR2 == 1) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k*m*n_cur); \
} \
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND], \
(counter_end_nr-counter_start_nr), 2*k*m*n); \
} \
diff --git a/src/ti/linalg/blis/frame/3/trsm/bli_trsm_ru_ker_var2.c b/src/ti/linalg/blis/frame/3/trsm/bli_trsm_ru_ker_var2.c
index 14848dd60d9d1684d95b68de99c9d88a0d895013..9bcfbdba9fad469ac3eebda1d574ed43725bfe12 100644 (file)
lib_emt_Handle emt_handle_c1 = NULL; \
\
/*For DSP timing*/ \
- volatile uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
- volatile uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
+ uint64_t counter_start_ker, counter_start_nr, counter_start_mr; \
+ uint64_t counter_end_ker, counter_end_nr, counter_end_mr; \
extern profile_data_t *bli_trsm_profile_data; \
/*
Assumptions/assertions:
\
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_nr = lib_clock64(); \
+ counter_start_nr = lib_clock_read(); \
} \
n_cur = ( bli_is_not_edge_f( 0, n_iter, n_left ) ? NR : n_left ); \
if(rs_c == 1) \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = 0; i < m_iter; ++i ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k_b01*m_cur*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k*m*n_cur); \
} \
/* Loop over the m dimension (MR rows at a time). */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_mr = lib_clock64(); \
+ counter_start_mr = lib_clock_read(); \
} \
for ( i = 0; i < m_iter; ++i ) \
{ \
/* Handle interior and edge cases separately. */ \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_start_ker = lib_clock64(); \
+ counter_start_ker = lib_clock_read(); \
} \
if ( m_cur == MR && n_cur == NR ) \
{ \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_ker = lib_clock64(); \
+ counter_end_ker = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_KER_LOOP_IND],\
(counter_end_ker-counter_start_ker), 2*k*m_cur*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_mr = lib_clock64(); \
+ counter_end_mr = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_IR_LOOP_IND], \
(counter_end_mr-counter_start_mr), 2*k*m*n_cur); \
} \
} \
if (BLIS_ENABLE_PROFILE_KERVAR2 == 1) \
{ \
- counter_end_nr = lib_clock64(); \
+ counter_end_nr = lib_clock_read(); \
bli_profile_data_update(bli_trsm_profile_data[bli_get_thread_num()+BLIS_MAX_NUM_THREADS*BLIS_PROFILE_JR_LOOP_IND], \
(counter_end_nr-counter_start_nr), 2*k*m*n); \
} \
index bf521d0267571b90bc4aef50c00e1023bb30ca27..f1ee815792b243b45024469d9e30cd50672219bb 100755 (executable)
void* ptr_dest;
#ifdef BLIS_ENABLE_CYCLE_COUNT
- volatile int counter_start;
- volatile int counter_end;
+ uint64_t counter_start;
+ uint64_t counter_end;
#endif
m_root = bli_obj_length( *(bli_obj_root( *a )) );
}
#ifdef BLIS_ENABLE_CYCLE_COUNT
- TSCL = 0;
- counter_start = TSCL;
-#endif
-#ifdef BLIS_ENABLE_CYCLE_COUNT
- counter_end = TSCL;
+ lib_clock_enable();
+ counter_start = lib_clock_read();
+ counter_end = lib_clock_read();
printf("Cache invalidate %d \n", counter_end-counter_start);
#endif
{
int status = -100;
#ifdef BLIS_ENABLE_CYCLE_COUNT
- TSCL = 0;
- counter_start = TSCL;
+ lib_clock_enable();
+ counter_start = lib_clock_read();
#endif
// The destination object contains the EDMA handle
status = lib_emt_copy2D2D ( p->emt_handle,
ld_dest
);
#ifdef BLIS_ENABLE_CYCLE_COUNT
- counter_end = TSCL;
+ counter_end = lib_clock_read();
printf("DMA start %d \n", counter_end-counter_start);
#endif
diff --git a/src/ti/linalg/blis/testsuite/input.general b/src/ti/linalg/blis/testsuite/input.general
index 27e3bc1a6c803352a540e274dd7077f46bd33c02..25420bc7b5034fdabd0cf61ed6016f49a16d11e4 100644 (file)
# 'r' = rowvec / unit stride; 'i' = rowvec / non-unit stride
0 # Test all combinations of storage schemes?
32 # General stride spacing (for cases when testing general stride)
-sdcz # Datatype(s) to test:
+sdcz # Datatype(s) to test:
# 's' = single real; 'c' = single complex;
# 'd' = double real; 'z' = double complex
-500 # Problem size: first to test
+500 # Problem size: first to test
2500 # Problem size: maximum to test
-500 # Problem size: increment between experiments
+500 # Problem size: increment between experiments
# Complex level-3 implementations
0 # 3mh ('1' = enable; '0' = disable)
0 # 3m ('1' = enable; '0' = disable)
# '0' = disable error checking; '1' = full error checking
i # Reaction to test failure:
# 'i' = ignore; 's' = sleep() and continue; 'a' = abort
-1 # Output results in matlab/octave format? ('1' = yes; '0' = no)
+0 # Output results in matlab/octave format? ('1' = yes; '0' = no)
1 # Output results to stdout AND files? ('1' = yes; '0' = no)