From: Jianzhong Xu Date: Mon, 3 Sep 2018 20:24:35 +0000 (-0400) Subject: Explicitly specify header files to be included in zip file. X-Git-Url: https://git.ti.com/gitweb?p=ep-processor-libraries%2Fdsplib.git;a=commitdiff_plain;h=bf5a51cba462c5cb03ed20a6a1bb1bd16c0683e1 Explicitly specify header files to be included in zip file. --- diff --git a/ti/dsplib/package.bld b/ti/dsplib/package.bld index b5a9b29..f9f5bbb 100644 --- a/ti/dsplib/package.bld +++ b/ti/dsplib/package.bld @@ -249,10 +249,580 @@ Package.archiveFiles["CommonArchiveFiles"] = { "docs/manifest/manifest.xml.xdt", "setenv.bat", "setxdcpath.js", - ] }; + Package.archiveFiles["headers"] = { + base_directory: "./src/", + files: [ + "DSPF_sp_minerr/c66/DSPF_sp_minerr_cn.h", + "DSPF_sp_minerr/c66/DSPF_sp_minerr.h", + "DSPF_sp_minerr/DSPF_sp_minerr.h", + "DSPF_sp_minerr/c674/DSPF_sp_minerr_cn.h", + "DSPF_sp_minerr/c674/DSPF_sp_minerr.h", + "DSPF_sp_mat_mul/c66/DSPF_sp_mat_mul.h", + "DSPF_sp_mat_mul/c66/DSPF_sp_mat_mul_cn.h", + "DSPF_sp_mat_mul/DSPF_sp_mat_mul.h", + "DSPF_sp_mat_mul/c674/DSPF_sp_mat_mul.h", + "DSPF_sp_mat_mul/c674/DSPF_sp_mat_mul_cn.h", + "DSP_ifft16x16_imre/c66/DSP_ifft16x16_imre.h", + "DSP_ifft16x16_imre/c66/DSP_ifft16x16_imre_cn.h", + "DSP_ifft16x16_imre/c66/gen_twiddle_ifft16x16_imre.h", + "DSP_ifft16x16_imre/DSP_ifft16x16_imre.h", + "DSP_ifft16x16_imre/c64P/DSP_ifft16x16_imre.h", + "DSP_ifft16x16_imre/c64P/DSP_ifft16x16_imre_cn.h", + "DSP_ifft16x16_imre/c64P/gen_twiddle_ifft16x16_imre.h", + "DSP_ifft16x16_imre/c64P/DSP_ifft16x16_imre_i.h", + "DSP_maxidx/c66/DSP_maxidx.h", + "DSP_maxidx/c66/DSP_maxidx_cn.h", + "DSP_maxidx/DSP_maxidx.h", + "DSP_maxidx/c64P/DSP_maxidx.h", + "DSP_maxidx/c64P/DSP_maxidx_cn.h", + "DSP_iir_lat/c66/DSP_iir_lat_cn.h", + "DSP_iir_lat/c66/DSP_iir_lat.h", + "DSP_iir_lat/DSP_iir_lat.h", + "DSP_iir_lat/c64P/DSP_iir_lat_cn.h", + "DSP_iir_lat/c64P/DSP_iir_lat.h", + "DSP_fft16x32/c66/DSP_fft16x32.h", + "DSP_fft16x32/c66/gen_twiddle_fft16x32.h", + "DSP_fft16x32/c66/DSP_fft16x32_cn.h", + "DSP_fft16x32/DSP_fft16x32.h", + "DSP_fft16x32/c64P/DSP_fft16x32.h", + "DSP_fft16x32/c64P/gen_twiddle_fft16x32.h", + "DSP_fft16x32/c64P/DSP_fft16x32_i.h", + "DSP_fft16x32/c64P/DSP_fft16x32_cn.h", + "DSPF_dp_lud_inv/c66/DSPF_dp_lud_inv.h", + "DSPF_dp_lud_inv/c66/DSPF_dp_lud_inv_cn.h", + "DSPF_dp_lud_inv/DSPF_dp_lud_inv.h", + "DSP_neg32/c66/DSP_neg32_cn.h", + "DSP_neg32/c66/DSP_neg32.h", + "DSP_neg32/c64P/DSP_neg32_cn.h", + "DSP_neg32/c64P/DSP_neg32.h", + "DSP_neg32/DSP_neg32.h", + "DSPF_sp_iirlat/c66/DSPF_sp_iirlat.h", + "DSPF_sp_iirlat/c66/DSPF_sp_iirlat_cn.h", + "DSPF_sp_iirlat/c674/DSPF_sp_iirlat.h", + "DSPF_sp_iirlat/c674/DSPF_sp_iirlat_cn.h", + "DSPF_sp_iirlat/DSPF_sp_iirlat.h", + "DSP_recip16/c66/DSP_recip16.h", + "DSP_recip16/c66/DSP_recip16_cn.h", + "DSP_recip16/DSP_recip16.h", + "DSP_recip16/c64P/DSP_recip16.h", + "DSP_recip16/c64P/DSP_recip16_cn.h", + "DSPF_dp_cholesky_cmplx/c66/DSPF_dp_cholesky_cmplx_cn.h", + "DSPF_dp_cholesky_cmplx/c66/DSPF_dp_cholesky_cmplx.h", + "DSPF_dp_cholesky_cmplx/DSPF_dp_cholesky_cmplx.h", + "DSP_autocor/c66/DSP_autocor_cn.h", + "DSP_autocor/c66/DSP_autocor.h", + "DSP_autocor/c64P/DSP_autocor_cn.h", + "DSP_autocor/c64P/DSP_autocor.h", + "DSP_autocor/DSP_autocor.h", + "DSP_fft16x16_imre/c66/DSP_fft16x16_imre_cn.h", + "DSP_fft16x16_imre/c66/gen_twiddle_fft16x16_imre.h", + "DSP_fft16x16_imre/c66/DSP_fft16x16_imre.h", + "DSP_fft16x16_imre/c64P/DSP_fft16x16_imre_cn.h", + "DSP_fft16x16_imre/c64P/DSP_fft16x16_imre_i.h", + "DSP_fft16x16_imre/c64P/gen_twiddle_fft16x16_imre.h", + "DSP_fft16x16_imre/c64P/DSP_fft16x16_imre.h", + "DSP_fft16x16_imre/DSP_fft16x16_imre.h", + "DSP_mat_trans/c66/DSP_mat_trans_cn.h", + "DSP_mat_trans/c66/DSP_mat_trans.h", + "DSP_mat_trans/DSP_mat_trans.h", + "DSP_mat_trans/c64P/DSP_mat_trans_cn.h", + "DSP_mat_trans/c64P/DSP_mat_trans.h", + "DSP_maxval/c66/DSP_maxval_cn.h", + "DSP_maxval/c66/DSP_maxval.h", + "DSP_maxval/DSP_maxval.h", + "DSP_maxval/c64P/DSP_maxval_cn.h", + "DSP_maxval/c64P/DSP_maxval.h", + "DSPF_sp_vecsum_sq/c66/DSPF_sp_vecsum_sq_cn.h", + "DSPF_sp_vecsum_sq/c66/DSPF_sp_vecsum_sq.h", + "DSPF_sp_vecsum_sq/c674/DSPF_sp_vecsum_sq_cn.h", + "DSPF_sp_vecsum_sq/c674/DSPF_sp_vecsum_sq.h", + "DSPF_sp_vecsum_sq/DSPF_sp_vecsum_sq.h", + "DSPF_sp_vecmul/c66/DSPF_sp_vecmul_cn.h", + "DSPF_sp_vecmul/c66/DSPF_sp_vecmul.h", + "DSPF_sp_vecmul/c674/DSPF_sp_vecmul_cn.h", + "DSPF_sp_vecmul/c674/DSPF_sp_vecmul.h", + "DSPF_sp_vecmul/DSPF_sp_vecmul.h", + "DSPF_dp_mat_submat_copy/c66/DSPF_dp_mat_submat_copy.h", + "DSPF_dp_mat_submat_copy/c66/DSPF_dp_mat_submat_copy_cn.h", + "DSPF_dp_mat_submat_copy/DSPF_dp_mat_submat_copy.h", + "DSP_dotprod/c66/DSP_dotprod_cn.h", + "DSP_dotprod/c66/DSP_dotprod.h", + "DSP_dotprod/c64P/DSP_dotprod_cn.h", + "DSP_dotprod/c64P/DSP_dotprod.h", + "DSP_dotprod/DSP_dotprod.h", + "DSPF_sp_lud_inv_cmplx/c66/DSPF_sp_lud_inv_cmplx_cn.h", + "DSPF_sp_lud_inv_cmplx/c66/DSPF_sp_lud_inv_cmplx.h", + "DSPF_sp_lud_inv_cmplx/DSPF_sp_lud_inv_cmplx.h", + "DSPF_sp_lud/c66/DSPF_sp_lud.h", + "DSPF_sp_lud/c66/DSPF_sp_lud_cn.h", + "DSPF_sp_lud/DSPF_sp_lud.h", + "DSPF_sp_ifftSPxSP/c66/DSPF_sp_ifftSPxSP_cn.h", + "DSPF_sp_ifftSPxSP/c66/DSPF_sp_ifftSPxSP.h", + "DSPF_sp_ifftSPxSP/c66/DSPF_sp_ifftSPxSP_opt.h", + "DSPF_sp_ifftSPxSP/DSPF_sp_ifftSPxSP.h", + "DSPF_sp_ifftSPxSP/c674/DSPF_sp_ifftSPxSP_cn.h", + "DSPF_sp_ifftSPxSP/c674/DSPF_sp_ifftSPxSP.h", + "DSPF_dp_lud_sol/c66/DSPF_dp_lud_sol_cn.h", + "DSPF_dp_lud_sol/c66/DSPF_dp_lud_sol.h", + "DSPF_dp_lud_sol/DSPF_dp_lud_sol.h", + "DSPF_sp_w_vec/c66/DSPF_sp_w_vec.h", + "DSPF_sp_w_vec/c66/DSPF_sp_w_vec_cn.h", + "DSPF_sp_w_vec/DSPF_sp_w_vec.h", + "DSPF_sp_w_vec/c674/DSPF_sp_w_vec.h", + "DSPF_sp_w_vec/c674/DSPF_sp_w_vec_cn.h", + "DSPF_sp_svd/c66/DSPF_sp_svd_cn.h", + "DSPF_sp_svd/c66/DSPF_sp_svd.h", + "DSPF_sp_svd/DSPF_sp_svd.h", + "DSP_dotp_sqr/c66/DSP_dotp_sqr_cn.h", + "DSP_dotp_sqr/c66/DSP_dotp_sqr.h", + "DSP_dotp_sqr/DSP_dotp_sqr.h", + "DSP_dotp_sqr/c64P/DSP_dotp_sqr_cn.h", + "DSP_dotp_sqr/c64P/DSP_dotp_sqr.h", + "DSPF_dp_cholesky/c66/DSPF_dp_cholesky.h", + "DSPF_dp_cholesky/c66/DSPF_dp_cholesky_cn.h", + "DSPF_dp_cholesky/DSPF_dp_cholesky.h", + "DSP_blk_eswap64/c66/DSP_blk_eswap64.h", + "DSP_blk_eswap64/c66/DSP_blk_eswap64_cn.h", + "DSP_blk_eswap64/DSP_blk_eswap64.h", + "DSP_blk_eswap64/c64P/DSP_blk_eswap64.h", + "DSP_blk_eswap64/c64P/DSP_blk_eswap64_cn.h", + "DSP_ifft16x32/c66/DSP_ifft16x32_cn.h", + "DSP_ifft16x32/c66/DSP_ifft16x32.h", + "DSP_ifft16x32/c66/gen_twiddle_ifft16x32.h", + "DSP_ifft16x32/DSP_ifft16x32.h", + "DSP_ifft16x32/c64P/DSP_ifft16x32_i.h", + "DSP_ifft16x32/c64P/DSP_ifft16x32_cn.h", + "DSP_ifft16x32/c64P/DSP_ifft16x32.h", + "DSP_ifft16x32/c64P/gen_twiddle_fft16x32.h", + "DSP_fir_r8_h24/c66/DSP_fir_r8_h24.h", + "DSP_fir_r8_h24/c66/DSP_fir_r8_h24_cn.h", + "DSP_fir_r8_h24/c674/DSP_fir_r8_h24.h", + "DSP_fir_r8_h24/c674/DSP_fir_r8_h24_cn.h", + "DSP_fir_r8_h24/DSP_fir_r8_h24.h", + "DSPF_dp_qrd/c66/DSPF_dp_qrd.h", + "DSPF_dp_qrd/c66/DSPF_dp_qrd_cn.h", + "DSPF_dp_qrd/DSPF_dp_qrd.h", + "DSPF_sp_biquad/c66/DSPF_sp_biquad.h", + "DSPF_sp_biquad/c66/DSPF_sp_biquad_cn.h", + "DSPF_sp_biquad/DSPF_sp_biquad.h", + "DSPF_sp_biquad/c674/DSPF_sp_biquad.h", + "DSPF_sp_biquad/c674/DSPF_sp_biquad_cn.h", + "DSPF_sp_fir_gen/c66/DSPF_sp_fir_gen_cn.h", + "DSPF_sp_fir_gen/c66/DSPF_sp_fir_gen.h", + "DSPF_sp_fir_gen/c674/DSPF_sp_fir_gen_cn.h", + "DSPF_sp_fir_gen/c674/DSPF_sp_fir_gen.h", + "DSPF_sp_fir_gen/DSPF_sp_fir_gen.h", + "DSPF_sp_fftSPxSP_r2c/c66/DSPF_sp_fftSPxSP_r2c_cn.h", + "DSPF_sp_fftSPxSP_r2c/c66/DSPF_sp_fftSPxSP_r2c.h", + "DSPF_sp_fftSPxSP_r2c/DSPF_sp_fftSPxSP_r2c.h", + "DSP_ifft32x32/c66/DSP_ifft32x32.h", + "DSP_ifft32x32/c66/DSP_ifft32x32_cn.h", + "DSP_ifft32x32/c66/gen_twiddle_ifft32x32.h", + "DSP_ifft32x32/DSP_ifft32x32.h", + "DSP_ifft32x32/c64P/gen_twiddle_fft32x32.h", + "DSP_ifft32x32/c64P/DSP_ifft32x32.h", + "DSP_ifft32x32/c64P/DSP_ifft32x32_cn.h", + "DSP_ifft32x32/c64P/DSP_ifft32x32_i.h", + "DSPF_sp_erand/c66/DSPF_sp_erand_cn.h", + "DSPF_sp_erand/c66/DSPF_sp_erand.h", + "DSPF_sp_erand/DSPF_sp_erand.h", + "DSP_bexp/c66/DSP_bexp.h", + "DSP_bexp/c66/DSP_bexp_cn.h", + "DSP_bexp/DSP_bexp.h", + "DSP_bexp/c64P/DSP_bexp.h", + "DSP_bexp/c64P/DSP_bexp_cn.h", + "DSPF_sp_urand/c66/DSPF_sp_urand.h", + "DSPF_sp_urand/c66/DSPF_sp_urand_cn.h", + "DSPF_sp_urand/DSPF_sp_urand.h", + "DSP_fltoq15/c66/DSP_fltoq15.h", + "DSP_fltoq15/c66/DSP_fltoq15_cn.h", + "DSP_fltoq15/DSP_fltoq15.h", + "DSP_fltoq15/c64P/DSP_fltoq15.h", + "DSP_fltoq15/c64P/DSP_fltoq15_cn.h", + "DSP_urand16/c66/DSP_urand16.h", + "DSP_urand16/c66/DSP_urand16_cn.h", + "DSP_urand16/DSP_urand16.h", + "DSP_iir/c66/DSP_iir_cn.h", + "DSP_iir/c66/DSP_iir.h", + "DSP_iir/c64P/DSP_iir_cn.h", + "DSP_iir/c64P/DSP_iir.h", + "DSP_iir/DSP_iir.h", + "DSP_urand32/c66/DSP_urand32.h", + "DSP_urand32/c66/DSPF_sp_math_i.h", + "DSP_urand32/c66/DSP_urand32_cn.h", + "DSP_urand32/DSP_urand32.h", + "DSP_fft32x32s/c66/DSP_fft32x32s.h", + "DSP_fft32x32s/c66/DSP_fft32x32s_cn.h", + "DSP_fft32x32s/c66/gen_twiddle_fft32x32s.h", + "DSP_fft32x32s/DSP_fft32x32s.h", + "DSP_fft32x32s/c64P/gen_twiddle_fft32x32.h", + "DSP_fft32x32s/c64P/DSP_fft32x32s.h", + "DSP_fft32x32s/c64P/DSP_fft32x32s_i.h", + "DSP_fft32x32s/c64P/DSP_fft32x32s_cn.h", + "DSP_fir_r8_h8/c66/DSP_fir_r8_h8.h", + "DSP_fir_r8_h8/c66/DSP_fir_r8_h8_cn.h", + "DSP_fir_r8_h8/DSP_fir_r8_h8.h", + "DSP_fir_r8_h8/c674/DSP_fir_r8_h8.h", + "DSP_fir_r8_h8/c674/DSP_fir_r8_h8_cn.h", + "DSP_blk_eswap16/c66/DSP_blk_eswap16_cn.h", + "DSP_blk_eswap16/c66/DSP_blk_eswap16.h", + "DSP_blk_eswap16/DSP_blk_eswap16.h", + "DSP_blk_eswap16/c64P/DSP_blk_eswap16_cn.h", + "DSP_blk_eswap16/c64P/DSP_blk_eswap16.h", + "DSPF_sp_qrd_cmplx/c66/DSPF_sp_qrd_cmplx_cn.h", + "DSPF_sp_qrd_cmplx/c66/DSPF_sp_qrd_cmplx.h", + "DSPF_sp_qrd_cmplx/DSPF_sp_qrd_cmplx.h", + "DSPF_blk_eswap64/c674/DSPF_blk_eswap64_cn.h", + "DSPF_blk_eswap64/c674/DSPF_blk_eswap64.h", + "DSPF_blk_eswap64/DSPF_blk_eswap64.h", + "DSP_fir_sym/c66/DSP_fir_sym_cn.h", + "DSP_fir_sym/c66/DSP_fir_sym.h", + "DSP_fir_sym/DSP_fir_sym.h", + "DSP_fir_sym/c64P/DSP_fir_sym_cn.h", + "DSP_fir_sym/c64P/DSP_fir_sym.h", + "DSP_fir_r8_h16/c66/DSP_fir_r8_h16.h", + "DSP_fir_r8_h16/c66/DSP_fir_r8_h16_cn.h", + "DSP_fir_r8_h16/DSP_fir_r8_h16.h", + "DSP_fir_r8_h16/c674/DSP_fir_r8_h16.h", + "DSP_fir_r8_h16/c674/DSP_fir_r8_h16_cn.h", + "DSPF_sp_ifftSPxSP_c2r/c66/DSPF_sp_ifftSPxSP_c2r_cn.h", + "DSPF_sp_ifftSPxSP_c2r/c66/DSPF_sp_ifftSPxSP_c2r.h", + "DSPF_sp_ifftSPxSP_c2r/DSPF_sp_ifftSPxSP_c2r.h", + "DSPF_sp_lms/c66/DSPF_sp_lms_cn.h", + "DSPF_sp_lms/c66/DSPF_sp_lms.h", + "DSPF_sp_lms/DSPF_sp_lms.h", + "DSPF_sp_lms/c674/DSPF_sp_lms_cn.h", + "DSPF_sp_lms/c674/DSPF_sp_lms.h", + "DSPF_sp_vecrecip/c66/DSPF_sp_vecrecip.h", + "DSPF_sp_vecrecip/c66/DSPF_sp_vecrecip_cn.h", + "DSPF_sp_vecrecip/DSPF_sp_vecrecip.h", + "DSPF_sp_vecrecip/c674/DSPF_sp_vecrecip.h", + "DSPF_sp_vecrecip/c674/DSPF_sp_vecrecip_cn.h", + "DSPF_sp_dotprod/c66/DSPF_sp_dotprod_cn.h", + "DSPF_sp_dotprod/c66/DSPF_sp_dotprod.h", + "DSPF_sp_dotprod/DSPF_sp_dotprod.h", + "DSPF_sp_dotprod/c674/DSPF_sp_dotprod_cn.h", + "DSPF_sp_dotprod/c674/DSPF_sp_dotprod.h", + "DSPF_sp_bitrev_cplx/c66/DSPF_sp_bitrev_cplx.h", + "DSPF_sp_bitrev_cplx/c66/DSPF_sp_bitrev_cplx_cn.h", + "DSPF_sp_bitrev_cplx/DSPF_sp_bitrev_cplx.h", + "DSPF_sp_bitrev_cplx/c674/DSPF_sp_bitrev_cplx.h", + "DSPF_sp_bitrev_cplx/c674/DSPF_sp_bitrev_cplx_cn.h", + "DSPF_dp_svd/c66/DSPF_dp_svd_cn.h", + "DSPF_dp_svd/c66/DSPF_dp_svd.h", + "DSPF_dp_svd/DSPF_dp_svd.h", + "DSPF_dp_svd_cmplx/c66/DSPF_dp_svd_cmplx_cn.h", + "DSPF_dp_svd_cmplx/c66/DSPF_dp_svd_cmplx.h", + "DSPF_dp_svd_cmplx/DSPF_dp_svd_cmplx.h", + "DSPF_dp_lud_sol_cmplx/c66/DSPF_dp_lud_sol_cmplx.h", + "DSPF_dp_lud_sol_cmplx/c66/DSPF_dp_lud_sol_cmplx_cn.h", + "DSPF_dp_lud_sol_cmplx/DSPF_dp_lud_sol_cmplx.h", + "DSPF_sp_minval/c66/DSPF_sp_minval.h", + "DSPF_sp_minval/c66/DSPF_sp_minval_cn.h", + "DSPF_sp_minval/DSPF_sp_minval.h", + "DSPF_sp_minval/c674/DSPF_sp_minval.h", + "DSPF_sp_minval/c674/DSPF_sp_minval_cn.h", + "DSP_iir_ss/c66/DSP_iir_ss_cn.h", + "DSP_iir_ss/c66/DSP_iir_ss.h", + "DSP_iir_ss/DSP_iir_ss.h", + "DSP_iir_ss/c64P/DSP_iir_ss_cn.h", + "DSP_iir_ss/c64P/DSP_iir_ss.h", + "DSPF_sp_cholesky_cmplx/c66/DSPF_sp_cholesky_cmplx.h", + "DSPF_sp_cholesky_cmplx/c66/DSPF_sp_cholesky_cmplx_cn.h", + "DSPF_sp_cholesky_cmplx/DSPF_sp_cholesky_cmplx.h", + "DSPF_sp_mat_mul_cplx/c66/DSPF_sp_mat_mul_cplx_cn.h", + "DSPF_sp_mat_mul_cplx/c66/DSPF_sp_mat_mul_cplx.h", + "DSPF_sp_mat_mul_cplx/DSPF_sp_mat_mul_cplx.h", + "DSPF_sp_mat_mul_cplx/c674/DSPF_sp_mat_mul_cplx_cn.h", + "DSPF_sp_mat_mul_cplx/c674/DSPF_sp_mat_mul_cplx.h", + "DSP_fir_gen_hM17_rA8X8/c66/DSP_fir_gen_hM17_rA8X8.h", + "DSP_fir_gen_hM17_rA8X8/c66/DSP_fir_gen_hM17_rA8X8_cn.h", + "DSP_fir_gen_hM17_rA8X8/DSP_fir_gen_hM17_rA8X8.h", + "DSP_fir_gen_hM17_rA8X8/c64P/DSP_fir_gen_hM17_rA8X8.h", + "DSP_fir_gen_hM17_rA8X8/c64P/DSP_fir_gen_hM17_rA8X8_cn.h", + "DSPF_sp_convol/c66/DSPF_sp_convol_cn.h", + "DSPF_sp_convol/c66/DSPF_sp_convol.h", + "DSPF_sp_convol/c674/DSPF_sp_convol_cn.h", + "DSPF_sp_convol/c674/DSPF_sp_convol.h", + "DSPF_sp_convol/DSPF_sp_convol.h", + "DSPF_sp_cfftr2_dit/c674/DSPF_sp_cfftr2_dit_cn.h", + "DSPF_sp_cfftr2_dit/c674/DSPF_sp_cfftr2_dit.h", + "DSPF_sp_cfftr2_dit/DSPF_sp_cfftr2_dit.h", + "DSP_fft16x16/c66/gen_twiddle_fft16x16.h", + "DSP_fft16x16/c66/DSP_fft16x16_cn.h", + "DSP_fft16x16/c66/DSP_fft16x16.h", + "DSP_fft16x16/DSP_fft16x16.h", + "DSP_fft16x16/c64P/gen_twiddle_fft16x16.h", + "DSP_fft16x16/c64P/DSP_fft16x16_i.h", + "DSP_fft16x16/c64P/DSP_fft16x16_cn.h", + "DSP_fft16x16/c64P/DSP_fft16x16.h", + "DSPF_blk_eswap32/DSPF_blk_eswap32.h", + "DSPF_blk_eswap32/c674/DSPF_blk_eswap32.h", + "DSPF_blk_eswap32/c674/DSPF_blk_eswap32_cn.h", + "DSPF_sp_vecadd/c66/DSPF_sp_vecadd.h", + "DSPF_sp_vecadd/c66/DSPF_sp_vecadd_cn.h", + "DSPF_sp_vecadd/DSPF_sp_vecadd.h", + "DSP_minerror/c66/DSP_minerror.h", + "DSP_minerror/c66/DSP_minerror_cn.h", + "DSP_minerror/DSP_minerror.h", + "DSP_minerror/c64P/DSP_minerror.h", + "DSP_minerror/c64P/DSP_minerror_cn.h", + "DSPF_sp_mat_submat_copy/c66/DSPF_sp_mat_submat_copy_cn.h", + "DSPF_sp_mat_submat_copy/c66/DSPF_sp_mat_submat_copy.h", + "DSPF_sp_mat_submat_copy/DSPF_sp_mat_submat_copy.h", + "DSPF_sp_fir_cplx/c66/DSPF_sp_fir_cplx.h", + "DSPF_sp_fir_cplx/c66/DSPF_sp_fir_cplx_cn.h", + "DSPF_sp_fir_cplx/c674/DSPF_sp_fir_cplx.h", + "DSPF_sp_fir_cplx/c674/DSPF_sp_fir_cplx_cn.h", + "DSPF_sp_fir_cplx/DSPF_sp_fir_cplx.h", + "DSPF_sp_dotp_cplx/c66/DSPF_sp_dotp_cplx_cn.h", + "DSPF_sp_dotp_cplx/c66/DSPF_sp_dotp_cplx.h", + "DSPF_sp_dotp_cplx/DSPF_sp_dotp_cplx.h", + "DSPF_sp_dotp_cplx/c674/DSPF_sp_dotp_cplx_cn.h", + "DSPF_sp_dotp_cplx/c674/DSPF_sp_dotp_cplx.h", + "DSPF_sp_cholesky/c66/DSPF_sp_cholesky_cn.h", + "DSPF_sp_cholesky/c66/DSPF_sp_cholesky.h", + "DSPF_sp_cholesky/DSPF_sp_cholesky.h", + "DSPF_dp_ifftDPxDP/c66/DSPF_dp_ifftDPxDP_cn.h", + "DSPF_dp_ifftDPxDP/c66/DSPF_dp_ifftDPxDP.h", + "DSPF_dp_ifftDPxDP/DSPF_dp_ifftDPxDP.h", + "DSPF_dp_lud_cmplx/c66/DSPF_dp_lud_cmplx.h", + "DSPF_dp_lud_cmplx/c66/DSPF_dp_lud_cmplx_cn.h", + "DSPF_dp_lud_cmplx/DSPF_dp_lud_cmplx.h", + "DSP_mat_mul_cplx/c66/DSP_mat_mul_cplx.h", + "DSP_mat_mul_cplx/c66/DSP_mat_mul_cplx_cn.h", + "DSP_mat_mul_cplx/DSP_mat_mul_cplx.h", + "DSP_mat_mul_cplx/c64P/DSP_mat_mul_cplx.h", + "DSP_mat_mul_cplx/c64P/DSP_mat_mul_cplx_cn.h", + "DSP_mul32/c66/DSP_mul32.h", + "DSP_mul32/c66/DSP_mul32_cn.h", + "DSP_mul32/DSP_mul32.h", + "DSP_mul32/c64P/DSP_mul32.h", + "DSP_mul32/c64P/DSP_mul32_cn.h", + "DSPF_sp_fircirc/c66/DSPF_sp_fircirc.h", + "DSPF_sp_fircirc/c66/DSPF_sp_fircirc_cn.h", + "DSPF_sp_fircirc/DSPF_sp_fircirc.h", + "DSPF_sp_fircirc/c674/DSPF_sp_fircirc.h", + "DSPF_sp_fircirc/c674/DSPF_sp_fircirc_cn.h", + "DSP_fir_r4/c66/DSP_fir_r4.h", + "DSP_fir_r4/c66/DSP_fir_r4_cn.h", + "DSP_fir_r4/DSP_fir_r4.h", + "DSP_fir_r4/c64P/DSP_fir_r4.h", + "DSP_fir_r4/c64P/DSP_fir_r4_cn.h", + "DSPF_sp_svd_cmplx/c66/DSPF_sp_svd_cmplx_cn.h", + "DSPF_sp_svd_cmplx/c66/DSPF_sp_svd_cmplx.h", + "DSPF_sp_svd_cmplx/DSPF_sp_svd_cmplx.h", + "DSPF_sp_cfftr4_dif/DSPF_sp_cfftr4_dif.h", + "DSPF_sp_cfftr4_dif/c674/DSPF_sp_cfftr4_dif.h", + "DSPF_sp_cfftr4_dif/c674/DSPF_sp_cfftr4_dif_cn.h", + "DSP_fir_r8/c66/DSP_fir_r8_cn.h", + "DSP_fir_r8/c66/DSP_fir_r8.h", + "DSP_fir_r8/DSP_fir_r8.h", + "DSP_fir_r8/c64P/DSP_fir_r8_cn.h", + "DSP_fir_r8/c64P/DSP_fir_r8.h", + "DSPF_sp_lud_sol_cmplx/c66/DSPF_sp_lud_sol_cmplx.h", + "DSPF_sp_lud_sol_cmplx/c66/DSPF_sp_lud_sol_cmplx_cn.h", + "DSPF_sp_lud_sol_cmplx/DSPF_sp_lud_sol_cmplx.h", + "DSPF_sp_mat_trans_cplx/c66/DSPF_sp_mat_trans_cplx_cn.h", + "DSPF_sp_mat_trans_cplx/c66/DSPF_sp_mat_trans_cplx.h", + "DSPF_sp_mat_trans_cplx/DSPF_sp_mat_trans_cplx.h", + "DSPF_dp_fftDPxDP/c66/DSPF_dp_fftDPxDP_cn.h", + "DSPF_dp_fftDPxDP/c66/DSPF_dp_fftDPxDP.h", + "DSPF_dp_fftDPxDP/DSPF_dp_fftDPxDP.h", + "DSP_q15tofl/c66/DSP_q15tofl_cn.h", + "DSP_q15tofl/c66/DSP_q15tofl.h", + "DSP_q15tofl/DSP_q15tofl.h", + "DSP_q15tofl/c64P/DSP_q15tofl_cn.h", + "DSP_q15tofl/c64P/DSP_q15tofl.h", + "DSPF_dp_mat_mul_gemm/c66/DSPF_dp_mat_mul_gemm.h", + "DSPF_dp_mat_mul_gemm/c66/DSPF_dp_mat_mul_gemm_cn.h", + "DSPF_dp_mat_mul_gemm/DSPF_dp_mat_mul_gemm.h", + "DSPF_fltoq15/DSPF_fltoq15.h", + "DSPF_fltoq15/c674/DSPF_fltoq15_cn.h", + "DSPF_fltoq15/c674/DSPF_fltoq15.h", + "DSP_vecsumsq/c66/DSP_vecsumsq_cn.h", + "DSP_vecsumsq/c66/DSP_vecsumsq.h", + "DSP_vecsumsq/DSP_vecsumsq.h", + "DSP_vecsumsq/c64P/DSP_vecsumsq_cn.h", + "DSP_vecsumsq/c64P/DSP_vecsumsq.h", + "DSPF_dp_mat_trans/c66/DSPF_dp_mat_trans.h", + "DSPF_dp_mat_trans/c66/DSPF_dp_mat_trans_cn.h", + "DSPF_dp_mat_trans/DSPF_dp_mat_trans.h", + "DSPF_sp_lud_cmplx/c66/DSPF_sp_lud_cmplx.h", + "DSPF_sp_lud_cmplx/c66/DSPF_sp_lud_cmplx_cn.h", + "DSPF_sp_lud_cmplx/DSPF_sp_lud_cmplx.h", + "DSPF_sp_autocor/c66/DSPF_sp_autocor.h", + "DSPF_sp_autocor/c66/DSPF_sp_autocor_cn.h", + "DSPF_sp_autocor/c674/DSPF_sp_autocor.h", + "DSPF_sp_autocor/c674/DSPF_sp_autocor_cn.h", + "DSPF_sp_autocor/DSPF_sp_autocor.h", + "DSPF_sp_mat_mul_gemm/c66/DSPF_sp_mat_mul_gemm_cn.h", + "DSPF_sp_mat_mul_gemm/c66/DSPF_sp_mat_mul_gemm.h", + "DSPF_sp_mat_mul_gemm/c674/DSPF_sp_mat_mul_gemm_cn.h", + "DSPF_sp_mat_mul_gemm/c674/DSPF_sp_mat_mul_gemm.h", + "DSPF_sp_mat_mul_gemm/DSPF_sp_mat_mul_gemm.h", + "DSPF_sp_iir/c66/DSPF_sp_iir_cn.h", + "DSPF_sp_iir/c66/DSPF_sp_iir.h", + "DSPF_sp_iir/c674/DSPF_sp_iir_cn.h", + "DSPF_sp_iir/c674/DSPF_sp_iir.h", + "DSPF_sp_iir/DSPF_sp_iir.h", + "DSP_fir_cplx/c66/DSP_fir_cplx.h", + "DSP_fir_cplx/c66/DSP_fir_cplx_cn.h", + "DSP_fir_cplx/DSP_fir_cplx.h", + "DSP_fir_cplx/c64P/DSP_fir_cplx.h", + "DSP_fir_cplx/c64P/DSP_fir_cplx_cn.h", + "DSP_blk_eswap32/c66/DSP_blk_eswap32_cn.h", + "DSP_blk_eswap32/c66/DSP_blk_eswap32.h", + "DSP_blk_eswap32/DSP_blk_eswap32.h", + "DSP_blk_eswap32/c64P/DSP_blk_eswap32_cn.h", + "DSP_blk_eswap32/c64P/DSP_blk_eswap32.h", + "DSPF_sp_blk_move/DSPF_sp_blk_move.h", + "DSPF_sp_blk_move/c674/DSPF_sp_blk_move.h", + "DSPF_sp_blk_move/c674/DSPF_sp_blk_move_cn.h", + "DSP_add16/c66/DSP_add16_cn.h", + "DSP_add16/c66/DSP_add16.h", + "DSP_add16/DSP_add16.h", + "DSP_add16/c64P/DSP_add16_cn.h", + "DSP_add16/c64P/DSP_add16.h", + "DSPF_sp_mat_submat_copy_cplx/c66/DSPF_sp_mat_submat_copy_cplx_cn.h", + "DSPF_sp_mat_submat_copy_cplx/c66/DSPF_sp_mat_submat_copy_cplx.h", + "DSPF_sp_mat_submat_copy_cplx/DSPF_sp_mat_submat_copy_cplx.h", + "DSPF_q15tofl/c674/DSPF_q15tofl_cn.h", + "DSPF_q15tofl/c674/DSPF_q15tofl.h", + "DSPF_q15tofl/DSPF_q15tofl.h", + "DSPF_sp_lud_sol/c66/DSPF_sp_lud_sol.h", + "DSPF_sp_lud_sol/c66/DSPF_sp_lud_sol_cn.h", + "DSPF_sp_lud_sol/DSPF_sp_lud_sol.h", + "DSP_fir_r8_hM16_rM8A8X8/c66/DSP_fir_r8_hM16_rM8A8X8_cn.h", + "DSP_fir_r8_hM16_rM8A8X8/c66/DSP_fir_r8_hM16_rM8A8X8.h", + "DSP_fir_r8_hM16_rM8A8X8/DSP_fir_r8_hM16_rM8A8X8.h", + "DSP_fir_r8_hM16_rM8A8X8/c64P/DSP_fir_r8_hM16_rM8A8X8_cn.h", + "DSP_fir_r8_hM16_rM8A8X8/c64P/DSP_fir_r8_hM16_rM8A8X8.h", + "DSP_ifft16x16/c66/DSP_ifft16x16_cn.h", + "DSP_ifft16x16/c66/DSP_ifft16x16.h", + "DSP_ifft16x16/c66/gen_twiddle_ifft16x16.h", + "DSP_ifft16x16/DSP_ifft16x16.h", + "DSP_ifft16x16/c64P/DSP_ifft16x16_cn.h", + "DSP_ifft16x16/c64P/DSP_ifft16x16.h", + "DSP_ifft16x16/c64P/DSP_ifft16x16_i.h", + "DSP_ifft16x16/c64P/gen_twiddle_ifft16x16.h", + "DSP_fft32x32/c66/DSP_fft32x32_cn.h", + "DSP_fft32x32/c66/gen_twiddle_fft32x32.h", + "DSP_fft32x32/c66/DSP_fft32x32.h", + "DSP_fft32x32/DSP_fft32x32.h", + "DSP_fft32x32/c64P/DSP_fft32x32_cn.h", + "DSP_fft32x32/c64P/gen_twiddle_fft32x32.h", + "DSP_fft32x32/c64P/DSP_fft32x32.h", + "DSP_fft32x32/c64P/DSP_fft32x32_i.h", + "DSPF_sp_maxval/c66/DSPF_sp_maxval_cn.h", + "DSPF_sp_maxval/c66/DSPF_sp_maxval.h", + "DSPF_sp_maxval/DSPF_sp_maxval.h", + "DSPF_sp_maxval/c674/DSPF_sp_maxval_cn.h", + "DSPF_sp_maxval/c674/DSPF_sp_maxval.h", + "DSPF_sp_qrd/c66/DSPF_sp_qrd_cn.h", + "DSPF_sp_qrd/c66/DSPF_sp_qrd.h", + "DSPF_sp_qrd/DSPF_sp_qrd.h", + "DSP_mat_mul/c66/DSP_mat_mul_cn.h", + "DSP_mat_mul/c66/DSP_mat_mul.h", + "DSP_mat_mul/DSP_mat_mul.h", + "DSP_mat_mul/c64P/DSP_mat_mul_cn.h", + "DSP_mat_mul/c64P/DSP_mat_mul.h", + "DSPF_blk_eswap16/DSPF_blk_eswap16.h", + "DSPF_blk_eswap16/c674/DSPF_blk_eswap16_cn.h", + "DSPF_blk_eswap16/c674/DSPF_blk_eswap16.h", + "DSPF_sp_icfftr2_dif/DSPF_sp_icfftr2_dif.h", + "DSPF_sp_icfftr2_dif/c674/DSPF_sp_icfftr2_dif.h", + "DSPF_sp_icfftr2_dif/c674/DSPF_sp_icfftr2_dif_cn.h", + "DSP_fir_gen/c66/DSP_fir_gen.h", + "DSP_fir_gen/c66/DSP_fir_gen_cn.h", + "DSP_fir_gen/DSP_fir_gen.h", + "DSP_fir_gen/c64P/DSP_fir_gen.h", + "DSP_fir_gen/c64P/DSP_fir_gen_cn.h", + "DSPF_sp_mat_mul_gemm_cplx/c66/DSPF_sp_mat_mul_gemm_cplx_cn.h", + "DSPF_sp_mat_mul_gemm_cplx/c66/DSPF_sp_mat_mul_gemm_cplx.h", + "DSPF_sp_mat_mul_gemm_cplx/DSPF_sp_mat_mul_gemm_cplx.h", + "DSPF_sp_mat_mul_gemm_cplx/c674/DSPF_sp_mat_mul_gemm_cplx_cn.h", + "DSPF_sp_mat_mul_gemm_cplx/c674/DSPF_sp_mat_mul_gemm_cplx.h", + "DSPF_sp_mat_trans/c66/DSPF_sp_mat_trans.h", + "DSPF_sp_mat_trans/c66/DSPF_sp_mat_trans_cn.h", + "DSPF_sp_mat_trans/DSPF_sp_mat_trans.h", + "DSPF_sp_mat_trans/c674/DSPF_sp_mat_trans.h", + "DSPF_sp_mat_trans/c674/DSPF_sp_mat_trans_cn.h", + "DSPF_sp_nrand/c66/DSPF_sp_nrand.h", + "DSPF_sp_nrand/c66/DSPF_sp_nrand_cn.h", + "DSPF_sp_nrand/DSPF_sp_nrand.h", + "DSPF_sp_lud_inv/c66/DSPF_sp_lud_inv.h", + "DSPF_sp_lud_inv/c66/DSPF_sp_lud_inv_cn.h", + "DSPF_sp_lud_inv/DSPF_sp_lud_inv.h", + "DSP_firlms2/c66/DSP_firlms2.h", + "DSP_firlms2/c66/DSP_firlms2_cn.h", + "DSP_firlms2/DSP_firlms2.h", + "DSP_firlms2/c64P/DSP_firlms2.h", + "DSP_firlms2/c64P/DSP_firlms2_cn.h", + "DSP_blk_move/c66/DSP_blk_move.h", + "DSP_blk_move/c66/DSP_blk_move_cn.h", + "DSP_blk_move/DSP_blk_move.h", + "DSP_blk_move/c64P/DSP_blk_move.h", + "DSP_blk_move/c64P/DSP_blk_move_cn.h", + "DSP_fft16x16r/c66/DSP_fft16x16r.h", + "DSP_fft16x16r/c66/gen_twiddle_fft16x16r.h", + "DSP_fft16x16r/c66/DSP_fft16x16r_cn.h", + "DSP_fft16x16r/DSP_fft16x16r.h", + "DSP_fft16x16r/c64P/gen_twiddle_fft16x16.h", + "DSP_fft16x16r/c64P/DSP_fft16x16r_i.h", + "DSP_fft16x16r/c64P/DSP_fft16x16r.h", + "DSP_fft16x16r/c64P/DSP_fft16x16r_cn.h", + "DSPF_sp_fftSPxSP/c66/DSPF_sp_fftSPxSP.h", + "DSPF_sp_fftSPxSP/c66/DSPF_sp_fftSPxSP_opt.h", + "DSPF_sp_fftSPxSP/c66/DSPF_sp_fftSPxSP_cn.h", + "DSPF_sp_fftSPxSP/DSPF_sp_fftSPxSP.h", + "DSPF_sp_fftSPxSP/c674/DSPF_sp_fftSPxSP.h", + "DSPF_sp_fftSPxSP/c674/DSPF_sp_fftSPxSP_cn.h", + "DSP_w_vec/c66/DSP_w_vec_cn.h", + "DSP_w_vec/c66/DSP_w_vec.h", + "DSP_w_vec/DSP_w_vec.h", + "DSP_w_vec/c64P/DSP_w_vec_cn.h", + "DSP_w_vec/c64P/DSP_w_vec.h", + "DSPF_sp_maxidx/c66/DSPF_sp_maxidx_cn.h", + "DSPF_sp_maxidx/c66/DSPF_sp_maxidx.h", + "DSPF_sp_maxidx/c674/DSPF_sp_maxidx_cn.h", + "DSPF_sp_maxidx/c674/DSPF_sp_maxidx.h", + "DSPF_sp_maxidx/DSPF_sp_maxidx.h", + "DSPF_dp_lud/c66/DSPF_dp_lud.h", + "DSPF_dp_lud/c66/DSPF_dp_lud_cn.h", + "DSPF_dp_lud/DSPF_dp_lud.h", + "DSP_add32/c66/DSP_add32.h", + "DSP_add32/c66/DSP_add32_cn.h", + "DSP_add32/DSP_add32.h", + "DSP_add32/c64P/DSP_add32.h", + "DSP_add32/c64P/DSP_add32_cn.h", + "DSPF_sp_fir_r2/c66/DSPF_sp_fir_r2.h", + "DSPF_sp_fir_r2/c66/DSPF_sp_fir_r2_cn.h", + "DSPF_sp_fir_r2/DSPF_sp_fir_r2.h", + "DSPF_sp_fir_r2/c674/DSPF_sp_fir_r2.h", + "DSPF_sp_fir_r2/c674/DSPF_sp_fir_r2_cn.h", + "DSPF_dp_qrd_cmplx/c66/DSPF_dp_qrd_cmplx_cn.h", + "DSPF_dp_qrd_cmplx/c66/DSPF_dp_qrd_cmplx.h", + "DSPF_dp_qrd_cmplx/DSPF_dp_qrd_cmplx.h", + "DSPF_dp_lud_inv_cmplx/c66/DSPF_dp_lud_inv_cmplx_cn.h", + "DSPF_dp_lud_inv_cmplx/c66/DSPF_dp_lud_inv_cmplx.h", + "DSPF_dp_lud_inv_cmplx/DSPF_dp_lud_inv_cmplx.h", + "DSP_minval/c66/DSP_minval_cn.h", + "DSP_minval/c66/DSP_minval.h", + "DSP_minval/c64P/DSP_minval_cn.h", + "DSP_minval/c64P/DSP_minval.h", + "DSP_minval/DSP_minval.h", + "DSP_fir_cplx_hM4X4/c66/DSP_fir_cplx_hM4X4.h", + "DSP_fir_cplx_hM4X4/c66/DSP_fir_cplx_hM4X4_cn.h", + "DSP_fir_cplx_hM4X4/DSP_fir_cplx_hM4X4.h", + "DSP_fir_cplx_hM4X4/c64P/DSP_fir_cplx_hM4X4.h", + "DSP_fir_cplx_hM4X4/c64P/DSP_fir_cplx_hM4X4_cn.h", + ] + }; + Package.archiveFiles["bundle"] = { base_directory: ".", delivery_type: "bundle",