1 /*
2 * armboot - Startup Code for ARM926EJS CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
7 *
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
34 #include <asm-offsets.h>
35 #include <config.h>
36 #include <common.h>
37 #include <version.h>
39 #if defined(CONFIG_OMAP1610)
40 #include <./configs/omap1510.h>
41 #elif defined(CONFIG_OMAP730)
42 #include <./configs/omap730.h>
43 #endif
45 /*
46 *************************************************************************
47 *
48 * Jump vector table as in table 3.1 in [1]
49 *
50 *************************************************************************
51 */
54 .globl _start
55 _start:
56 b reset
57 #ifdef CONFIG_PRELOADER
58 /* No exception handlers in preloader */
59 ldr pc, _hang
60 ldr pc, _hang
61 ldr pc, _hang
62 ldr pc, _hang
63 ldr pc, _hang
64 ldr pc, _hang
65 ldr pc, _hang
67 _hang:
68 .word do_hang
69 /* pad to 64 byte boundary */
70 .word 0x12345678
71 .word 0x12345678
72 .word 0x12345678
73 .word 0x12345678
74 .word 0x12345678
75 .word 0x12345678
76 .word 0x12345678
77 #else
78 ldr pc, _undefined_instruction
79 ldr pc, _software_interrupt
80 ldr pc, _prefetch_abort
81 ldr pc, _data_abort
82 ldr pc, _not_used
83 ldr pc, _irq
84 ldr pc, _fiq
86 _undefined_instruction:
87 .word undefined_instruction
88 _software_interrupt:
89 .word software_interrupt
90 _prefetch_abort:
91 .word prefetch_abort
92 _data_abort:
93 .word data_abort
94 _not_used:
95 .word not_used
96 _irq:
97 .word irq
98 _fiq:
99 .word fiq
101 #endif /* CONFIG_PRELOADER */
102 .balignl 16,0xdeadbeef
105 /*
106 *************************************************************************
107 *
108 * Startup Code (reset vector)
109 *
110 * do important init only if we don't start from memory!
111 * setup Memory and board specific bits prior to relocation.
112 * relocate armboot to ram
113 * setup stack
114 *
115 *************************************************************************
116 */
118 .globl _TEXT_BASE
119 _TEXT_BASE:
120 .word CONFIG_SYS_TEXT_BASE
122 /*
123 * These are defined in the board-specific linker script.
124 * Subtracting _start from them lets the linker put their
125 * relative position in the executable instead of leaving
126 * them null.
127 */
128 .globl _bss_start_ofs
129 _bss_start_ofs:
130 .word __bss_start - _start
132 .globl _bss_end_ofs
133 _bss_end_ofs:
134 .word _end - _start
136 #ifdef CONFIG_USE_IRQ
137 /* IRQ stack memory (calculated at run-time) */
138 .globl IRQ_STACK_START
139 IRQ_STACK_START:
140 .word 0x0badc0de
142 /* IRQ stack memory (calculated at run-time) */
143 .globl FIQ_STACK_START
144 FIQ_STACK_START:
145 .word 0x0badc0de
146 #endif
148 /* IRQ stack memory (calculated at run-time) + 8 bytes */
149 .globl IRQ_STACK_START_IN
150 IRQ_STACK_START_IN:
151 .word 0x0badc0de
153 /*
154 * the actual reset code
155 */
157 reset:
158 /*
159 * set the cpu to SVC32 mode
160 */
161 mrs r0,cpsr
162 bic r0,r0,#0x1f
163 orr r0,r0,#0xd3
164 msr cpsr,r0
166 /*
167 * we do sys-critical inits only at reboot,
168 * not when booting from ram!
169 */
170 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
171 bl cpu_init_crit
172 #endif
174 /* Set stackpointer in internal RAM to call board_init_f */
175 call_board_init_f:
176 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
177 ldr r0,=0x00000000
178 bl board_init_f
180 /*------------------------------------------------------------------------------*/
182 /*
183 * void relocate_code (addr_sp, gd, addr_moni)
184 *
185 * This "function" does not return, instead it continues in RAM
186 * after relocating the monitor code.
187 *
188 */
189 .globl relocate_code
190 relocate_code:
191 mov r4, r0 /* save addr_sp */
192 mov r5, r1 /* save addr of gd */
193 mov r6, r2 /* save addr of destination */
194 mov r7, r2 /* save addr of destination */
196 /* Set up the stack */
197 stack_setup:
198 mov sp, r4
200 adr r0, _start
201 ldr r2, _TEXT_BASE
202 ldr r3, _bss_start_ofs
203 add r2, r0, r3 /* r2 <- source end address */
204 cmp r0, r6
205 beq clear_bss
207 copy_loop:
208 ldmia r0!, {r9-r10} /* copy from source address [r0] */
209 stmia r6!, {r9-r10} /* copy to target address [r1] */
210 cmp r0, r2 /* until source end address [r2] */
211 blo copy_loop
213 #ifndef CONFIG_PRELOADER
214 /*
215 * fix .rel.dyn relocations
216 */
217 ldr r0, _TEXT_BASE /* r0 <- Text base */
218 sub r9, r7, r0 /* r9 <- relocation offset */
219 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
220 add r10, r10, r0 /* r10 <- sym table in FLASH */
221 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
222 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
223 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
224 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
225 fixloop:
226 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
227 add r0, r0, r9 /* r0 <- location to fix up in RAM */
228 ldr r1, [r2, #4]
229 and r8, r1, #0xff
230 cmp r8, #23 /* relative fixup? */
231 beq fixrel
232 cmp r8, #2 /* absolute fixup? */
233 beq fixabs
234 /* ignore unknown type of fixup */
235 b fixnext
236 fixabs:
237 /* absolute fix: set location to (offset) symbol value */
238 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
239 add r1, r10, r1 /* r1 <- address of symbol in table */
240 ldr r1, [r1, #4] /* r1 <- symbol value */
241 add r1, r9 /* r1 <- relocated sym addr */
242 b fixnext
243 fixrel:
244 /* relative fix: increase location by offset */
245 ldr r1, [r0]
246 add r1, r1, r9
247 fixnext:
248 str r1, [r0]
249 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
250 cmp r2, r3
251 blo fixloop
252 #endif
254 clear_bss:
255 #ifndef CONFIG_PRELOADER
256 ldr r0, _bss_start_ofs
257 ldr r1, _bss_end_ofs
258 ldr r3, _TEXT_BASE /* Text base */
259 mov r4, r7 /* reloc addr */
260 add r0, r0, r4
261 add r1, r1, r4
262 mov r2, #0x00000000 /* clear */
264 clbss_l:str r2, [r0] /* clear loop... */
265 add r0, r0, #4
266 cmp r0, r1
267 bne clbss_l
269 bl coloured_LED_init
270 bl red_LED_on
271 #endif
273 /*
274 * We are done. Do not return, instead branch to second part of board
275 * initialization, now running from RAM.
276 */
277 #ifdef CONFIG_NAND_SPL
278 ldr r0, _nand_boot_ofs
279 mov pc, r0
281 _nand_boot_ofs:
282 .word nand_boot
283 #else
284 ldr r0, _board_init_r_ofs
285 adr r1, _start
286 add lr, r0, r1
287 add lr, lr, r9
288 /* setup parameters for board_init_r */
289 mov r0, r5 /* gd_t */
290 mov r1, r7 /* dest_addr */
291 /* jump to it ... */
292 mov pc, lr
294 _board_init_r_ofs:
295 .word board_init_r - _start
296 #endif
298 _rel_dyn_start_ofs:
299 .word __rel_dyn_start - _start
300 _rel_dyn_end_ofs:
301 .word __rel_dyn_end - _start
302 _dynsym_start_ofs:
303 .word __dynsym_start - _start
305 /*
306 *************************************************************************
307 *
308 * CPU_init_critical registers
309 *
310 * setup important registers
311 * setup memory timing
312 *
313 *************************************************************************
314 */
315 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
316 cpu_init_crit:
317 /*
318 * flush v4 I/D caches
319 */
320 mov r0, #0
321 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
322 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
324 /*
325 * disable MMU stuff and caches
326 */
327 mrc p15, 0, r0, c1, c0, 0
328 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
329 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
330 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
331 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
332 mcr p15, 0, r0, c1, c0, 0
334 /*
335 * Go setup Memory and board specific bits prior to relocation.
336 */
337 mov ip, lr /* perserve link reg across call */
338 bl lowlevel_init /* go setup pll,mux,memory */
339 mov lr, ip /* restore link */
340 mov pc, lr /* back to my caller */
341 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
343 #ifndef CONFIG_PRELOADER
344 /*
345 *************************************************************************
346 *
347 * Interrupt handling
348 *
349 *************************************************************************
350 */
352 @
353 @ IRQ stack frame.
354 @
355 #define S_FRAME_SIZE 72
357 #define S_OLD_R0 68
358 #define S_PSR 64
359 #define S_PC 60
360 #define S_LR 56
361 #define S_SP 52
363 #define S_IP 48
364 #define S_FP 44
365 #define S_R10 40
366 #define S_R9 36
367 #define S_R8 32
368 #define S_R7 28
369 #define S_R6 24
370 #define S_R5 20
371 #define S_R4 16
372 #define S_R3 12
373 #define S_R2 8
374 #define S_R1 4
375 #define S_R0 0
377 #define MODE_SVC 0x13
378 #define I_BIT 0x80
380 /*
381 * use bad_save_user_regs for abort/prefetch/undef/swi ...
382 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
383 */
385 .macro bad_save_user_regs
386 @ carve out a frame on current user stack
387 sub sp, sp, #S_FRAME_SIZE
388 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
389 ldr r2, IRQ_STACK_START_IN
390 @ get values for "aborted" pc and cpsr (into parm regs)
391 ldmia r2, {r2 - r3}
392 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
393 add r5, sp, #S_SP
394 mov r1, lr
395 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
396 mov r0, sp @ save current stack into r0 (param register)
397 .endm
399 .macro irq_save_user_regs
400 sub sp, sp, #S_FRAME_SIZE
401 stmia sp, {r0 - r12} @ Calling r0-r12
402 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
403 add r8, sp, #S_PC
404 stmdb r8, {sp, lr}^ @ Calling SP, LR
405 str lr, [r8, #0] @ Save calling PC
406 mrs r6, spsr
407 str r6, [r8, #4] @ Save CPSR
408 str r0, [r8, #8] @ Save OLD_R0
409 mov r0, sp
410 .endm
412 .macro irq_restore_user_regs
413 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
414 mov r0, r0
415 ldr lr, [sp, #S_PC] @ Get PC
416 add sp, sp, #S_FRAME_SIZE
417 subs pc, lr, #4 @ return & move spsr_svc into cpsr
418 .endm
420 .macro get_bad_stack
421 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
423 str lr, [r13] @ save caller lr in position 0 of saved stack
424 mrs lr, spsr @ get the spsr
425 str lr, [r13, #4] @ save spsr in position 1 of saved stack
426 mov r13, #MODE_SVC @ prepare SVC-Mode
427 @ msr spsr_c, r13
428 msr spsr, r13 @ switch modes, make sure moves will execute
429 mov lr, pc @ capture return pc
430 movs pc, lr @ jump to next instruction & switch modes.
431 .endm
433 .macro get_irq_stack @ setup IRQ stack
434 ldr sp, IRQ_STACK_START
435 .endm
437 .macro get_fiq_stack @ setup FIQ stack
438 ldr sp, FIQ_STACK_START
439 .endm
440 #endif /* CONFIG_PRELOADER */
442 /*
443 * exception handlers
444 */
445 #ifdef CONFIG_PRELOADER
446 .align 5
447 do_hang:
448 ldr sp, _TEXT_BASE /* switch to abort stack */
449 1:
450 bl 1b /* hang and never return */
451 #else /* !CONFIG_PRELOADER */
452 .align 5
453 undefined_instruction:
454 get_bad_stack
455 bad_save_user_regs
456 bl do_undefined_instruction
458 .align 5
459 software_interrupt:
460 get_bad_stack
461 bad_save_user_regs
462 bl do_software_interrupt
464 .align 5
465 prefetch_abort:
466 get_bad_stack
467 bad_save_user_regs
468 bl do_prefetch_abort
470 .align 5
471 data_abort:
472 get_bad_stack
473 bad_save_user_regs
474 bl do_data_abort
476 .align 5
477 not_used:
478 get_bad_stack
479 bad_save_user_regs
480 bl do_not_used
482 #ifdef CONFIG_USE_IRQ
484 .align 5
485 irq:
486 get_irq_stack
487 irq_save_user_regs
488 bl do_irq
489 irq_restore_user_regs
491 .align 5
492 fiq:
493 get_fiq_stack
494 /* someone ought to write a more effiction fiq_save_user_regs */
495 irq_save_user_regs
496 bl do_fiq
497 irq_restore_user_regs
499 #else
501 .align 5
502 irq:
503 get_bad_stack
504 bad_save_user_regs
505 bl do_irq
507 .align 5
508 fiq:
509 get_bad_stack
510 bad_save_user_regs
511 bl do_fiq
513 #endif
514 #endif /* CONFIG_PRELOADER */