1 /*
2 * emif4.c
3 *
4 * AM33XX emif4 configuration file
5 *
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
16 * GNU General Public License for more details.
17 */
19 #include <common.h>
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/ddr_defs.h>
22 #include <asm/arch/hardware.h>
23 #include <asm/arch/clock.h>
24 #include <asm/arch/sys_proto.h>
25 #include <asm/io.h>
26 #include <asm/emif.h>
28 DECLARE_GLOBAL_DATA_PTR;
30 int dram_init(void)
31 {
32 /* dram_init must store complete ramsize in gd->ram_size */
33 gd->ram_size = get_ram_size(
34 (void *)CONFIG_SYS_SDRAM_BASE,
35 CONFIG_MAX_RAM_BANK_SIZE);
36 return 0;
37 }
39 void dram_init_banksize(void)
40 {
41 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
42 gd->bd->bi_dram[0].size = gd->ram_size;
43 }
46 #ifdef CONFIG_SPL_BUILD
47 static struct vtp_reg *vtpreg = (struct vtp_reg *)VTP0_CTRL_ADDR;
48 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
50 static void config_vtp(void)
51 {
52 writel(readl(&vtpreg->vtp0ctrlreg) | VTP_CTRL_ENABLE,
53 &vtpreg->vtp0ctrlreg);
54 writel(readl(&vtpreg->vtp0ctrlreg) & (~VTP_CTRL_START_EN),
55 &vtpreg->vtp0ctrlreg);
56 writel(readl(&vtpreg->vtp0ctrlreg) | VTP_CTRL_START_EN,
57 &vtpreg->vtp0ctrlreg);
59 /* Poll for READY */
60 while ((readl(&vtpreg->vtp0ctrlreg) & VTP_CTRL_READY) !=
61 VTP_CTRL_READY)
62 ;
63 }
65 void config_ddr(unsigned int pll, unsigned int ioctrl,
66 const struct ddr_data *data, const struct cmd_control *ctrl,
67 const struct emif_regs *regs)
68 {
69 enable_emif_clocks();
70 ddr_pll_config(pll);
71 config_vtp();
72 config_cmd_ctrl(ctrl);
74 config_ddr_data(0, data);
75 config_ddr_data(1, data);
77 config_io_ctrl(ioctrl);
79 /* Set CKE to be controlled by EMIF/DDR PHY */
80 writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
82 /* Program EMIF instance */
83 config_ddr_phy(regs);
84 set_sdram_timings(regs);
85 config_sdram(regs);
86 }
87 #endif