1 /*
2 *
3 * Functions for omap5 based boards.
4 *
5 * (C) Copyright 2011
6 * Texas Instruments, <www.ti.com>
7 *
8 * Author :
9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com>
11 * Sricharan <r.sricharan@ti.com>
12 *
13 * See file CREDITS for list of people who contributed to this
14 * project.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 */
31 #include <common.h>
32 #include <asm/armv7.h>
33 #include <asm/arch/cpu.h>
34 #include <asm/arch/sys_proto.h>
35 #include <asm/sizes.h>
36 #include <asm/utils.h>
37 #include <asm/arch/gpio.h>
39 DECLARE_GLOBAL_DATA_PTR;
41 u32 *const omap5_revision = (u32 *)OMAP5_SRAM_SCRATCH_OMAP5_REV;
43 static struct gpio_bank gpio_bank_54xx[6] = {
44 { (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
45 { (void *)OMAP54XX_GPIO2_BASE, METHOD_GPIO_24XX },
46 { (void *)OMAP54XX_GPIO3_BASE, METHOD_GPIO_24XX },
47 { (void *)OMAP54XX_GPIO4_BASE, METHOD_GPIO_24XX },
48 { (void *)OMAP54XX_GPIO5_BASE, METHOD_GPIO_24XX },
49 { (void *)OMAP54XX_GPIO6_BASE, METHOD_GPIO_24XX },
50 };
52 const struct gpio_bank *const omap_gpio_bank = gpio_bank_54xx;
54 #ifdef CONFIG_SPL_BUILD
55 /*
56 * Some tuning of IOs for optimal power and performance
57 */
58 void do_io_settings(void)
59 {
60 }
61 #endif
63 void init_omap_revision(void)
64 {
65 /*
66 * For some of the ES2/ES1 boards ID_CODE is not reliable:
67 * Also, ES1 and ES2 have different ARM revisions
68 * So use ARM revision for identification
69 */
70 unsigned int rev = cortex_rev();
72 switch (rev) {
73 case MIDR_CORTEX_A15_R0P0:
74 *omap5_revision = OMAP5430_ES1_0;
75 default:
76 *omap5_revision = OMAP5430_SILICON_ID_INVALID;
77 }
78 }