arch/powerpc/cpu/mpc8xxx/ddr/ddr.h

   1 /*
   2  * Copyright 2008 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * Version 2 as published by the Free Software Foundation.
   7  */
   8
   9 #ifndef FSL_DDR_MAIN_H
  10 #define FSL_DDR_MAIN_H
  11
  12 #include <asm/fsl_ddr_sdram.h>
  13 #include <asm/fsl_ddr_dimm_params.h>
  14
  15 #include "common_timing_params.h"
  16
  17 /*
  18  * Bind the main DDR setup driver's generic names
  19  * to this specific DDR technology.
  20  */
  21 static __inline__ int
  22 compute_dimm_parameters(const generic_spd_eeprom_t *spd,
  23                         dimm_params_t *pdimm,
  24                         unsigned int dimm_number)
  25 {
  26         return ddr_compute_dimm_parameters(spd, pdimm, dimm_number);
  27 }
  28
  29 /*
  30  * Data Structures
  31  *
  32  * All data structures have to be on the stack
  33  */
  34 #define CONFIG_SYS_NUM_DDR_CTLRS CONFIG_NUM_DDR_CONTROLLERS
  35 #define CONFIG_SYS_DIMM_SLOTS_PER_CTLR CONFIG_DIMM_SLOTS_PER_CTLR
  36
  37 typedef struct {
  38         generic_spd_eeprom_t
  39            spd_installed_dimms[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR];
  40         struct dimm_params_s
  41            dimm_params[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR];
  42         memctl_options_t memctl_opts[CONFIG_SYS_NUM_DDR_CTLRS];
  43         common_timing_params_t common_timing_params[CONFIG_SYS_NUM_DDR_CTLRS];
  44         fsl_ddr_cfg_regs_t fsl_ddr_config_reg[CONFIG_SYS_NUM_DDR_CTLRS];
  45 } fsl_ddr_info_t;
  46
  47 /* Compute steps */
  48 #define STEP_GET_SPD                 (1 << 0)
  49 #define STEP_COMPUTE_DIMM_PARMS      (1 << 1)
  50 #define STEP_COMPUTE_COMMON_PARMS    (1 << 2)
  51 #define STEP_GATHER_OPTS             (1 << 3)
  52 #define STEP_ASSIGN_ADDRESSES        (1 << 4)
  53 #define STEP_COMPUTE_REGS            (1 << 5)
  54 #define STEP_PROGRAM_REGS            (1 << 6)
  55 #define STEP_ALL                     0xFFF
  56
  57 extern unsigned long long
  58 fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step);
  59
  60 extern const char * step_to_string(unsigned int step);
  61
  62 extern unsigned int
  63 compute_fsl_memctl_config_regs(const memctl_options_t *popts,
  64                                fsl_ddr_cfg_regs_t *ddr,
  65                                const common_timing_params_t *common_dimm,
  66                                const dimm_params_t *dimm_parameters,
  67                                unsigned int dbw_capacity_adjust);
  68 extern unsigned int
  69 compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
  70                                       common_timing_params_t *outpdimm,
  71                                       unsigned int number_of_dimms);
  72 extern unsigned int populate_memctl_options(int all_DIMMs_registered,
  73                                 memctl_options_t *popts,
  74                                 dimm_params_t *pdimm,
  75                                 unsigned int ctrl_num);
  76
  77 extern unsigned int mclk_to_picos(unsigned int mclk);
  78 extern unsigned int get_memory_clk_period_ps(void);
  79 extern unsigned int picos_to_mclk(unsigned int picos);
  80
  81 #endif