1 Display Controller
2 ------------------
4 (there isn't yet a generic binding in Linux, so this describes what is in
5 U-Boot, and may change based on Linux activity)
7 The device node for a display device is as described in the document
8 "Open Firmware Recommended Practice : Universal Serial Bus" with the
9 following modifications and additions :
11 Required properties :
12 - compatible : Should be "nvidia,tegra20-dc"
14 Required subnode 'rgb' is as follows:
16 Required properties (rgb) :
17 - nvidia,panel : phandle of LCD panel information
20 The panel node describes the panel itself. This has the properties listed in
21 displaymode.txt as well as:
23 Required properties (panel) :
24 - nvidia,bits-per-pixel: number of bits per pixel (depth)
25 - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt)
26 - nvidia,panel-timings: 4 cells containing required timings in ms:
27 * delay before asserting panel_vdd
28 * delay between panel_vdd-rise and data-rise
29 * delay between data-rise and backlight_vdd-rise
30 * delay between backlight_vdd and pwm-rise
31 * delay between pwm-rise and backlight_en-rise
33 Optional GPIO properies all have (phandle, GPIO number, flags):
34 - nvidia,backlight-enable-gpios: backlight enable GPIO
35 - nvidia,lvds-shutdown-gpios: LVDS power shutdown GPIO
36 - nvidia,backlight-vdd-gpios: backlight power GPIO
37 - nvidia,panel-vdd-gpios: panel power GPIO
39 Example:
41 host1x {
42 compatible = "nvidia,tegra20-host1x", "simple-bus";
43 reg = <0x50000000 0x00024000>;
44 interrupts = <0 65 0x04 /* mpcore syncpt */
45 0 67 0x04>; /* mpcore general */
47 #address-cells = <1>;
48 #size-cells = <1>;
49 status = "okay";
51 ranges = <0x54000000 0x54000000 0x04000000>;
53 dc@54200000 {
54 compatible = "nvidia,tegra20-dc";
55 reg = <0x54200000 0x00040000>;
56 interrupts = <0 73 0x04>;
57 status = "okay";
59 rgb {
60 status = "okay";
61 nvidia,panel = <&lcd_panel>;
62 };
63 };
64 };
66 lcd_panel: panel {
67 /* Seaboard has 1366x768 */
68 clock = <70600000>;
69 xres = <1366>;
70 yres = <768>;
71 left-margin = <58>;
72 right-margin = <58>;
73 hsync-len = <58>;
74 lower-margin = <4>;
75 upper-margin = <4>;
76 vsync-len = <4>;
77 hsync-active-high;
78 nvidia,bits-per-pixel = <16>;
79 nvidia,pwm = <&pwm 2 0>;
80 nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
81 nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
82 nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
83 nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
84 nvidia,panel-timings = <400 4 203 17 15>;
85 };