am33xx/ddr_defs.h: rename DDR2/DDR3 defines to their actual part numbers
[glsdk/glsdk-u-boot.git] / include / configs / mx28evk.h
1 /*
2  * (C) Copyright 2011 Freescale Semiconductor, Inc.
3  * Author: Fabio Estevam <fabio.estevam@freescale.com>
4  *
5  * Based on m28evk.h:
6  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
7  * on behalf of DENX Software Engineering GmbH
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  */
19 #ifndef __MX28EVK_CONFIG_H__
20 #define __MX28EVK_CONFIG_H__
22 /*
23  * SoC configurations
24  */
25 #define CONFIG_MX28                             /* i.MX28 SoC */
27 #define CONFIG_MXS_GPIO                 /* GPIO control */
28 #define CONFIG_SYS_HZ           1000            /* Ticks per second */
30 #define CONFIG_MACH_TYPE        MACH_TYPE_MX28EVK
32 #include <asm/arch/regs-base.h>
34 #define CONFIG_SYS_NO_FLASH
35 #define CONFIG_BOARD_EARLY_INIT_F
36 #define CONFIG_ARCH_MISC_INIT
38 /*
39  * SPL
40  */
41 #define CONFIG_SPL
42 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
43 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
44 #define CONFIG_SPL_LDSCRIPT     "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
45 #define CONFIG_SPL_LIBCOMMON_SUPPORT
46 #define CONFIG_SPL_LIBGENERIC_SUPPORT
47 #define CONFIG_SPL_GPIO_SUPPORT
49 /*
50  * U-Boot Commands
51  */
52 #include <config_cmd_default.h>
53 #define CONFIG_DISPLAY_CPUINFO
54 #define CONFIG_DOS_PARTITION
56 #define CONFIG_CMD_CACHE
57 #define CONFIG_CMD_DATE
58 #define CONFIG_CMD_DHCP
59 #define CONFIG_CMD_FAT
60 #define CONFIG_CMD_GPIO
61 #define CONFIG_CMD_MII
62 #define CONFIG_CMD_MMC
63 #define CONFIG_CMD_NET
64 #define CONFIG_CMD_NFS
65 #define CONFIG_CMD_PING
66 #define CONFIG_CMD_SETEXPR
67 #define CONFIG_CMD_SF
68 #define CONFIG_CMD_SPI
69 #define CONFIG_CMD_USB
70 #define CONFIG_CMD_BOOTZ
71 #define CONFIG_CMD_I2C
73 /*
74  * Memory configurations
75  */
76 #define CONFIG_NR_DRAM_BANKS            1               /* 1 bank of DRAM */
77 #define PHYS_SDRAM_1                    0x40000000      /* Base address */
78 #define PHYS_SDRAM_1_SIZE               0x40000000      /* Max 1 GB RAM */
79 #define CONFIG_SYS_MALLOC_LEN           0x00400000      /* 4 MB for malloc */
80 #define CONFIG_SYS_MEMTEST_START        0x40000000      /* Memtest start adr */
81 #define CONFIG_SYS_MEMTEST_END          0x40400000      /* 4 MB RAM test */
82 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
83 /* Point initial SP in SRAM so SPL can use it too. */
85 #define CONFIG_SYS_INIT_RAM_ADDR        0x00000000
86 #define CONFIG_SYS_INIT_RAM_SIZE        (128 * 1024)
88 #define CONFIG_SYS_INIT_SP_OFFSET \
89         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
90 #define CONFIG_SYS_INIT_SP_ADDR \
91         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
93 /*
94  * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
95  * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
96  * binary. In case there was more of this mess, 0x100 bytes are skipped.
97  */
98 #define CONFIG_SYS_TEXT_BASE    0x40000100
100 #define CONFIG_ENV_OVERWRITE
101 /*
102  * U-Boot general configurations
103  */
104 #define CONFIG_SYS_LONGHELP
105 #define CONFIG_SYS_PROMPT       "MX28EVK U-Boot > "
106 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */
107 #define CONFIG_SYS_PBSIZE       \
108         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
109                                                 /* Print buffer size */
110 #define CONFIG_SYS_MAXARGS      32              /* Max number of command args */
111 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
112                                                 /* Boot argument buffer size */
113 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
114 #define CONFIG_AUTO_COMPLETE            /* Command auto complete */
115 #define CONFIG_CMDLINE_EDITING          /* Command history etc */
116 #define CONFIG_SYS_HUSH_PARSER
118 /*
119  * Serial Driver
120  */
121 #define CONFIG_PL011_SERIAL
122 #define CONFIG_PL011_CLOCK              24000000
123 #define CONFIG_PL01x_PORTS              { (void *)MXS_UARTDBG_BASE }
124 #define CONFIG_CONS_INDEX               0
125 #define CONFIG_BAUDRATE                 115200  /* Default baud rate */
127 /*
128  * DMA
129  */
130 #define CONFIG_APBH_DMA
132 /*
133  * MMC Driver
134  */
135 #define CONFIG_ENV_IS_IN_MMC
136 #ifdef CONFIG_ENV_IS_IN_MMC
137  #define CONFIG_ENV_OFFSET      (256 * 1024)
138  #define CONFIG_ENV_SIZE        (16 * 1024)
139  #define CONFIG_SYS_MMC_ENV_DEV 0
140 #endif
141 #define CONFIG_CMD_SAVEENV
142 #ifdef  CONFIG_CMD_MMC
143 #define CONFIG_MMC
144 #define CONFIG_GENERIC_MMC
145 #define CONFIG_MMC_BOUNCE_BUFFER
146 #define CONFIG_MXS_MMC
147 #endif
149 /*
150  * NAND Driver
151  */
152 #ifdef CONFIG_CMD_NAND
153 #define CONFIG_NAND_MXS
154 #define CONFIG_SYS_MAX_NAND_DEVICE      1
155 #define CONFIG_SYS_NAND_BASE            0x60000000
156 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
157 #endif
159 /*
160  * Ethernet on SOC (FEC)
161  */
162 #ifdef  CONFIG_CMD_NET
163 #define CONFIG_NET_MULTI
164 #define CONFIG_ETHPRIME "FEC0"
165 #define CONFIG_FEC_MXC
166 #define CONFIG_FEC_MXC_MULTI
167 #define CONFIG_MII
168 #define CONFIG_FEC_XCV_TYPE     RMII
169 #define CONFIG_MX28_FEC_MAC_IN_OCOTP
170 #endif
172 /*
173  * RTC
174  */
175 #ifdef  CONFIG_CMD_DATE
176 #define CONFIG_RTC_MXS
177 #endif
179 /*
180  * USB
181  */
182 #ifdef  CONFIG_CMD_USB
183 #define CONFIG_USB_EHCI
184 #define CONFIG_USB_EHCI_MXS
185 #define CONFIG_EHCI_MXS_PORT 1
186 #define CONFIG_EHCI_IS_TDI
187 #define CONFIG_USB_STORAGE
188 #define CONFIG_USB_HOST_ETHER
189 #define CONFIG_USB_ETHER_ASIX
190 #define CONFIG_USB_ETHER_SMSC95XX
191 #endif
193 /* I2C */
194 #ifdef CONFIG_CMD_I2C
195 #define CONFIG_I2C_MXS
196 #define CONFIG_HARD_I2C
197 #define CONFIG_SYS_I2C_SPEED    400000
198 #endif
200 /*
201  * SPI
202  */
203 #ifdef CONFIG_CMD_SPI
204 #define CONFIG_HARD_SPI
205 #define CONFIG_MXS_SPI
206 #define CONFIG_MXS_SPI_DMA_ENABLE
207 #define CONFIG_SPI_HALF_DUPLEX
208 #define CONFIG_DEFAULT_SPI_BUS          2
209 #define CONFIG_DEFAULT_SPI_MODE         SPI_MODE_0
211 /* SPI Flash */
212 #ifdef CONFIG_CMD_SF
213 #define CONFIG_SPI_FLASH
214 #define CONFIG_SF_DEFAULT_BUS   2
215 #define CONFIG_SF_DEFAULT_CS    0
216 /* this may vary and depends on the installed chip */
217 #define CONFIG_SPI_FLASH_SST
218 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
219 #define CONFIG_SF_DEFAULT_SPEED         24000000
221 /* (redundant) environemnt in SPI flash */
222 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
223 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
224 #define CONFIG_ENV_SIZE                 0x1000          /* 4KB */
225 #define CONFIG_ENV_OFFSET               0x40000         /* 256K */
226 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
227 #define CONFIG_ENV_SECT_SIZE            0x1000
228 #define CONFIG_ENV_SPI_CS               0
229 #define CONFIG_ENV_SPI_BUS              2
230 #define CONFIG_ENV_SPI_MAX_HZ           24000000
231 #define CONFIG_ENV_SPI_MODE             SPI_MODE_0
232 #endif
233 #endif
234 #endif
236 /*
237  * Boot Linux
238  */
239 #define CONFIG_CMDLINE_TAG
240 #define CONFIG_SETUP_MEMORY_TAGS
241 #define CONFIG_BOOTDELAY        3
242 #define CONFIG_BOOTFILE "uImage"
243 #define CONFIG_LOADADDR 0x42000000
244 #define CONFIG_SYS_LOAD_ADDR    CONFIG_LOADADDR
245 #define CONFIG_OF_LIBFDT
247 /*
248  * Extra Environments
249  */
250 #define CONFIG_EXTRA_ENV_SETTINGS \
251         "update_nand_full_filename=u-boot.nand\0" \
252         "update_nand_firmware_filename=u-boot.sb\0"     \
253         "update_sd_firmware_filename=u-boot.sd\0" \
254         "update_nand_firmware_maxsz=0x100000\0" \
255         "update_nand_stride=0x40\0"     /* MX28 datasheet ch. 12.12 */ \
256         "update_nand_count=0x4\0"       /* MX28 datasheet ch. 12.12 */ \
257         "update_nand_get_fcb_size="     /* Get size of FCB blocks */ \
258                 "nand device 0 ; " \
259                 "nand info ; " \
260                 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
261                 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
262         "update_nand_full="                 /* Update FCB, DBBT and FW */ \
263                 "if tftp ${update_nand_full_filename} ; then " \
264                 "run update_nand_get_fcb_size ; " \
265                 "nand scrub -y 0x0 ${filesize} ; " \
266                 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \
267                 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
268                 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
269                 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
270                 "fi\0" \
271         "update_nand_firmware="         /* Update only firmware */ \
272                 "if tftp ${update_nand_firmware_filename} ; then " \
273                 "run update_nand_get_fcb_size ; " \
274                 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
275                 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
276                 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
277                 "nand erase ${fcb_sz} ${fw_sz} ; " \
278                 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
279                 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
280                 "fi\0" \
281         "update_sd_firmware="           /* Update the SD firmware partition */ \
282                 "if mmc rescan ; then " \
283                 "if tftp ${update_sd_firmware_filename} ; then " \
284                 "setexpr fw_sz ${filesize} / 0x200 ; "  /* SD block size */ \
285                 "setexpr fw_sz ${fw_sz} + 1 ; " \
286                 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
287                 "fi ; " \
288                 "fi\0" \
289         "script=boot.scr\0"     \
290         "uimage=uImage\0" \
291         "console_fsl=ttyAM0\0" \
292         "console_mainline=ttyAMA0\0" \
293         "mmcdev=0\0" \
294         "mmcpart=2\0" \
295         "mmcroot=/dev/mmcblk0p3 rw\0" \
296         "mmcrootfstype=ext3 rootwait\0" \
297         "mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
298                 "root=${mmcroot} " \
299                 "rootfstype=${mmcrootfstype}\0" \
300         "loadbootscript="  \
301                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
302         "bootscript=echo Running bootscript from mmc ...; "     \
303                 "source\0" \
304         "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
305         "mmcboot=echo Booting from mmc ...; " \
306                 "run mmcargs; " \
307                 "bootm\0" \
308         "netargs=setenv bootargs console=${console_mainline},${baudrate} " \
309                 "root=/dev/nfs " \
310                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
311         "netboot=echo Booting from net ...; " \
312                 "run netargs; " \
313                 "dhcp ${uimage}; bootm\0"
315 #define CONFIG_BOOTCOMMAND \
316         "mmc dev ${mmcdev}; if mmc rescan; then " \
317                 "if run loadbootscript; then " \
318                         "run bootscript; " \
319                 "else " \
320                         "if run loaduimage; then " \
321                                 "run mmcboot; " \
322                         "else run netboot; " \
323                         "fi; " \
324                 "fi; " \
325         "else run netboot; fi"
327 #endif /* __MX28EVK_CONFIG_H__ */