OMAP5: Change voltages for omap5432
[glsdk/glsdk-u-boot.git] / arch / arm / include / asm / arch-omap5 / clocks.h
index 409e0e3f8c11336e7f1ff889c6f74596e2df2faf..5f1a7aa770dcf6e0c345be2dc86d9df97d49c61a 100644 (file)
@@ -480,6 +480,13 @@ struct omap5_prcm_regs {
        u32 pad217[4];
        u32 prm_vc_cfg_i2c_mode;                /* 4ae07bb4 */
        u32 prm_vc_cfg_i2c_clk;                 /* 4ae07bb8 */
        u32 pad217[4];
        u32 prm_vc_cfg_i2c_mode;                /* 4ae07bb4 */
        u32 prm_vc_cfg_i2c_clk;                 /* 4ae07bb8 */
+       u32 pad218[2];
+       u32 prm_sldo_core_setup;                /* 4ae07bc4 */
+       u32 prm_sldo_core_ctrl;                 /* 4ae07bc8 */
+       u32 prm_sldo_mpu_setup;                 /* 4ae07bcc */
+       u32 prm_sldo_mpu_ctrl;                  /* 4ae07bd0 */
+       u32 prm_sldo_mm_setup;                  /* 4ae07bd4 */
+       u32 prm_sldo_mm_ctrl;                   /* 4ae07bd8 */
 };
 
 /* DPLL register offsets */
 };
 
 /* DPLL register offsets */
@@ -646,6 +653,9 @@ struct omap5_prcm_regs {
 #define VDD_MPU                1000
 #define VDD_MM         1000
 #define VDD_CORE       1040
 #define VDD_MPU                1000
 #define VDD_MM         1000
 #define VDD_CORE       1040
+#define VDD_MPU_5432   1150
+#define VDD_MM_5432    1150
+#define VDD_CORE_5432  1150
 
 /* Standard offset is 0.5v expressed in uv */
 #define PALMAS_SMPS_BASE_VOLT_UV 500000
 
 /* Standard offset is 0.5v expressed in uv */
 #define PALMAS_SMPS_BASE_VOLT_UV 500000